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Results
Found 18 publication records. Showing 17 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Shovon Dey, Aurangozeb, Masum Hossain |
Low-Latency Burst Error Detection and Correction in Decision-Feedback Equalization. |
IEEE Open J. Circuits Syst. |
2021 |
DBLP DOI BibTeX RDF |
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1 | Aurangozeb, Carson R. Dick, Maruf Mohammad, Masum Hossain |
Sequence-Coded Multilevel Signaling for High-Speed Interface. |
IEEE J. Solid State Circuits |
2020 |
DBLP DOI BibTeX RDF |
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1 | Masum Hossain, Aurangozeb, Nhat Nguyen |
DDJ-Adaptive SAR TDC-Based Timing Recovery for Multilevel Signaling. |
IEEE J. Solid State Circuits |
2019 |
DBLP DOI BibTeX RDF |
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1 | Zarraf Huda, Shovon Dey, Aaron Monai, Aurangozeb, Masum Hossain |
Affordable Sequence Decoding Techniques for High Speed SerDes. |
MWSCAS |
2019 |
DBLP DOI BibTeX RDF |
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1 | Aurangozeb, Carson R. Dick, Maruf Mohammad, Masum Hossain |
A 32Gb/s 2.9pJ/b Transceiver for Sequence-Coded PAM-4 Signalling with 4-to-6dB SNR Gain in 28nm FDSOI CMOS. |
ISSCC |
2019 |
DBLP DOI BibTeX RDF |
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1 | Yang Ren, David Perron, Aurangozeb, Zhiping Jiang, Masum Hossain, Vien Van |
Broadband-Tunable Cascaded Vernier Silicon Photonic Microring Filter with Temperature Tracking. |
OFC |
2019 |
DBLP BibTeX RDF |
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1 | Aurangozeb, Maruf Mohammad, Masum Hossain |
Analog to Sequence Converter-Based PAM-4 Receiver With Built-In Error Correction. |
IEEE J. Solid State Circuits |
2018 |
DBLP DOI BibTeX RDF |
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1 | Aurangozeb, A. K. M. Delwar Hossain, Maruf Mohammad, Masum Hossain |
Channel-Adaptive ADC and TDC for 28 Gb/s PAM-4 Digital Receiver. |
IEEE J. Solid State Circuits |
2018 |
DBLP DOI BibTeX RDF |
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1 | A. K. M. Delwar Hossain, Aurangozeb, Masum Hossain |
Burst Mode Optical Receiver With 10 ns Lock Time Based on Concurrent DC Offset and Timing Recovery Technique. |
JOCN |
2018 |
DBLP DOI BibTeX RDF |
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1 | Masum Hossain, Aurangozeb, Nhat Nguyen |
A Bimodal (NRZ/PAM-4) ISI Tolerant Timing Recovery with Adaptive DDJ Equalization. |
A-SSCC |
2018 |
DBLP DOI BibTeX RDF |
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1 | Masum Hossain, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb |
Fractional-N DPLL-Based Low-Power Clocking Architecture for 1-14 Gb/s Multi-Standard Transmitter. |
IEEE J. Solid State Circuits |
2017 |
DBLP DOI BibTeX RDF |
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1 | Aurangozeb, A. K. M. Delwar Hossain, Can Ni, Quazi Sharar, Masum Hossain |
Time-Domain Arithmetic Logic Unit With Built-In Interconnect. |
IEEE Trans. Very Large Scale Integr. Syst. |
2017 |
DBLP DOI BibTeX RDF |
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1 | Aurangozeb, A. K. M. Delwar Hossain, Masum Hossain |
Channel adaptive ADC and TDC for 28 Gb/s PAM-4 digital receiver. |
CICC |
2017 |
DBLP DOI BibTeX RDF |
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1 | Masum Hossain, Aurangozeb, A. K. M. Delwar Hossain, Maruf Mohammad |
A 82 mW 28 Gb/s PAM-4 digital sequence decoder with built-in error correction in 28nm FDSOI. |
A-SSCC |
2017 |
DBLP DOI BibTeX RDF |
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1 | A. K. M. Delwar Hossain, Aurangozeb, Maruf Mohammad, Masum Hossain |
A 35 mW 10 Gb/s ADC-DSP less direct digital sequence detector and equalizer in 65nm CMOS. |
VLSI Circuits |
2016 |
DBLP DOI BibTeX RDF |
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1 | Masum Hossain, Amlan Nag, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb |
Fractional-N DPLL based low power clocking architecture for 1-14 Gb/s multi-standard transmitter. |
A-SSCC |
2016 |
DBLP DOI BibTeX RDF |
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1 | Hokyu Lee, Aurangozeb, Sejin Park, Jintae Kim, Chulwoo Kim |
A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter. |
IEEE Trans. Very Large Scale Integr. Syst. |
2015 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #17 of 17 (100 per page; Change: )
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