Search results for "Analogue"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
95	D. L. Grundy, M. Bozic, John V. Hatfield	Development of an Analogue Microprocessor.	VLSI Design	1997	DBLP DOI BibTeX RDF	Analogue array, Analogue microprocessor, Analogue signal processing, Programmable Logarithmic, Instruction set
71	David Varghese, J. Neil Ross	A continuous-time hierarchical field programmable analogue array for rapid prototyping and hierarchical approach to analogue systems design.	SBCCI	2005	DBLP DOI BibTeX RDF	HFPAA, differential difference amplifier, interconnectivity analysis, non-permuting grouped combinations listing algorithm, rents rule, second generation current-conveyor, hierarchical architecture, FPAA
66	Masahiro Murakawa, Shuji Yoshizawa, Toshio Adachi, Shiro Suzuki, Kaoru Takasuka, Masaya Iwata, Tetsuya Higuchi	Analogue EHW Chip for Intermediate Frequency Filters.	ICES	1998	DBLP DOI BibTeX RDF
66	David M. Lewis	A hardware engine for analogue mode simulation of MOS digital circuits.	DAC	1985	DBLP DOI BibTeX RDF	SPICE
62	Ahcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez	Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Analogue fault simulation, Catastrophic and parametric faults, Process deviations, Analogue test, Statistical modeling
62	Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Mark Zwolinski	Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations.	DFT	1997	DBLP DOI BibTeX RDF	Analogue fault simulation, Supply current monitoring Test quality evaluation, Analogue circuit testing, Test pattern generation
57	Luís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur	A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns.	DATE	2004	DBLP DOI BibTeX RDF
57	Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro	A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	analogue BIST, analogue-to-digital converter, mixed-signal testing, sigma-delta modulation
55	C. T. Carr, T. Martin McGinnity, L. J. McDaid	Integration of UML and VHDL-AMS for analogue system modelling.	Formal Aspects Comput.	2004	DBLP DOI BibTeX RDF	Analogue, Automated mapping, UML, Circuits, VHDL-AMS
53	Joop P. M. Van Lammeren	ICCQ: A Test Method for Analogue VLSI Using Local Current Sensors.	J. Electron. Test.	1999	DBLP DOI BibTeX RDF	analogue testing, analogue VLSI, current testing
53	Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey	On the development of power supply voltage control testing technique for analogue circuits.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	power supply circuits, voltage control, power supply voltage control testing, hard defects, soft defects, simulation, fault diagnosis, integrated circuit testing, data analysis, data analysis, circuit analysis computing, operational amplifiers, operational amplifier, analogue integrated circuits, IC tests, analogue circuits
53	Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey	Exposing floating gate defects in analogue CMOS circuits by power supply voltage control testing technique.	VLSI Design	1995	DBLP DOI BibTeX RDF	analogue CMOS circuits, power supply voltage control testing technique, floating gate defect exposure, power supply voltage sweep, fault diagnosis, integrated circuit testing, fault detection, fault coverage, integrated circuit modelling, CMOS analogue integrated circuits
52	Daniela De Venuto, Michael J. Ohletz	On-Chip Test for Mixed-Signal ASICs using Two-Mode Comparators with Bias-Programmable Reference Voltages.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	mixed-signal ASIC, hardware conversion, GO/NOGO test, bias programming, DfT, power consumption, overhead
50	Patrick Rocke, Brian McGinley, John Maher, Fearghal Morgan, Jim Harkin	Investigating the Suitability of FPAAs for Evolved Hardware Spiking Neural Networks.	ICES	2008	DBLP DOI BibTeX RDF	FPAA Hardware Evolution, Analogue Neural Networks, Spiking Neural Networks
49	Gianni Bosi, Gerhard Herden	On a Possible Continuous Analogue of the Szpilrajn Theorem and its Strengthening by Dushnik and Miller.	Order	2006	DBLP DOI BibTeX RDF	Mathematics Subject Classifications (2000) 54F05, 06A05, 91B16
49	Aleksandra Rankov, Gaynor E. Taylor, John Webster	Robust Data Compression for Analogue Test Outputs.	IOLTW	2002	DBLP DOI BibTeX RDF
49	N. Axelos, J. Watson, D. Taylor, A. Platts	Built-In-Self-Test of Analogue Circuits Using Optimised Fault Sets and Transient Response Testing.	IOLTW	2002	DBLP DOI BibTeX RDF
49	Toshiro Minami, H. Sazuka, Sachio Hirokawa, Takeshi Ohtani	Living with ZK-an approach towards communication with analogue messages.	KES (1)	1998	DBLP DOI BibTeX RDF
47	Josep Altet, André Ivanov, A. Wong	Thermal Testing of Analogue Integrated Circuits: A Case Study.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	test of analogue ICs, thermal analysis of ICs, built-in self-testing, CMOS technology, thermal testing
47	Luis Hernández-Martínez, Arturo Sarmiento-Reyes	Topological Considerations for the Diagnosability Conditions of Analogue Circuits Using a Pair of Conjugate Trees.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	analogue circuit diagnostic, topological conditions, pair of conjugate trees
47	Robert A. Cottrell	Event-driven behavioural simulation of analogue transfer functions.	EURO-DAC	1990	DBLP DOI BibTeX RDF	Behavioural Simulation, Mixed Analogue-Digital Simulation, Modelling
46	Karim Arabi, Bozena Kaminska	Oscillation-test strategy for analog and mixed-signal integrated circuits.	VTS	1996	DBLP DOI BibTeX RDF	circuit oscillations, oscillation test strategy, analog ICs, low-cost test method, oscillation frequency deviation, wafer-probe testing, final production testing, ASIC testing, integrated circuit testing, operational amplifiers, analogue integrated circuits, mixed analogue-digital integrated circuits, production testing, analogue-digital conversion, mixed-signal ICs
43	Zheng Rong Yang, Mark Zwolinski	Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits.	DATE	1999	DBLP DOI BibTeX RDF
40	Piotr Dudek	Implementation of SIMD vision chip with 128×128 array of analogue processing elements.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
40	Yan Xie, Bashir M. Al-Hashimi	Analogue adaptive filters using wave synthesis technique.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
40	Thomas Zimmer, N. Milet-Lewis, Ahmed Fakhfakh, B. Ardouin, Hervé Levi, J. B. Duluc, Pascal Fouillat	Hierarchical Analogue Design and Behavioural Modelling.	MSE	1999	DBLP DOI BibTeX RDF
40	Tom J. Kazmierski	A Formal Description of VHDL-AMS Analogue Systems.	DATE	1998	DBLP DOI BibTeX RDF
40	Alister Hamilton, Kostis Papathanasiou, Morgan Tamplin, Thomas Brandtner	Palmo: Field Programmable Analogue and Mixed-Signal VLSI for Evolvable Hardware.	ICES	1998	DBLP DOI BibTeX RDF
40	Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, C. Nielsen, Bernard Courtois	Built-in self-test and fault diagnosis of fully differential analogue circuits.	ICCAD	1994	DBLP DOI BibTeX RDF
40	Daniel M. Ellin, Stuart J. Flockton	Analysing evolvable cell design for optimisation of routing options.	GECCO (Companion)	2007	DBLP DOI BibTeX RDF	analogue circuitry, analogue evolvable, cell design, cell signal routing, evolvable cells
40	Hans G. Kerkhoff, Hans P. A. Hendriks	Fault Modeling and Fault Simulation in Mixed Micro-Fluidic Microelectronic Systems.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	microsystem testing, analogue fault modeling, analogue fault simulation, fluidic FEM simulation, defect-oriented testing
38	Brian McGinley, Patrick Rocke, Fearghal Morgan, John Maher	Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers.	GECCO	2008	DBLP DOI BibTeX RDF	FPAA hardware evolution, analogue neural networks., spiking neural networks
38	Abu Khari bin A'Ain, A. H. Bratt, A. P. Dorey	Testing Analogue Circuits by A C Power Supply Voltage.	VLSI Design	1996	DBLP DOI BibTeX RDF	analogue test, Fault model, low voltage test
35	Marisa Luisa López-Vallejo, Carlos Angel Iglesias, Juan Carlos López 0001	A Knowledge-based System for Hardware-Software Partitioning.	DATE	1998	DBLP DOI BibTeX RDF
33	Luciano Floridi	Against digital ontology.	Synth.	2009	DBLP DOI BibTeX RDF	Analogue, Digital ontology, Digital physics, Informational structural realism, Kant’s antinomies, Structural realism, Continuous, Digital, Discrete
33	Yinjie Sun	A Revised Neural Network for Solving Quadratic Programming Problems.	ISNN (3)	2009	DBLP DOI BibTeX RDF	Quadratic Programming Problems, Neural Network, Analogue Circuit
33	Masahiro Nakagawa	A Generalised Entropy Based Associative Model.	ICONIP (1)	2007	DBLP DOI BibTeX RDF	Analogue Memory Retrieval, Entropy, Associative Memory
33	Xin Yan 0002, Xue Li 0001, Dawei Song 0001	A Correlation Analysis on LSA and HAL Semantic Space Models.	CIS	2004	DBLP DOI BibTeX RDF	Hyperspace Analogue to Language, Automatic Query Refinement, Latent Semantic Indexing, Correlation Analysis
31	Piotr Jantos, Damian Grzechca, Tomasz Golonek, Jerzy Rutkowski	The Influence of Global Parametric Faults on Analogue Electronic Circuits Time Domain Response Features.	DDECS	2008	DBLP DOI BibTeX RDF
31	Yerbol Sapargaliyev, Tatiana Kalganova	Unconstrained Evolution of Analogue Computational "QR" Circuit with Oscillating Length Representation.	ICES	2008	DBLP DOI BibTeX RDF	Evolutionary hardware design, Evolutionary circuit diagnostics and testing
31	Kester Dean Clegg, Susan Stepney	Analogue Circuit Control through Gene Expression.	EvoWorkshops	2008	DBLP DOI BibTeX RDF
31	Kester Dean Clegg, Susan Stepney, Tim Clarke	Evolutionary Search Applied to Reconfigurable Analogue Control.	FPL	2007	DBLP DOI BibTeX RDF
31	Lyudmila Zinchenko, Matthias Radecker, Fabio Bisogno	Multi-objective univariate marginal distribution optimisation of mixed analogue-digital signal circuits.	GECCO	2007	DBLP DOI BibTeX RDF	evolutionary probabilistic models, circuit optimisation, multi-objective optimisation
31	m. c. schraefel	What is an analogue for the semantic web and why is having one important?	Hypertext	2007	DBLP DOI BibTeX RDF	hypertext argumentation, jourknow, notebooks, tabulator, semantic web, interaction design, memex, mSpace
31	John Maher, Brian McGinley, Patrick Rocke, Fearghal Morgan	Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices.	FCCM	2006	DBLP DOI BibTeX RDF
31	Ali Shahrokni, Julio Jenaro, Tomas Gustafsson, Andreas Vinnberg, Johan Sandsjö, Morten Fjeld	One-dimensional force feedback slider: going from an analogue to a digital platform.	NordiCHI	2006	DBLP DOI BibTeX RDF	physical prototyping, HCI, user interface design, TUI, force feedback, haptic interface, slider
31	Sankalp S. Modi, Peter R. Wilson, Andrew D. Brown	Power aware learning for class AB analogue VLSI neural network.	ISCAS	2006	DBLP DOI BibTeX RDF
31	Mark R. Grant, C. Anthony Hunt	An In Silico Analogue of In Vitro Systems Used to Study Epithelial Cell Morphogenesis.	CMSB	2006	DBLP DOI BibTeX RDF	cystogenesis, epithelial, simulation, model, complex systems, systems biology, morphogenesis, Agent-based, synthetic
31	Mladen Panovic, Andreas Demosthenous	Compact CMOS linear transconductor and four-quadrant analogue multiplier.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
31	Guiomar Evans, João Goes, Adolfo Steiger-Garção, Manuel Duarte Ortigueira, Nuno F. Paulino, Jilseph Lopes Silva	Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
31	Yigang He, Yanghong Tan, Yichuang Sun	Class-based neural network method for fault location of large-scale analogue circuits.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
31	Chiheb Rebai, Dominique Dallet, Philippe Marchegay	High order 1-bit digital sigma delta modulation for on chip analogue signal sources.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
31	Daniela De Venuto, Michael J. Ohletz, Bruno Riccò	Testing of Analogue Circuits via (Standard) Digital Gates.	ISQED	2002	DBLP DOI BibTeX RDF
31	Alister Hamilton, Peter Thomson, Morgan Tamplin	Experiments in Evolvable Filter Design Using Pulse Based Programmable Analogue VLSI Models.	ICES	2000	DBLP DOI BibTeX RDF
31	Kurosh Madani, Ghislain de Tremiolles	Effects of Global Perturbations on Learning Capability in a CMOS Analogue Implementation of Synchronous Boltzmann Machine.	IWANN (2)	1999	DBLP DOI BibTeX RDF	Global Perturbations, Learning capability, Neural network, Modelling, Experimental validation
31	Tom J. Kazmierski	Fuzzy-logic digital-analogue interfaces for accurate mixed-signal simulation.	DATE	1998	DBLP DOI BibTeX RDF
31	Stuart J. Flockton, Kevin Sheehan	Intrinsic Circuit Evolution Using Programmable Analogue Arrays.	ICES	1998	DBLP DOI BibTeX RDF
31	Peter T. Breuer, Natividad Martínez Madrid, Carlos Delgado Kloos	The Computational Description of Analogue System Behaviour.	Prospects for Hardware Foundations	1998	DBLP DOI BibTeX RDF
31	Georges G. E. Gielen, Koen Swings, Willy M. C. Sansen	An intelligent design system for analogue integrated circuits.	EURO-DAC	1990	DBLP DOI BibTeX RDF
31	Chen-Yang Pan, Kwang-Ting Cheng	Implicit functional testing for analog circuits.	VTS	1996	DBLP DOI BibTeX RDF	implicit functional testing, linear time-invariant circuits, impulse response samples, pseudo-random technique, production testing time, yield coverages, VLSI, integrated circuit testing, fault coverage, analog circuits, analogue integrated circuits, mixed analogue-digital integrated circuits, transient response
31	Diego Vázquez, José L. Huertas, Adoración Rueda	Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design.	VTS	1996	DBLP DOI BibTeX RDF	sw-op amp design, CMOS implementations, design efforts, cell design, integrated circuit testing, design for testability, DFT, integrated circuit design, power dissipation, operational amplifiers, area, analogue integrated circuits, IC testing, analog integrated circuits, CMOS analogue integrated circuits
31	Hong Helena Zheng, Ashok Balivada, Jacob A. Abraham	A novel test generation approach for parametric faults in linear analog circuits .	VTS	1996	DBLP DOI BibTeX RDF	digital test software, time-domain tests, equivalent digital circuit, digital test vectors, test waveform, VLSI, test generation, integrated circuit testing, fault location, stuck-at faults, analogue integrated circuits, parametric faults, linear analog circuits, time-domain analysis, equivalent circuits, analogue processing circuits
31	Janusz Rzeszut, Bozena Kaminska, Yvon Savaria	A new method for testing mixed analog and digital circuits.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	charge-coupled device circuits, mixed analog and digital circuits, analog test points, simultaneous observation, analog multiplexer, signal path, analog shift register, input voltage, integrated circuit testing, shift registers, mixed analogue-digital integrated circuits, charge coupled device, analogue processing circuits
31	Gert Cauwenberghs	Bit-serial bidirectional A/D/A conversio.	ARVLSI	1995	DBLP DOI BibTeX RDF	digital-analogue conversion, bidirectional bit-serial convertor, algorithmic DAC conversion, successive approximation ADC, D/A conversion, fault-tolerant VLSI architecture, matched monotonic characteristics, 200 muW, 20 mus, VLSI, CMOS integrated circuits, analogue-digital conversion, integrated circuit reliability, A/D conversion, 2 micron, CMOS process
31	Tonia G. Morris, Denise M. Wilson, Stephen P. DeWeerth	Analog VLSI circuits for manufacturing inspection.	ARVLSI	1995	DBLP DOI BibTeX RDF	analog VLSI circuits, manufacturing inspection, programmable structuring elements, oriented edge detection, high speed preprocessors, serial/parallel processing, focal-plane processing, vertical bipolar phototransistors, digital CMOS process, adaptive image threshold, 2.0 micron, computer vision, VLSI, edge detection, mathematical morphology, machine vision, manufacture, morphological operations, selective attention, massively parallel architectures, CMOS analogue integrated circuits, automatic optical inspection, focal planes, analogue processing circuits
31	Bassem A. Alhalabi, Magdy A. Bayoumi	A scalable analog architecture for neural networks with on-chip learning and refreshing.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	analogue storage, scalable analog architecture, on-chip learning, on-chip refreshing, analog storage, analog functional blocks, analog pass switches, system versatility, learning speed, local analog synaptic updating scheme, unbounded scalability, neural networks, learning (artificial intelligence), neural chips, analogue processing circuits
31	Lahouari Sebaa, Norm Gardner, Robert Neidorff, Rich Valley	Self-test in a VCM driver chip.	VTS	1995	DBLP DOI BibTeX RDF	driver circuits, bridge circuits, digital-analogue conversion, pulse amplifiers, VCM driver chip, self-test mode, complex mixed-signal device, device under test, voice-coil motor, H-bridge amplifier, onchip D/A converter, self-test circuitry, 11 bit, built-in self test, integrated circuit testing, design for testability, mixed analogue-digital integrated circuits, instrumentation amplifiers
31	Diego Vázquez, Adoración Rueda, José L. Huertas	A solution for the on-line test of analog ladder filters.	VTS	1995	DBLP DOI BibTeX RDF	ladder filters, analog ladder filters, stability problems, design for test methodology, solution feasibility, analogue ICs, integrated circuit testing, design for testability, on-line testing, analogue integrated circuits, active filters, active filters, circuit stability
31	Anirudh Devgan, Ronald A. Rohrer	Efficient simulation of interconnect and mixed analog-digital circuits in ACES.	VLSI Design	1995	DBLP DOI BibTeX RDF	adaptively controlled explicit simulation, mixed analog-digital circuits, analog circuit simulation, interconnect circuit simulation, AWE macromodels, nonlinear terminations, variable accuracy device models, circuit topology constraints removal, timing, circuit analysis computing, transient analysis, analogue integrated circuits, integrated circuit interconnections, mixed analogue-digital integrated circuits, ACES, transient simulation, timing simulation
31	George A. Hadgis, P. R. Mukund	A novel CMOS monolithic analog multiplier with wide input dynamic range.	VLSI Design	1995	DBLP DOI BibTeX RDF	analogue multipliers, circuit feedback, CMOS monolithic analog multiplier, input dynamic range, voltage-controlled variable linear resistor, feedback network, PSpice simulation results, circuit analysis computing, linearity, SPICE, operational amplifiers, operational amplifier, CMOS analogue integrated circuits
29	Shaji Krishnan, Hans G. Kerkhoff	A Robust Metric for Screening Outliers from Analogue Product Manufacturing Tests Responses.	ETS	2011	DBLP DOI BibTeX RDF	Analogue, Reliability, Test, Outliers, Mahalanobis distance
29	Wanchun Qu, Jian Tang	Multi-point Calibration Detecting Method of Non-linear Analogue Quantity.	HIS (3)	2009	DBLP DOI BibTeX RDF	non-linear analogue detection, embedded system, measuring methods
29	Nasser Kamiss Al-Ani, Noor Aldin Addel, Laith Khalid Kharbully	Time-Varying Cellular Neural Networks Analogue Realization.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	Analogue Realization, CNN, Parallel System
28	Dinesh Kumar, Frédéric Ayant, Norbert Südland, Junesang Choi	Certain q-Analogue of Fractional Integrals and Derivatives Involving Basic Analogue of the Several Variable Aleph-Function.	Axioms	2023	DBLP DOI BibTeX RDF
28	Li Dong 0007, Yan Song, Bing Zhang, Zhechong Lan, Youze Xin, Liheng Liu, Ken Li, Xiaofei Wang, Li Geng	Theoretical total harmonic distortion evaluation based on digital to analogue converter mismatch to improve the linearity of successive approximation register analogue to digital converter.	IET Circuits Devices Syst.	2022	DBLP DOI BibTeX RDF
28	Michelle Lindlar, Merle Friedrich, Miriam Reiche	When Digital Remembers Analogue - Conservation Metadata for Analogue Film as Preservation Description Information in a Digital Archive.	iPRES	2021	DBLP BibTeX RDF
28	Hesham H. Aly, Abdel Hamid Soliman, Mansour Mouniri	Analogue to information converter design using analogue chua circuit for IoT devices.	ICC	2017	DBLP DOI BibTeX RDF
28	Seyed Reza Abdollahi, Hamed S. Al-Raweshidy, Sied Mehdi Fakhraie, Rajagopal Nilavalan	All photonic analogue to digital and digital to analogue conversion techniques for digital radio over fibre system applications.	Kaleidoscope	2010	DBLP BibTeX RDF
28	Pasquale Arpaia, Allan Belcher	Applications and techniques for advanced analogue to digital and digital to analogue converters.	Comput. Stand. Interfaces	2001	DBLP DOI BibTeX RDF
28	Hans A. R. Manhaeve, Johan Verfaillie, B. Straka, J. P. Cornil	Application of Supply Current Testing to Analogue Circuits, Towards a Structural Analogue Test Methodology.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	supply current test, I DD, I DDX monitor, analog test, structural test, mixed-signal test, current monitor
28	Hans A. R. Manhaeve, Johan Verfaillie, B. Straka, J. P. Cornil	Application of supply current testing to analogue circuits, towards a structural analogue test methodology.	ETW	1999	DBLP DOI BibTeX RDF
28	Georges G. E. Gielen, Geert Debyser, Koen Lampaert, Francky Leyn, Koen Swings, Geert Van der Plas, Willy Sansen, Domine Leenaerts, Petar Veselinovic, W. van Bokhoven	An analogue module generator for mixed analogue/digital asic design.	Int. J. Circuit Theory Appl.	1995	DBLP DOI BibTeX RDF
26	Markus Reis	Long-time Preservation.	Semantic Digital Libraries	2009	DBLP DOI BibTeX RDF
26	Frédéric Magniez, Ashwin Nayak 0001, Peter C. Richter, Miklos Santha	On the hitting times of quantum versus random walks.	SODA	2009	DBLP DOI BibTeX RDF
26	Vinaye Armoogum, K. M. S. Soyjaudah, A. Jugurnauth, Nawaz Mohamudally 0001, Terence C. Fogarty	Adjacent Channel Interference for DVB-T at UHF Bands in the South of Mauritius for Summer Season.	AICT	2007	DBLP DOI BibTeX RDF	Carrier to Noise ratio, Channel Interference, COFDM, Field Strength, Power Ratio, Bit Error Rate, Path Loss, PAL, DVB-T, DTT
26	Peter König, Norbert Krüger	Symbols as Self-emergent Entities in an Optimization Process of Feature Extraction and Predictions.	Biol. Cybern.	2006	DBLP DOI BibTeX RDF
26	Hashem Zare-Hoseini, Izzet Kale	Continuous time delta sigma modulators with reduced clock jitter sensitivity.	ISCAS	2006	DBLP DOI BibTeX RDF
26	Yolanda Lechuga, Román Mozuelos, Miguel Angel Allende, Mar Martínez, Salvador Bracho	Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	transient current test, fault detection, built-in current sensor, supply current monitoring
26	Britta Schinzel	Computer Science between Symbolic Representation and Open Construction.	Logic versus Approximation	2004	DBLP DOI BibTeX RDF
26	Thomas O'Shea, Ian Andrew Grout	A Matlab Based On-Chip Signal Generation and Analysis Environment for Mixed Signal Circuits.	IOLTS	2004	DBLP DOI BibTeX RDF
26	Salvador Mir, Libor Rufer, Bernard Courtois	On-chip testing of embedded transducers.	VLSI Design	2004	DBLP DOI BibTeX RDF	failure mechanisms, A-HDL, fault modeling, fault simulation, defects, MEMS, self-test
26	Stuart Colsell, Reuben Edwards	Adaptive Real-Time Systems and the FPAA.	FPL	2003	DBLP DOI BibTeX RDF
26	Mehdi Rostami, João Tavares 0004, Antonio Navarro 0002	Multi-Decoder Digital Television Platform.	EUROMICRO	2002	DBLP DOI BibTeX RDF	Tools and Applications, Multimedia Systems, Digital Television
26	S. Jankovic, A. H. C. Chan, G. H. Little, Lubo Jankovic	Visualisation of a Simple Beam under a Load in Virtual Environment.	IV	2001	DBLP DOI BibTeX RDF
24	Daniel Natapov, Steven J. Castellucci, I. Scott MacKenzie	ISO 9241-9 evaluation of video game controllers.	Graphics Interface	2009	DBLP BibTeX RDF	Fitts' task, analogue stick, video game controller, performance comparison, infrared, target acquisition, Wiimote
24	Paul van Schaik, Jonathan Ling	Design parameters of rating scales for web sites.	ACM Trans. Comput. Hum. Interact.	2007	DBLP DOI BibTeX RDF	Likert scale, online questionnaires, questionnaire layout, response format, visual analogue scale, Human-computer interaction, web site, screen design, psychometrics, interaction mechanism
24	Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda	Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS.	SBCCI	2007	DBLP DOI BibTeX RDF	analogue-to-digital converter, background (on-line) calibration, capacitor swapping technique, foreground (off-line) calibration, adaptive system, pipeline ADC
24	Miha Ciglar	Tastes like...	ACM Multimedia	2005	DBLP DOI BibTeX RDF	analogue oscillations, imperfection, interaction, transformation, feedback, conduction, resistance
24	Sang Hyun Park, So Hee Won, Jong Bong Lee, Sung Woo Kim	Smart home - digitally engineered domestic life.	Pers. Ubiquitous Comput.	2003	DBLP DOI BibTeX RDF	Digitally engineering analogue home life, Automation, Smart Home
24	Mohammad A. Naal, Emmanuel Simeu, Salvador Mir	On-Line Testable Decimation Filter Design for AMS Systems.	IOLTS	2003	DBLP DOI BibTeX RDF	non-concurrent, semi-concurrent, SigmaDelta, decimation filters, analogue BIST, on-line testing