Search results for "BDD"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
98	Shin-ichi Minato	Streaming BDD Manipulation.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	algorithm, verification, testing, data structure, logic design, binary decision diagram, BDD, combinatorial problem, VLSI CAD
89	Frank Reffel	BDD-Nodes Can Be More Expressive.	ASIAN	1999	DBLP DOI BibTeX RDF
80	Lei Cheng 0001, Deming Chen, Martin D. F. Wong	DDBDD: Delay-Driven BDD Synthesis for FPGAs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
80	Lei Cheng 0001, Deming Chen, Martin D. F. Wong	DDBDD: Delay-Driven BDD Synthesis for FPGAs.	DAC	2007	DBLP DOI BibTeX RDF
72	Rasa Remenyte, John D. Andrews	A Simple Component Connection Approach for Fault Tree Conversion to Binary Decision Diagram.	ARES	2006	DBLP DOI BibTeX RDF
71	Matthias Krause 0001, Dirk Stegemann	Reducing the Space Complexity of BDD-Based Attacks on Keystream Generators.	FSE	2006	DBLP DOI BibTeX RDF	Bluetooth E0, GSM A5/1, cryptanalysis, Stream cipher, BDD, self-shrinking generator
71	Yanyan Xu 0001, Weiya Yue, Kaile Su	The BDD-Based Dynamic A* Algorithm for Real-Time Replanning.	FAW	2009	DBLP DOI BibTeX RDF
71	Ronnie L. Wright, Michael A. Shanblatt	Reducing BDD Size by Exploiting Structural Connectivity.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
70	Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya	On finding the minimum test set of a BDD-based circuit.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	binary decision diagram (BDD), multiplexors, network flow, stuck-at faults, VLSI testing
63	Dragan Jankovic, Radomir S. Stankovic, Rolf Drechsler	Decision Diagram Method for Calculation of Pruned Walsh Transform.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	Walsh, pruned spectrum, Logic synthesis, BDD, spectral techniques
62	Tsutomu Sasao, Munehiro Matsuura	BDD representation for incompletely specifiedvmultiple-output logic functions and its applications to functional decomposition.	DAC	2005	DBLP DOI BibTeX RDF	code converter, BDD, cascade, characteristic function, incompletely specified function
62	Andrei Rimsa, Luis E. Zárate, Mark A. J. Song	Evaluation of Different BDD Libraries to Extract Concepts in FCA - Perspectives and Limitations.	ICCS (1)	2009	DBLP DOI BibTeX RDF	Zero-Supressed Binary Decision Diagrams, Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept
62	Zhihua Tang, Joanne Bechta Dugan	BDD-based reliability analysis of phased-mission systems with multimode failures.	IEEE Trans. Reliab.	2006	DBLP DOI BibTeX RDF
62	William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Michael A. Driscoll	BDD minimization by scatter search.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
61	Xinyu Zang, Dazhi Wang, Hairong Sun, Kishor S. Trivedi	A BDD-Based Algorithm for Analysis of Multistate Systems with Multistate Components.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Binary Decision Diagram (BDD), multistate component, multistate fault tree, multistate system, blocking probability
54	Chung-Hung Lai, Tien-Fu Chen	Compressing inverted files in scalable information systems by binary decision diagram encoding .	SC	2001	DBLP DOI BibTeX RDF	scalable information systems, information retrieval, BDD, inverted file
54	Seiichiro Tani, Kiyoharu Hamaguchi, Shuzo Yajima	The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams.	ISAAC	1993	DBLP DOI BibTeX RDF
53	Dirk Stegemann	Extended BDD-Based Cryptanalysis of Keystream Generators.	Selected Areas in Cryptography	2007	DBLP DOI BibTeX RDF	F-FCSR, cryptanalysis, Stream cipher, BDD, Trivium, Grain
53	Ziv Nevo, Monica Farkash	Distributed dynamic BDD reordering.	DAC	2006	DBLP DOI BibTeX RDF	model checking, distributed computing, BDD, reordering
53	Farn Wang	Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures.	CAV	2004	DBLP DOI BibTeX RDF	model-checking, verification, data-structures, BDD, hybrid automata
53	Farn Wang	Efficient Verification of Timed Automata with BDD-Like Data-Structures.	VMCAI	2003	DBLP DOI BibTeX RDF	model-checking, verification, data-structures, timed automata, BDD
53	Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal	BDD Decomposition for Efficient Logic Synthesis.	ICCD	1999	DBLP DOI BibTeX RDF	Decomposition, Logic Synthesis, BDD, Dominators
53	Avi Yadgar, Orna Grumberg, Assaf Schuster	Hybrid BDD and All-SAT Method for Model Checking.	Languages: From Formal to Natural	2009	DBLP DOI BibTeX RDF
53	Toru Akishita, Masanobu Katagi, Yoshikazu Miyato, Asami Mizuno, Kyoji Shibutani	A Practical DPA Countermeasure with BDD Architecture.	CARDIS	2008	DBLP DOI BibTeX RDF	dual-rail pre-charge logic, DPA, Binary Decision Diagram, countermeasure
53	Dirk Beyer 0001	Improvements in BDD-Based Reachability Analysis of Timed Automata.	FME	2001	DBLP DOI BibTeX RDF	Real-time systems, Formal verification, Timed automata, BDDs, Discretization
53	Michael Baldamus, Klaus Schneider 0001	The BDD Space Complexity of Different Forms of Concurrency.	ACSD	2001	DBLP DOI BibTeX RDF
45	Ildefonso Montero, Joaquín Peña, Antonio Ruiz Cortés	Representing Runtime Variability in Business-Driven Development Systems.	ICCBSS	2008	DBLP DOI BibTeX RDF	Runtime Variability, Modeling business processes, BDD
45	Guoqing Xu 0001, Atanas Rountev	Merging equivalent contexts for scalable heap-cloning-based context-sensitive points-to analysis.	ISSTA	2008	DBLP DOI BibTeX RDF	pointer analysis, context sensitivity, points-to analysis
45	Yi-Kai Liu 0001, Vadim Lyubashevsky, Daniele Micciancio	On Bounded Distance Decoding for General Lattices.	APPROX-RANDOM	2006	DBLP DOI BibTeX RDF
45	Dazhi Wang, Kishor S. Trivedi	Computing steady-state mean time to failure for non-coherent repairable systems.	IEEE Trans. Reliab.	2005	DBLP DOI BibTeX RDF
45	Pascal Fontaine, E. Pascal Gribomont	Using BDDs with Combinations of Theories.	LPAR	2002	DBLP DOI BibTeX RDF
45	Gianpiero Cabodi	Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions.	CAV	2001	DBLP DOI BibTeX RDF
45	Congguang Yang, Maciej J. Ciesielski	Synthesis for Mixed CMOS/PTl Logic.	DATE	2000	DBLP DOI BibTeX RDF
44	Farn Wang	Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures.	IEEE Trans. Software Eng.	2005	DBLP DOI BibTeX RDF	model-checking, verification, Data-structures, BDD, hybrid automata
44	Farn Wang	Efficient verification of timed automata with BDD-like data structures.	Int. J. Softw. Tools Technol. Transf.	2004	DBLP DOI BibTeX RDF	Model checking, Verification, Data structures, Timed automata, BDD
44	Navin Vemuri, Priyank Kalla, Russell Tessier	BDD-based logic synthesis for LUT-based FPGAs.	ACM Trans. Design Autom. Electr. Syst.	2002	DBLP DOI BibTeX RDF	FPGA, decomposition, logic synthesis, BDD
44	Justin E. Harlow III, Franc Brglez	Design of experiments and evaluation of BDD ordering heuristics.	Int. J. Softw. Tools Technol. Transf.	2001	DBLP DOI BibTeX RDF	Benchmarking, BDD, Design of experiments
44	Wei Zhang 0004, Hua Yan, Haiyan Zhao, Zhi Jin	A BDD-Based Approach to Verifying Clone-Enabled Feature Models' Constraints and Customization.	ICSR	2008	DBLP DOI BibTeX RDF	Clonable features, Verification, Constraints, Customization, Feature models
44	Florian Pigorsch, Christoph Scholl 0001, Stefan Disch	Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling.	FMCAD	2006	DBLP DOI BibTeX RDF
44	Rupesh S. Shelar, Sachin S. Sapatnekar	BDD decomposition for delay oriented pass transistor logic synthesis.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
44	Rüdiger Ebendt, Rolf Drechsler	Quasi-Exact BDD Minimization Using Relaxed Best-First Search.	ISVLSI	2005	DBLP DOI BibTeX RDF
44	Veronika Ortner, Norbert Schirmer	Verification of BDD Normalization.	TPHOLs	2005	DBLP DOI BibTeX RDF
44	Jean-Michel Couvreur	A BDD-Like Implementation of an Automata Package.	CIAA	2004	DBLP DOI BibTeX RDF
44	Gilles Audemard, Lakhdar Sais	SAT Based BDD Solver for Quantified Boolean Formulas.	ICTAI	2004	DBLP DOI BibTeX RDF
44	Amit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz	A high-performance architecture and BDD-based synthesis methodology for packet classification.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
44	Dirk Beyer 0001, Claus Lewerentz, Andreas Noack	Rabbit: A Tool for BDD-Based Verification of Real-Time Systems.	CAV	2003	DBLP DOI BibTeX RDF
44	Guoqiang Pan, Moshe Y. Vardi	Optimizing a BDD-Based Modal Solver.	CADE	2003	DBLP DOI BibTeX RDF
44	Congguang Yang, Maciej J. Ciesielski	BDS: a BDD-based logic optimization system.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
44	Per Lindgren, Mikael Kerttu, Mitchell A. Thornton, Rolf Drechsler	Low power optimization technique for BDD mapped circuits.	ASP-DAC	2001	DBLP DOI BibTeX RDF
44	Christoph Meinel, Harald Sack, Arno Wagner	WWW.BDD-Portal.ORG: An Experimentation Platform for Binary Decision Diagram Algorithms.	Experimental Algorithmics	2000	DBLP DOI BibTeX RDF
44	Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang	A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm.	DATE	2000	DBLP DOI BibTeX RDF
44	Tevfik Bultan	BDD vs. Constraint-Based Model Checking: An Experimental Evaluation for Asynchronous Concurrent Systems.	TACAS	2000	DBLP DOI BibTeX RDF
44	Kenneth Y. Yun, Bill Lin 0001, David L. Dill, Srinivas Devadas	BDD-based synthesis of extended burst-mode controllers.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
44	Kim Milvang-Jensen, Alan J. Hu	BDDNOW: A Parallel BDD Package.	FMCAD	1998	DBLP DOI BibTeX RDF
44	Bwolen Yang, Randal E. Bryant, David R. O'Hallaron, Armin Biere, Olivier Coudert, Geert Janssen, Rajeev K. Ranjan 0001, Fabio Somenzi	A Performance Study of BDD-Based Model Checking.	FMCAD	1998	DBLP DOI BibTeX RDF
44	Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich	Don't Care-Based BDD Minimization for Embedded Software.	DAC	1998	DBLP DOI BibTeX RDF	low power, synthesis, placement, flip-flops, voltage scaling, codec, MPEG4, level converters, design automatian
44	Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan	Safe BDD Minimization Using Don't Cares.	DAC	1997	DBLP DOI BibTeX RDF
43	Liudong Xing, Joanne Bechta Dugan	Comments on PMS BDD generation in 'A BDD-based algorithm for Reliability Analysis of phased-mission systems'.	IEEE Trans. Reliab.	2004	DBLP DOI BibTeX RDF
36	Felipe Machado, Teresa Riesgo, Yago Torroja	Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level.	PATMOS	2008	DBLP DOI BibTeX RDF	activity estimation, CAD, VHDL, BDD, power estimation, RTL, Switching activity, circuit partition, digital circuit design
36	Yaniv Shaked, Avishai Wool	Cryptanalysis of the Bluetooth E0 Cipher Using OBDD's.	ISC	2006	DBLP DOI BibTeX RDF	Cryptanalysis, Stream cipher, Bluetooth, BDD
36	Jon T. Butler, Tsutomu Sasao, Munehiro Matsuura	Average Path Length of Binary Decision Diagrams.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	average path length, worst-case path length, APL, Binary decision diagrams, BDD
36	Tsutomu Sasao, Munehiro Matsuura	A method to decompose multiple-output logic functions.	DAC	2004	DBLP DOI BibTeX RDF	FPGA, BDD, cascade, characteristic function
36	Wolfgang Günther 0001, Rolf Drechsler	Linear Transformations and Exact Minimization of BDDs.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	FPGA, synthesis, BDD, linear transformation, variable ordering, spectral transformation
36	Yung-Chih Chen, Chun-Yao Wang	An Implicit Approach to Minimizing Range-Equivalent Circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
36	Dazhi Wang, Kishor S. Trivedi	Reliability Analysis of Phased-Mission System With Independent Component Repairs.	IEEE Trans. Reliab.	2007	DBLP DOI BibTeX RDF
36	Jean-Michel Couvreur, Yann Thierry-Mieg	Hierarchical Decision Diagrams to Exploit Model Structure.	FORTE	2005	DBLP DOI BibTeX RDF
36	Rüdiger Ebendt, Wolfgang Günther 0001, Rolf Drechsler	Minimization of the expected path length in BDDs based on local changes.	ASP-DAC	2004	DBLP DOI BibTeX RDF
36	Mohammad Awedh, Fabio Somenzi	Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States.	FMCAD	2004	DBLP DOI BibTeX RDF
36	Marc Berndl, Ondrej Lhoták, Feng Qian, Laurie J. Hendren, Navindra Umanee	Points-to analysis using BDDs.	PLDI	2003	DBLP DOI BibTeX RDF	binary decision diagrams, points-to analysis
36	Gianpiero Cabodi, Paolo Camurati, Stefano Quer	Can BDDs compete with SAT solvers on bounded model checking?	DAC	2002	DBLP DOI BibTeX RDF	model checking, formal verification, SAT, BDDs
36	Viresh Paruthi, Andreas Kuehlmann	Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation.	ICCD	2000	DBLP DOI BibTeX RDF
36	E. Allen Emerson, Richard J. Trefler	From Asymmetry to Full Symmetry: New Techniques for Symmetry Reduction in Model Checking.	CHARME	1999	DBLP DOI BibTeX RDF
36	Chia-Pin R. Liu, Jacob A. Abraham	Transistor Level Synthesis for Static CMOS Combinational Circuits.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
36	Henrik Reif Andersen, Henrik Hulgaard	Boolean Expression Diagrams (Extended Abstract).	LICS	1997	DBLP DOI BibTeX RDF
36	Kenneth L. McMillan	Hierarchical Representations of Discrete Functions, with Application to Model Checking.	CAV	1994	DBLP DOI BibTeX RDF
35	Markus Behle	On threshold BDDs and the optimal variable ordering problem.	J. Comb. Optim.	2008	DBLP DOI BibTeX RDF	Threshold BDD, 0/1 integer programming, Optimal variable ordering, Variable ordering spectrum, Binary decision diagram, Knapsack
35	P. W. Chandana Prasad, Ali Assi 0001, Azam Beg	Binary Decision Diagrams and neural networks.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	BDD complexity, Neural network, Binary decision diagrams, Complexity estimation
35	Robert Wille, Rolf Drechsler	BDD-based synthesis of reversible logic for large functions.	DAC	2009	DBLP DOI BibTeX RDF	synthesis, decision diagrams, reversible logic, quantum logic
35	Ralf Wimmer 0001, Marc Herbstritt, Bernd Becker 0001	Optimization techniques for BDD-based bisimulation computation.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	binary decision diagrams, bisimulation, state space reduction, state space explosion, symbolic methods
35	Rüdiger Ebendt, Rolf Drechsler	Effect of improved lower bounds in dynamic BDD reordering.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
35	Gianpiero Cabodi, Marco Murciano	BDD-Based Hardware Verification.	SFM	2006	DBLP DOI BibTeX RDF
35	Weiya Yue, Yanyan Xu 0001, Kaile Su	BDDRPA*: An Efficient BDD-Based Incremental Heuristic Search Algorithm for Replanning.	Australian Conference on Artificial Intelligence	2006	DBLP DOI BibTeX RDF
35	Dennis Wu, Jianwen Zhu	BDD-based two variable sharing extraction.	ASP-DAC	2005	DBLP DOI BibTeX RDF
35	Rüdiger Ebendt, Rolf Drechsler	Lower bounds for dynamic BDD reordering.	ASP-DAC	2005	DBLP DOI BibTeX RDF
35	Yen-Tai Lai, Yung-Chuan Jiang, Hong-Ming Chu	BDD decomposition for mixed CMOS/PTL logic circuit synthesis.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
35	Görschwin Fey, Junhao Shi, Rolf Drechsler	BDD Circuit Optimization for Path Delay Fault Testability.	DSD	2004	DBLP DOI BibTeX RDF
35	Jean Vuillemin, Frédéric Béal	On the BDD of a Random Boolean Function.	ASIAN	2004	DBLP DOI BibTeX RDF
35	Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain, Christian Stangier, Amit Narayan, David L. Dill, E. Allen Emerson	A Partitioning Methodology for BDD-Based Verification.	FMCAD	2004	DBLP DOI BibTeX RDF
35	Yung-Ruei Chang, Hung-Yau Lin, Sy-Yen Kuo	Reliability Evaluation of Dependable Distributed Computing Systems Based on Recursive Merge and BDD.	PRDC	2004	DBLP DOI BibTeX RDF
35	Gianpiero Cabodi, Sergio Nocco, Stefano Quer	Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals.	DATE	2003	DBLP DOI BibTeX RDF
35	Geert Janssen	A Consumer Report on BDD Packages.	SBCCI	2003	DBLP DOI BibTeX RDF
35	Rüdiger Ebendt	Reducing the number of variable movements in exact BDD minimization.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
35	Gianpiero Cabodi, Sergio Nocco, Stefano Quer	Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification.	CAV	2002	DBLP DOI BibTeX RDF
35	Sava Krstic, John Matthews	Verifying BDD Algorithms through Monadic Interpretation.	VMCAI	2002	DBLP DOI BibTeX RDF
35	Alessandro Cimatti, Enrico Giunchiglia, Marco Pistore, Marco Roveri, Roberto Sebastiani, Armando Tacchella	Integrating BDD-Based and SAT-Based Symbolic Model Checking.	FroCoS	2002	DBLP DOI BibTeX RDF
35	Congguang Yang, Maciej J. Ciesielski, Vigyan Singhal	BDS: a BDD-based logic optimization system.	DAC	2000	DBLP DOI BibTeX RDF
35	Gianpiero Cabodi, Paolo Camurati, Stefano Quer	Improving the efficiency of BDD-based operators by means of partitioning.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
35	Justin E. Harlow III, Franc Brglez	Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations.	FMCAD	1998	DBLP DOI BibTeX RDF
34	Yanyan Xu, Weiya Yue	A Generalized Framework for BDD-based Replanning A* Search.	SNPD	2009	DBLP DOI BibTeX RDF	BDD-based search, heuristic search-based planning, A*, replanning, incremental search
34	Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli	Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits.	DATE	2013	DBLP DOI BibTeX RDF