Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
88 | Wolfgang Günther 0001, Rolf Drechsler |
Efficient manipulation algorithms for linearly transformed BDDs. |
ICCAD |
1999 |
DBLP DOI BibTeX RDF |
|
78 | Ulrich Kühne, Nicole Drechsler |
Finding Compact BDDs Using Genetic Programming. |
EvoWorkshops |
2006 |
DBLP DOI BibTeX RDF |
|
78 | Marc Berndl, Ondrej Lhoták, Feng Qian, Laurie J. Hendren, Navindra Umanee |
Points-to analysis using BDDs. |
PLDI |
2003 |
DBLP DOI BibTeX RDF |
binary decision diagrams, points-to analysis |
78 | Anuchit Anuchitanukul, Zohar Manna, Tomás E. Uribe |
Differential BDDs. |
Computer Science Today |
1995 |
DBLP DOI BibTeX RDF |
|
78 | Aarti Gupta, Pranav Ashar |
Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
ATPG techniques, circuit similarity, formal verification, combinational circuits, Boolean satisfiability (SAT), combinational equivalence checking, Binary Decision Diagrams (BDDs) |
69 | Rüdiger Ebendt, Rolf Drechsler |
On the sensitivity of BDDs with respect to path-related objective functions. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
69 | In-Ho Moon, Carl Pixley |
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders. |
FMCAD |
2004 |
DBLP DOI BibTeX RDF |
|
68 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Can BDDs compete with SAT solvers on bounded model checking? |
DAC |
2002 |
DBLP DOI BibTeX RDF |
model checking, formal verification, SAT, BDDs |
59 | Graham D. Price, Manish Vachharajani |
Large program trace analysis and compression with ZDDs. |
CGO |
2010 |
DBLP DOI BibTeX RDF |
parallel programming, trace compression |
59 | Andrei Rimsa, Luis E. Zárate, Mark A. J. Song |
Handling Large Formal Context Using BDD - Perspectives and Limitations. |
ICFCA |
2009 |
DBLP DOI BibTeX RDF |
Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept |
59 | Rolf Drechsler, Görschwin Fey, Sebastian Kinder |
An Integrated Approach for Combining BDD and SAT Provers. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
|
59 | Rajeev K. Ranjan 0001, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Binary decision diagrams on network of workstation. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
memory resources, breadth-first technique, verification, Boolean functions, synthesis, binary decision diagram, network of workstations |
59 | Graham D. Price, Manish Vachharajani |
A Case for Compressing Traces with BDDs. |
IEEE Comput. Archit. Lett. |
2006 |
DBLP DOI BibTeX RDF |
|
59 | Shin-ichi Minato, Hiroki Arimura |
Efficient Method of Combinatorial Item Set Analysis Based on Zero-Suppressed BDDs. |
WIRI |
2005 |
DBLP DOI BibTeX RDF |
|
59 | Jaco Geldenhuys, Antti Valmari |
Techniques for Smaller Intermediary BDDs. |
CONCUR |
2001 |
DBLP DOI BibTeX RDF |
|
59 | Jer-Sheng Chen, Prithviraj Banerjee |
Parallel construction algorithms for BDDs. |
ISCAS (1) |
1999 |
DBLP DOI BibTeX RDF |
|
59 | Reinhard Enders, Thomas Filkorn, Dirk Taubner |
Generating BDDs for Symbolic Model Checking in CCS. |
CAV |
1991 |
DBLP DOI BibTeX RDF |
|
58 | Leomar S. da Rosa Jr., Felipe S. Marques 0001, Tiago Muller Gil Cardoso, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis |
Fast disjoint transistor networks from BDDs. |
SBCCI |
2006 |
DBLP DOI BibTeX RDF |
PTL, unateness, BDDs, switch theory, CMOS gates |
58 | Edmund M. Clarke, Somesh Jha, Yuan Lu 0004, Dong Wang |
Abstract BDDs: A Technique for Using Abstraction in Model Checking. |
CHARME |
1999 |
DBLP DOI BibTeX RDF |
Abstract BDDs, Model checking and abstraction |
58 | Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda |
An improved data parallel algorithm for Boolean function manipulation using BDDs. |
PDP |
1995 |
DBLP DOI BibTeX RDF |
Boolean function manipulation, parallel algorithms, parallel algorithm, Boolean functions, Binary Decision Diagrams, BDDs, SIMD architectures, CPU time, data parallel algorithm |
58 | Jawahar Jain, James R. Bitner, Magdy S. Abadir, Jacob A. Abraham, Donald S. Fussell |
Indexed BDDs: Algorithmic Advances in Techniques to Represent and Verify Boolean Functions. |
IEEE Trans. Computers |
1997 |
DBLP DOI BibTeX RDF |
free BDDs, IBDDs, verification, Boolean functions, satisfiability, BDDs, graph representations, OBDDs, canonical representations |
57 | Ingo Wegener |
Comments on "A Characterization of Binary Decision Diagrams". |
IEEE Trans. Computers |
1994 |
DBLP DOI BibTeX RDF |
EXOR gates, NEXOR gates, free BDDs, ordered BDDs, repeated BDDs, computational complexity, complexity, Boolean functions, binary decision diagrams, decision tables, combinatorial circuits |
49 | Michael Glaß, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich |
Towards scalable system-level reliability analysis. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
SAT-assisted simulation, early quantification, reliability analysis |
49 | Ondrej Lhoták, Stephen Curial, José Nelson Amaral |
Using ZBDDs in Points-to Analysis. |
LCPC |
2007 |
DBLP DOI BibTeX RDF |
|
49 | Frank Reffel |
BDD-Nodes Can Be More Expressive. |
ASIAN |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Chia-Pin R. Liu, Jacob A. Abraham |
Transistor Level Synthesis for Static CMOS Combinational Circuits. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Nils Klarlund |
An n log n Algorithm for Online BDD Refinement. |
CAV |
1997 |
DBLP DOI BibTeX RDF |
|
49 | Taisuke Sato |
Statistical Learning of Probabilistic BDDs. |
SAGA |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Constantinos Bartzis, Tevfik Bultan |
Efficient BDDs for bounded arithmetic constraints. |
Int. J. Softw. Tools Technol. Transf. |
2006 |
DBLP DOI BibTeX RDF |
Model checking, BDD, Integer arithmetic, SMV |
49 | Rüdiger Ebendt, Wolfgang Günther 0001, Rolf Drechsler |
Minimization of the expected path length in BDDs based on local changes. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
|
49 | Constantinos Bartzis, Tevfik Bultan |
Construction of Efficient BDDs for Bounded Arithmetic Constraints. |
TACAS |
2003 |
DBLP DOI BibTeX RDF |
|
49 | Gianpiero Cabodi |
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions. |
CAV |
2001 |
DBLP DOI BibTeX RDF |
|
49 | Wolfgang Günther 0001, Andreas Hett, Bernd Becker 0001 |
Application of linearly transformed BDDs in sequential verification. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
49 | Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Yunshan Zhu |
Symbolic Model Checking without BDDs. |
TACAS |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Justin E. Harlow III, Franc Brglez |
Mirror, mirror, on the wall...is the new release any different at all? [BDDs]. |
ISCAS (6) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Srilatha Manne, Dirk Grunwald, Fabio Somenzi |
Remembrance of Things Past: Locality and Memory in BDDs. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
49 | Alan J. Hu, David L. Dill |
Efficient Verification with BDDs using Implicitly Conjoined Invariants. |
CAV |
1993 |
DBLP DOI BibTeX RDF |
|
49 | Alan J. Hu, David L. Dill, Andreas J. Drexler, C. Han Yang |
Higher-Level Specification and Verification with BDDs. |
CAV |
1992 |
DBLP DOI BibTeX RDF |
|
49 | Mats Per Erik Heimdahl, Barbara J. Czerny |
Using PVS to analyze hierarchical state-based requirements for completeness and consistency. |
HASE |
1996 |
DBLP DOI BibTeX RDF |
hierarchical state based requirements specifications, input sequence, analysis procedures, large real world requirements specification, hierarchical state based language, Requirements State Machine Language, Prototype Verification System, theorem proving component, spurious error reports, formal specifications, robustness, consistency, program verification, completeness, Binary Decision Diagrams, BDDs, PVS, interactive environment, formal proofs, RSML |
49 | Will Marrero |
Using BDDs to Decide CTL. |
TACAS |
2005 |
DBLP DOI BibTeX RDF |
validity, satisfiability, BDDs, CTL, tableau |
39 | Ondrej Lhoták, Laurie J. Hendren |
Relations as an abstraction for BDD-based program analysis. |
ACM Trans. Program. Lang. Syst. |
2008 |
DBLP DOI BibTeX RDF |
Boolean formula satisfiability, physical domain assignment, Java, program analysis, Binary decision diagrams, language design, relations, points-to analysis |
39 | Gianpiero Cabodi, Marco Murciano |
BDD-Based Hardware Verification. |
SFM |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Viresh Paruthi, Christian Jacobi 0002, Kai Weber 0001 |
Efficient Symbolic Simulation via Dynamic Scheduling, Don't Caring, and Case Splitting. |
CHARME |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Jean-Michel Couvreur |
A BDD-Like Implementation of an Automata Package. |
CIAA |
2004 |
DBLP DOI BibTeX RDF |
|
39 | Ondrej Lhoták, Laurie J. Hendren |
Jedd: a BDD-based relational extension of Java. |
PLDI |
2004 |
DBLP DOI BibTeX RDF |
boolean formula satisfiability, Java, program analysis, binary decision diagrams, language design, relations |
39 | Rolf Drechsler, Detlef Sieling |
Binary decision diagrams in theory and practice. |
Int. J. Softw. Tools Technol. Transf. |
2001 |
DBLP DOI BibTeX RDF |
data structure, Boolean function, Binary decision diagram, VLSI CAD, Branching program |
39 | Jan Friso Groote, Hans Zantema |
Resolution and Binary Decision Diagrams Cannot Simulate Each Other Polynomially. |
Ershov Memorial Conference |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
Sibling-substitution-based BDD minimization using don't cares. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Aarti Gupta, Zijiang Yang 0006, Pranav Ashar, Anubhav Gupta 0001 |
SAT-Based Image Computation with Application in Reachability Analysis. |
FMCAD |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Per Bjesse, Koen Claessen |
SAT-Based Verification without State Space Traversal. |
FMCAD |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
Safe BDD Minimization Using Don't Cares. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
39 | Mikko Tiusanen |
Symbolic, Symmetry, and Stubborn Set Searches. |
Application and Theory of Petri Nets |
1994 |
DBLP DOI BibTeX RDF |
|
39 | Markus Behle |
On threshold BDDs and the optimal variable ordering problem. |
J. Comb. Optim. |
2008 |
DBLP DOI BibTeX RDF |
Threshold BDD, 0/1 integer programming, Optimal variable ordering, Variable ordering spectrum, Binary decision diagram, Knapsack |
39 | Shin-ichi Minato |
A Theoretical Study on Variable Ordering of Zero-Suppressed BDDs for Representing Frequent Itemsets. |
Discovery Science |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Markus Behle |
On Threshold BDDs and the Optimal Variable Ordering Problem. |
COCOA |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Roberto Cavada, Alessandro Cimatti, Anders Franzén, Krishnamani Kalyanasundaram, Marco Roveri, R. K. Shyamasundar |
Computing Predicate Abstractions by Integrating BDDs and SMT Solvers. |
FMCAD |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Görschwin Fey, Rolf Drechsler |
Minimizing the number of paths in BDDs: Theory and algorithm. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Shin-ichi Minato |
Symmetric Item Set Mining Based on Zero-Suppressed BDDs. |
Discovery Science |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Carsten Sinz, Armin Biere |
Extended Resolution Proofs for Conjoining BDDs. |
CSR |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Bernd Becker 0001, Markus Behle, Friedrich Eisenbrand, Ralf Wimmer 0001 |
BDDs in a Branch and Cut Framework. |
WEA |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Renato E. B. Poli, Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis |
Unified Theory to Build Cell-Level Transistor Networks from BDDs. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
|
39 | Robert F. Damiano, James H. Kukula |
Checking satisfiability of a conjunction of BDDs. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
satisfiability, BDD |
39 | Pascal Fontaine, E. Pascal Gribomont |
Using BDDs with Combinations of Theories. |
LPAR |
2002 |
DBLP DOI BibTeX RDF |
|
39 | Henrik Brosenne, Matthias Homeister, Stephan Waack |
Graph-Driven Free Parity BDDs: Algorithms and Lower Bounds. |
MFCS |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Wolfgang Günther 0001, Rolf Drechsler |
Implementation of Read- k-times BDDs on Top of Standard BDD Packages. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Martin Sauerhoff |
An Improved Hierarchy Result for Partitioned BDDs. |
Theory Comput. Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Kumar Neeraj Verma, Jean Goubault-Larrecq, Sanjiva Prasad, S. Arun-Kumar |
Reflecting BDDs in Coq. |
ASIAN |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Wolfgang Günther 0001, Rolf Drechsler |
Minimization of Free BDDs. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
39 | Jun Yuan 0007, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz |
Modeling design constraints and biasing in simulation using BDDs. |
ICCAD |
1999 |
DBLP DOI BibTeX RDF |
|
39 | Jean Goubault, Joachim Posegga |
BDDs and Automated Deduction. |
ISMIS |
1994 |
DBLP DOI BibTeX RDF |
|
39 | Detlef Sieling, Ingo Wegener |
A Comparison of Free BDDs and Transformed BDDs. |
Formal Methods Syst. Des. |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Tomohiro Yoneda, Hideyuki Hatori, Atsushi Takahara, Shin-ichi Minato |
BDDs vs. Zero-Suppressed BDDs: for CTL Symbolic Model Checking of Petri Nets. |
FMCAD |
1996 |
DBLP DOI BibTeX RDF |
|
39 | Dirk Beyer 0001 |
Improvements in BDD-Based Reachability Analysis of Timed Automata. |
FME |
2001 |
DBLP DOI BibTeX RDF |
Real-time systems, Formal verification, Timed automata, BDDs, Discretization |
39 | Enric Pastor, Jordi Cortadella |
Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Petri nets, BDDs, symbolic analysis |
39 | Aarti Gupta, Malay K. Ganai, Chao Wang 0001, Zijiang Yang 0006, Pranav Ashar |
Learning from BDDs in SAT-based bounded model checking. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
BDD learning, learning, SAT, BDDs, bounded model checking, boolean satisfiability, SAT solvers, property checking |
39 | Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann |
Enhancing Simulation with BDDs and ATPG. |
DAC |
1999 |
DBLP DOI BibTeX RDF |
simulation, formal verification, coverage, ATPG, BDDs |
29 | Daniel Král |
Polynomial-Size Binary Decision Diagrams for the Exactly Half-d-Hyperclique Problem Reading Each Input Bit Twice. |
Theory Comput. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Free binary decision diagrams, Binary decision diagrams |
29 | Andrei Rimsa, Luis E. Zárate, Mark A. J. Song |
Evaluation of Different BDD Libraries to Extract Concepts in FCA - Perspectives and Limitations. |
ICCS (1) |
2009 |
DBLP DOI BibTeX RDF |
Zero-Supressed Binary Decision Diagrams, Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept |
29 | Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown |
Scalable Synthesis and Clustering Techniques Using Decision Diagrams. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Guoqing Xu 0001, Atanas Rountev |
Merging equivalent contexts for scalable heap-cloning-based context-sensitive points-to analysis. |
ISSTA |
2008 |
DBLP DOI BibTeX RDF |
pointer analysis, context sensitivity, points-to analysis |
29 | Richard Mark Downing |
Evolving Binary Decision Diagrams with Emergent Variable Orderings. |
PPSN |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Koen Claessen, Jan-Willem Roorda |
An Introduction to Symbolic Trajectory Evaluation. |
SFM |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Toni Jussila, Carsten Sinz, Armin Biere |
Extended Resolution Proofs for Symbolic SAT Solving with Quantification. |
SAT |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Jaco van de Pol, Olga Tveretina |
A BDD-Representation for the Logic of Equality and Uninterpreted Functions. |
MFCS |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Marta Z. Kwiatkowska, Gethin Norman, David Parker 0001 |
Probabilistic symbolic model checking with PRISM: a hybrid approach. |
Int. J. Softw. Tools Technol. Transf. |
2004 |
DBLP DOI BibTeX RDF |
Binary decision diagrams, Symbolic model checking, Probabilistic model checking |
29 | HoonSang Jin, Fabio Somenzi |
CirCUs: A Hybrid Satisfiability Solver. |
SAT (Selected Papers |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Jinbo Huang, Adnan Darwiche |
Toward Good Elimination Orders for Symbolic SAT Solving. |
ICTAI |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Maitrali Marik, Ajit Pal |
Energy-aware Logic Synthesis and Technology Mapping for MUX-based FPGAs. |
VLSI Design |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Mark G. Karpovsky, Radomir S. Stankovic, Jaakko Astola |
Reduction of Sizes of Decision Diagrams by Autocorrelation Functions. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
Logic synthesis, decision diagrams, linear transforms, autocorrelation functions, spectral techniques |
29 | Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, Malay K. Ganai |
Robust Boolean reasoning for equivalence checking and functional property verification. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Per Bjesse |
Industrial Model Checking Based on Satisfiability Solvers. |
SPIN |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Marta Z. Kwiatkowska, Gethin Norman, David Parker 0001 |
Probabilistic Symbolic Model Checking with PRISM: A Hybrid Approach. |
TACAS |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Jan Friso Groote, Jaco van de Pol |
Equational Binary Decision Diagrams. |
LPAR |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Christoph Meinel, Harald Sack, Arno Wagner |
WWW.BDD-Portal.ORG: An Experimentation Platform for Binary Decision Diagram Algorithms. |
Experimental Algorithmics |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Frank Schmiedle, Wolfgang Günther 0001, Rolf Drechsler |
Dynamic Re-Encoding During MDD Minimization. |
ISMVL |
2000 |
DBLP DOI BibTeX RDF |
variable grouping, MDD, BDD, sifting |
29 | Frank Reffel, Stefan Edelkamp |
Error Detection with Directed Symbolic Model Checking. |
World Congress on Formal Methods |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Marius Bozga, Oded Maler, Stavros Tripakis |
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics. |
CHARME |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Kavita Ravi, Fabio Somenzi |
Efficient Fixpoint Computation for Invariant Checking. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
Logic synthesis for large pass transistor circuits. |
ICCAD |
1997 |
DBLP DOI BibTeX RDF |
logic synthesis, BDD, Pass transistor logic |
29 | Ramin Hojati, Sriram C. Krishnan, Robert K. Brayton |
Early Quantification and Partitioned Transition Relations. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
|