Search results for "BSIM4"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
113	Xudong Niu, Yan Song, Bo Li, Wei Bian, Yadong Tao, Feng Liu, Jinhua Hu, Yu Chen, Frank He	Tests on Symmetry and Continuity between BSIM4 and BSIM5.	ISQED	2007	DBLP DOI BibTeX RDF	BSIM4, BSIM5, CMOS circuit design, symmetry, continuity, compact model
89	Simeon Realov, William F. McLaughlin, Kenneth L. Shepard	On-chip transistor characterization arrays with digital interfaces for variability characterization.	ISQED	2009	DBLP DOI BibTeX RDF
44	Domenik Helms, Marko Hoyer, Wolfgang Nebel	Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage.	PATMOS	2006	DBLP DOI BibTeX RDF
44	S. Sridharan, Sripriya R. Bandi, Clyde Washburn, Ponnathpur R. Mukund, Jan Kolnik, Ken Paradis, Steve Howard, Jeff Burleson	A universal common-source and common-drain model for 1-20GHz frequency range.	ISCAS	2006	DBLP DOI BibTeX RDF
32	Ilho Myeong, Juhyun Kim, Hyungwoo Ko, Ickhyun Song, Yongseok Kim, Hyungcheol Shin	A Simple and Accurate Modeling Method of Channel Thermal Noise Using BSIM4 Noise Models.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2020	DBLP DOI BibTeX RDF
32	Dusan N. Grujic, Mihajlo Bozovic, Milan Savic	BSIM4 to PSP Model Conversion: A Case Study.	J. Circuits Syst. Comput.	2016	DBLP DOI BibTeX RDF
32	Chika Tanaka, Masumi Saitoh, Kensuke Ota, Takayuki Ishikawa, Toshinori Numata	BSIM4 parameter extraction for tri-gate Si nanowire transistors.	Microelectron. J.	2016	DBLP DOI BibTeX RDF
32	Dusan N. Grujic, Mihajlo Bozovic, Milan Savic	BSIM4 to PSP Model Conversion for Passive Mixer IM3 Simulation.	DDECS	2015	DBLP DOI BibTeX RDF
32	Negin Moezi, Daryoosh Dideban, Binjie Cheng, Scott Roy, Asen Asenov	Impact of statistical parameter set selection on the statistical compact model accuracy: BSIM4 and PSP case study.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
32	Fabrizio Ramundo, Paolo Nenzi, Mauro Olivieri	First integration of MOSFET band-to-band-tunneling current in BSIM4.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
32	Kjell O. Jeppson	A learning tool MOSFET model: A stepping-stone from the square-law model to BSIM4.	PATMOS	2013	DBLP DOI BibTeX RDF
32	Weidong Liu 0002, Chenming Hu	BSIM4 and MOSFET Modeling For IC Simulation		2011	DOI RDF
32	Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov	Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP.	IEEE Des. Test Comput.	2010	DBLP DOI BibTeX RDF	statistical variability, statistical compact modeling, design and test, MOSFET, mismatch
32	Ming-Ta Yang, Yang Du, Charles Teng, Tony Chang, Eugene Worley, Ken Liao, You-Wen Yau, Geoffrey Yeap	BSIM4-based lateral diode model for LNA co-designed with ESD protection circuit.	ISQED	2010	DBLP DOI BibTeX RDF
32	Thomas Noulis, Stilianos Siskos, Gérard Sarrabayrouse	Analysis and selection criteria of BSIM4 flicker noise simulation models.	Int. J. Circuit Theory Appl.	2008	DBLP DOI BibTeX RDF
32	Thomas Noulis, Stylianos Siskos, Gérard Sarrabayrouse	Comparison between BSIM4.X and HSPICE flicker noise models in NMOS and PMOS transistors in all operating regions.	Microelectron. Reliab.	2007	DBLP DOI BibTeX RDF
22	Eric Karl, Dennis Sylvester, David T. Blaauw	Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures.	ISQED	2008	DBLP DOI BibTeX RDF
22	Bo Hu, C.-J. Richard Shi	Improved automatic differentiation method for efficient model compiler.	ISCAS	2006	DBLP DOI BibTeX RDF
22	Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil	Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits.	VLSI Design	2006	DBLP DOI BibTeX RDF
22	Chuen M. Tan, Masud H. Chowdhury	Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits.	APCCAS	2006	DBLP DOI BibTeX RDF
22	Ilia Polian, Sandip Kundu, Jean-Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker 0001	Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies.	VTS	2005	DBLP DOI BibTeX RDF	Deep submicron technology modeling, Resistive bridging faults
22	Ge Yang 0004, Zhongda Wang, Sung-Mo Kang	Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies.	VLSI Design	2004	DBLP DOI BibTeX RDF
22	M. Lee, R. B. Anna, Jui-Chu Lee, Scott M. Parker, Kim M. Newton	A scalable BSIM3v3 RF model for multi-finger NMOSFETs with ring substrate contact.	ISCAS (5)	2002	DBLP DOI BibTeX RDF