The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Searching for phrase Brent-Kung (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1994-2023 (12)
Publication types (Num. hits)
article(3) inproceedings(9)
Venues (Conferences, Journals, ...)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 8 occurrences of 8 keywords

Results
Found 12 publication records. Showing 12 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
93Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. Search on Bibsonomy ASYNC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF completion detection, Brent-Kung, Carry-Bypass, asynchronous, adders, hazards, high-performance design
66Zhiyu Liu, Volkan Kursun Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
66Zhiyu Liu, Volkan Kursun Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Multi-threshold voltage CMOS, gated power, gated ground, sleep switch, subthreshold leakage, charge recycling
60Matthew M. Ziegler, Mircea R. Stan A Unified Design Space for Regular Parallel Prefix Adders. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Kogge-Stone adder, Han-Carlson adder, Brent-Kung adder, parallel prefix adder
56A. Niyas Ahamed, M. Madheswaran Hybrid Brent Kung Adder with Modified Sum Generator for Energy Efficient Applications. Search on Bibsonomy J. Circuits Syst. Comput. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
56Aruru Sai Kumar, U. Siddhesh, N. Sai Kiran, K. Bhavitha Design of High Speed 8-bit Vedic Multiplier using Brent Kung Adders. Search on Bibsonomy ICCCNT The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
33Sabyasachi Das, Sunil P. Khatri A Novel Hybrid Parallel-Prefix Adder Architecture With Efficient Timing-Area Characteristic. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
33Christopher Umans Fast polynomial factorization and modular composition in small characteristic. Search on Bibsonomy STOC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF modular composition, multipoint evaluation, polynomial factorization
33Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner Variable delay ripple carry adder with carry chain interrupt detection. Search on Bibsonomy ISCAS (5) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
33Scott Hauck, Matthew M. Hosler, Thomas W. Fry High-performance carry chains for FPGA's. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
33Scott Hauck, Matthew M. Hosler, Thomas W. Fry High-Performance Carry Chains for FPGAs. Search on Bibsonomy FPGA The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
33Tudor Jebelean Systolic Algorithms for Long Integer GCD Computation. Search on Bibsonomy CONPAR The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
Displaying result #1 - #12 of 12 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by L3S.
Previously maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license