|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 4 occurrences of 4 keywords
|
|
|
Results
Found 7 publication records. Showing 7 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
60 | Henrik Eriksson, Per Larsson-Edefors, Atila Alvandpour |
A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
48 | Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel |
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. |
ASYNC |
1997 |
DBLP DOI BibTeX RDF |
completion detection, Brent-Kung, Carry-Bypass, asynchronous, adders, hazards, high-performance design |
32 | Joseph F. Kruy |
A fast conditional sum adder using carry bypass logic. |
AFIPS Fall Joint Computing Conference (1) |
1965 |
DBLP DOI BibTeX RDF |
|
28 | Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo |
Fast Low-Power 64-Bit Modular Hybrid Adder. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Hwang-Cherng Chow, I-Chyn Wey |
A 3.3 V 1 GHz low-latency pipelined Booth multiplier with new Manchester carry-pass adder. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Diederik Verkest, Luc J. M. Claesen, Hugo De Man |
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
|
14 | Patrick C. McGeer, Robert K. Brayton |
Efficient Algorithms for Computing the Longest Viable Path in a Combinational Network. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #7 of 7 (100 per page; Change: )
|
|