Search results for "Carry"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
87	Vitit Kantabutra	A Recursive Carry-Lookahead/Carry-Select Hybrid Adder.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	recursive carry-lookahead/carry-select hybrid adder, double-precision mantissas, spanning tree carry lookahead adder, redundant cell adder, Am29050 microprocessor, Manchester carry chains, delays, adders
87	Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija	Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	delay optimisation, block carry-lookahead adders, multidimensional dynamic programming, worst-case carry propagation delays, minimum latency, fanin, dynamic programming, digital arithmetic, adders, gate delays, carry logic, fanout, critical path delay, carry-skip adders
86	Akhilesh Tyagi	A Reduced-Area Scheme for Carry-Select Adders.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	reduced-area, conditional-sum adders, carry-chain evaluations, gate-count, carry-ripple, classical carry-select, logic design, adders, logic circuits, gate-delay, parallel-prefix adders, analytic evaluation, area-efficient, carry-skip adders, carry-select adders
82	Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian	An effective BIST scheme for carry-save and carry-propagate array multipliers.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	BIST scheme, carry-propagate array multipliers, carry-save array multipliers, complex VLSI devices, maximum length LFSR, count-based scheme, multiplier cells, VLSI, logic testing, controllability, built-in self test, integrated circuit testing, automatic testing, observability, fault coverage, test pattern generator, multiplying circuits, carry logic
72	Behrooz Parhami	Comments on "Evaluation of A + B + K Conditions Without Carry Propagation".	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	carry-free circuit, A+B=K, negative effects, carry-save redundant numbers, (3, 2)-counters, carry propagation, carry-save numbers, pipeline processing, logic circuits, pipelined architectures, comparators, addition, parallel counters, redundant number representation, conditional branches
72	Tomás Lang, Javier D. Bruguera	Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition.	ICCD	1999	DBLP DOI BibTeX RDF	Most significant carry, prefix tree, carry look-ahead adder
70	Behnam Amelifard, Farzan Fallah, Massoud Pedram	Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-Power High-Performance Adders.	ISQED	2005	DBLP DOI BibTeX RDF
66	Keshab K. Parhi	Low-energy CSMT carry generators and binary adders.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
62	Oscar Gustafsson, Henrik Ohlsson, Lars Wanhammar	Minimum-adder integer multipliers using carry-save adders.	ISCAS (2)	2001	DBLP DOI BibTeX RDF
58	Behrooz Parhami	Carry-Free Addition of Recorded Binary Signed-Digit Numbers.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	string recoding, recoded binary signed-digit numbers, number representation systems, borrow chains, propagation-free addition, signed-digit arithmetic, limited-carry propagation, binary signed-digit numbers, borrow-free subtraction, digital arithmetic, subtraction, annihilation, Carry-free addition, carry-free addition, signed digit number representation
58	Johannes Grad, James E. Stine	New algorithms for carry propagation.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	carry propagate addition, conditional sum adder, hybrid adder, ling adder, pseudo-complements, reed adder, domino logic, carry-skip adder
57	Yan Sun, Xin Zhang, Xi Jin	High-Performance Carry Select Adder Using Fast All-One Finding Logic.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	fast all-one finding circuit, add-one circuit, carry-select adder
57	Scott Hauck, Matthew M. Hosler, Thomas W. Fry	High-performance carry chains for FPGA's.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
57	Scott Hauck, Matthew M. Hosler, Thomas W. Fry	High-Performance Carry Chains for FPGAs.	FPGA	1998	DBLP DOI BibTeX RDF
57	Hans Lindkvist, Per Andersson	Dynamic CMOS circuit techniques for delay and power reduction in parallel adders .	ARVLSI	1995	DBLP DOI BibTeX RDF	dynamic CMOS circuit techniques, delay reduction, parallel adders, high-speed adders, Manchester-carry chains, clock/data precharged dynamic logic blocks, carry calculation trees, parallel processing, VLSI, delays, logic design, digital arithmetic, power consumption, adders, CMOS logic circuits, power reduction, carry logic
52	Javier Hormigo, Manuel Ortiz, Francisco J. Quiles 0002, Francisco J. Jaime, Julio Villalba, Emilio L. Zapata	Efficient Implementation of Carry-Save Adders in FPGAs.	ASAP	2009	DBLP DOI BibTeX RDF
52	Michael T. Frederick, Arun K. Somani	Multi-Bit Carry Chains for High-Performance Reconfigurable Fabrics.	FPL	2006	DBLP DOI BibTeX RDF
52	Youngjoon Kim, Lee-Sup Kim	A low power carry select adder with reduced area.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
52	Seiji Kajihara, Tsutomu Sasao	On the Adders with Minimum Tests.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	ripple carry adder, minimum test set, test generation, stuck-at fault, carry look-ahead adders
48	Vitalij Ocheretnij, Michael Gössel, Egor S. Sogomonyan, Daniel Marienfeld	Modulo p=3 Checking for a Carry Select Adder.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	concurrent checking, modulo checking, carry select adder
48	Yu-Ting Pai, Yu-Kumg Chen	The Fastest Carry Lookahead Adder.	DELTA	2004	DBLP DOI BibTeX RDF	central processing unit, integrated circuit, adder, gate delay, carry lookahead adder
48	Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald	Self-Timed Carry-Lookahead Adders.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	delay-insenstive circuits, tree iterative circuits, CMOS, Self-timed circuits, carry-lookahead adders
48	Youngmoon Choi, Earl E. Swartzlander Jr.	Speculative Carry Generation With Prefix Adder.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
48	Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Low-Power Carry Skip Adder with Fast Saturation.	ASAP	2004	DBLP DOI BibTeX RDF
46	Himanshu Thapliyal, Hamid R. Arabnia, M. B. Srinivas	Efficient Reversible Logic Design of BCD Subtractors.	Trans. Comput. Sci.	2009	DBLP DOI BibTeX RDF	BCD subtractors, BCD adders, Reversible logic
45	Anum Khan, Arindom Chakraborty, Upal Barua Joy, Subodh Wairya, Mehedi Hasan	Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
45	P. Balasubramanian 0001, Cuong Dang, Douglas L. Maskell, K. Prasad	Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic.	CoRR	2017	DBLP BibTeX RDF
44	Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka	A fast hybrid carry-lookahead/carry-select adder design.	ACM Great Lakes Symposium on VLSI	2001	DBLP DOI BibTeX RDF	CMOS, domino logic, carry lookahead adder
44	Jin-Fu Li 0001, Jiunn-Der Yu, Yu-Jen Huang	A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
44	Robert W. Doran	Variants of an Improved Carry Look-Ahead Adder.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	look-ahead carry, adder, adders, variation, improved, carry look-ahead adder
43	Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José Monteiro 0001	Design of a radix-2m hybrid array multiplier using carry save adder format.	SBCCI	2005	DBLP DOI BibTeX RDF	hybrid multiplier, low power, carry save adder
43	Javier D. Bruguera, Tomás Lang	Multilevel Reverse-Carry Addition: Single and Dual Adders.	J. VLSI Signal Process.	2003	DBLP DOI BibTeX RDF	prefix adders, dual adders, most-significant-carry detection, computer arithmetic, VLSI design
43	Syed Mahfuzul Aziz, S. J. Carr	On C-Testability of Carry Free Dividers.	DELTA	2002	DBLP DOI BibTeX RDF	Carry-free, C-Testability, Divider, Radix-2
43	Parag K. Lala, Alvernon Walker	On-Line Error Detectable Carry-Free Adder Design.	DFT	2001	DBLP DOI BibTeX RDF	carry-free adder, signed binary digits, 1-out-of-3 code, on-line error detection
43	Johannes Grad, James E. Stine	Low power binary addition using carry increment adders.	ISCAS	2006	DBLP DOI BibTeX RDF
43	Vitalij Ocheretnij, Daniel Marienfeld, Egor S. Sogomonyan, Michael Gössel	Self-Checking Code-Disjoint Carry-Select Adder with Low Area Overhead by Use of Add1-Circuits.	IOLTS	2004	DBLP DOI BibTeX RDF
43	Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi	A C-testable carry-free divider.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
43	Hong Diep Nguyen, Bogdan Pasca 0001, Thomas B. Preußer	FPGA-Specific Arithmetic Optimizations of Short-Latency Adders.	FPL	2011	DBLP DOI BibTeX RDF	carry-chain, carry-select, carry-increment, FPGA, addition
43	Chien-In Henry Chen, Anup Kumar	Comments on "Area-Time Optimal Adder Design".	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	VLSI parallel adder, optimal 32-bit fast carry generator, fast carry generator, BiCMOS drivers, optimal adder design, adders, carry logic, critical path delay
43	Mike Paterson, Nicholas Pippenger, Uri Zwick	Faster Circuits and Shorter Formulae for Multiple Addition, Multiplication and Symmetric Boolean Functions	FOCS	1990	DBLP DOI BibTeX RDF	multiplication circuits, multiple addition, shallowest possible circuits, shortest possible formulas, occurrence matrix, shortest multiple carry-save addition formulas, delay matrix, multiple carry-save adders, multiplication, symmetric Boolean functions, carry-save addition
42	Wen-Chang Yeh, Chein-Wei Jen	Generalized Earliest-First Fast Addition Algorithm.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Carry-propagation adder, final adder, conditional-sum, carry-lookahead
40	John P. Fishburn	A Depth-Decreasing Heuristic for Combinational Logic: Or How To Convert a Ripple-Carry Adder Into A Carry-Lookahead Adder Or Anything in-between.	DAC	1990	DBLP DOI BibTeX RDF
39	Jie Wu 0001, Shuhui Yang, Fei Dai 0001	Logarithmic Store-Carry-Forward Routing in Mobile Ad Hoc Networks.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	store-carry-forward, MANETs, network capacity, trajectory planning, mobile nodes
39	Junhyung Um, Taewhan Kim	An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	VLSI, arithmetic circuits, Carry-save-addition
39	Bong-Il Park, In-Cheol Park, Chong-Min Kyung	A Regular Layout Structured Multiplier Based on Weighted Carry-Save Adders.	ICCD	1999	DBLP DOI BibTeX RDF	Booth algorithm, Carry-Save Adder and Wallace Tree, Multiplier
38	Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis	A Static Low-Power, High-Performance 32-bit Carry Skip Adder.	DSD	2004	DBLP DOI BibTeX RDF
38	Javier D. Bruguera, Tomás Lang	Multilevel reverse most-significant carry computation.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
38	Othmar Staffelbach, Willi Meier	Cryptographic Significance of the Carry for Ciphers Based on Integer Addition.	CRYPTO	1990	DBLP DOI BibTeX RDF
37	Bernd Becker 0001, Reiner Kolla	On the Construction of Optimal Time Adders (Extended Abstract).	STACS	1988	DBLP DOI BibTeX RDF
36	Patrick M. Carry, Tim Vigers, Lauren A. Vanderlinden, Carson Keeter, Fran Dong, Teresa Buckner, Elizabeth Litkowski, Ivana Yang, Jill M. Norris, Katherina J. Kechris	Propensity scores as a novel method to guide sample allocation and minimize batch effects during the design of high throughput experiments.	BMC Bioinform.	2023	DBLP DOI BibTeX RDF
36	M. Pöntinen, Mikael Granvik, Achille A. Nucita, L. Conversi, Bruno Altieri, B. Carry, C. M. O'Riordan, D. Scott, N. Aghanim, A. Amara, L. Amendola, N. Auricchio, M. Baldi, D. Bonino, E. Branchini, Massimo Brescia, S. Camera, V. Capobianco, C. Carbone, J. Carretero, M. Castellano, Stefano Cavuoti, A. Cimatti, R. Cledassou, G. Congedo, Y. Copin, L. Corcione, F. Courbin, M. Cropper, A. Da Silva, Hubert Degaudenzi, J. Dinis, Florian Dubath, X. Dupac, S. Dusini, S. Farrens, S. Ferriol, Marco Frailis, Enrico Franceschi, M. Fumana, S. Galeotta, et al.	Euclid: Identification of asteroid streaks in simulated images using deep learning.	CoRR	2023	DBLP DOI BibTeX RDF
36	Chen Qiu, Carry Ruikai Yu	Assessing the role of new media in modern information society using the analytic network process.	Soft Comput.	2023	DBLP DOI BibTeX RDF
36	Robert Carry Osborne	A social solution to the puzzle of doxastic responsibility: a two-dimensional account of responsibility for belief.	Synth.	2021	DBLP DOI BibTeX RDF
36	Piero Montebruno, Robert J. Bennett, Harry Smith, Carry van Lieshout	Machine learning classification of entrepreneurs in British historical census data.	Inf. Process. Manag.	2020	DBLP DOI BibTeX RDF
36	Stéphane Erard, Baptiste Cecconi, Pierre Le Sidaner, Cyril Chauvin, Angelo Pio Rossi, Mikhail Minin, Maria Teresa Capria, Stavro Ivanovski, Bernard Schmitt, Vincent Génot, Nicolas André, Chiara Marmo, Ann-Carine Vandaele, Loïc Trompet, Manuel Scherf, Ricardo Hueso, Anni Määttänen, Benoît Carry, Nicholas Achilleos, Jan Soucek, David Pisa, Kevin Benson, Pierre Fernique, Ehouarn Millour	Virtual European Solar & Planetary Access (VESPA): A Planetary Science Virtual Observatory Cornerstone.	Data Sci. J.	2020	DBLP DOI BibTeX RDF
36	Max Mahlke, Enrique Solano, H. Bouy, Benoît Carry, Gijs A. Verdoes Kleijn, Emmanuel Bertin	The ssos pipeline: Identification of Solar System objects in astronomical images.	Astron. Comput.	2019	DBLP DOI BibTeX RDF
36	Jean-Michel Friedt, Gilles Martin, Gwenhael Goavec-Mérou, David Rabus, Sébastien Alzuaga, Lilia Arapan, Marianne Sagnard, Émile Carry	Acoustic Transducers as Passive Cooperative Targets for Wireless Sensing of the Sub-Surface World: Challenges of Probing with Ground Penetrating RADAR.	Sensors	2018	DBLP DOI BibTeX RDF
36	Daniel Robinson, Thomas Bertrand, Jean-Christophe Carry, Frank Halley, Andreas Karlsson, Magali Mathieu, Hervé Minoux, Marc-Antoine Perrin, Benoit Robert, Laurent Schio, Woody Sherman	Differential Water Thermodynamics Determine PI3K-Beta/Delta Selectivity for Solvent-Exposed Ligand Modifications.	J. Chem. Inf. Model.	2016	DBLP DOI BibTeX RDF
36	Rebecca Schnall, Marlene Rojas, Suzanne Bakken, William Brown III 0001, Alex Carballo-Dieguez, Monique Carry, Deborah Gelaude, Jocelyn Patterson Mosley, Jasmine Travers	A user-centered model for designing consumer mobile health (mHealth) applications (apps).	J. Biomed. Informatics	2016	DBLP DOI BibTeX RDF
36	Kareem S. Aggour, Bethany Hoogs, Christina Leber, Carry Correia, Deniz Senturk-Doganaksoy	Mining company networks for marketing insights and sales leads.	ASONAM	2013	DBLP DOI BibTeX RDF
36	Yannick Denis, Jean Coldefy, Patrick Gendre, Eric Bourlès, Christophe Carry	ACTIF: une aide à la conception de systèmes de transports interopérables en France.	Ann. des Télécommunications	2005	DBLP DOI BibTeX RDF
36	André Eberhard, Pierre-Yves Carry, Jean-Pierre Perdrix, Jean-Marc Fargnoli, Loïc Biot, Pierre F. Baconnier	A program based on a 'selective' least-squares method for respiratory mechanics monitoring in ventilated patients.	Comput. Methods Programs Biomed.	2003	DBLP DOI BibTeX RDF
36	Anne-Sophie Silvent, Catherine Garbay, Pierre-Yves Carry, Michel Dojat	Rôle des données, informations et connaissances dans la construction de scénarios médicaux.	EGC	2003	DBLP BibTeX RDF
35	Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner	Variable delay ripple carry adder with carry chain interrupt detection.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
34	Alexandre F. Tenca, Song Park, Lo'ai Ali Tawalbeh	Carry-Save Representation Is Shift-Unsafe: The Problem and Its Solution.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Carry-save, arithmetic shift, computer arithmetic, redundant representation
34	Yiran Chen 0001, Hai Li 0001, Kaushik Roy 0001, Cheng-Kok Koh	Cascaded carry-select adder (C2SA): a new structure for low-power CSA design.	ISLPED	2005	DBLP DOI BibTeX RDF	low-power, carry-select adder
34	Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy 0001	Low-power carry-select adder using adaptive supply voltage based on input vector patterns.	ISLPED	2004	DBLP DOI BibTeX RDF	adaptive supply voltage, low power adder, carry-select adder
34	Kuo-Hsing Cheng, Shun-Wen Cheng, Chan-Wei Huang	64-bit Hybrid Dual-Threshold Voltage Power-Aware Conditional Carry Adder Design.	IWSOC	2004	DBLP DOI BibTeX RDF	conditional carry, hybrid dual-threshold voltage, CMOS, VLSI design, Adder
34	Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian	Easily Testable Cellular Carry Lookahead Adders.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	cellular carry lookahead adders, linear-testability, design-for-testability, cell fault model
34	Mark Goresky, Andrew Klapper	Efficient multiply-with-carry random number generators with maximal period.	ACM Trans. Model. Comput. Simul.	2003	DBLP DOI BibTeX RDF	multiply-with-carry, p-adic number, random number generation, m-sequences, primitive element, k-distribution, feedback shift register, lattice structure, fcsr
34	Sangho Jin, Ichiro Kimura, Keigo Watanabe	Controls of servomotors for carry hospital robots.	J. Intell. Robotic Syst.	1993	DBLP DOI BibTeX RDF	Carry hospital robot, computer control, DC servomotor control, PLL control, mobile robot, PI control
34	Shu Tezuka, Pierre L'Ecuyer, Raymond Couture	On the Lattice Structure of the Add-With-Carry and Subtract-With-Borrow Random Number Generators.	ACM Trans. Model. Comput. Simul.	1993	DBLP DOI BibTeX RDF	add-with-carry, subtract-with-borrow, linear congruential generators, spectral test, lattice structure
34	Yijun Liu, Stephen B. Furber	The Design of an Asynchronous Carry-Lookahead Adder Based on Data Characteristics.	PATMOS	2005	DBLP DOI BibTeX RDF
34	Yajuan He, Chip-Hong Chang, Jiangmin Gu	An area efficient 64-bit square root carry-select adder for low power applications.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
34	Egor S. Sogomonyan, Daniel Marienfeld, Vitalij Ocheretnij, Michael Gössel	A New Self-Checking Sum-Bit Duplicated Carry-Select Adder.	DATE	2004	DBLP DOI BibTeX RDF
34	Vitalij Ocheretnij, Michael Gössel, Egor S. Sogomonyan, Daniel Marienfeld	A Modulo p Checked Self-Checking Carry Select Adder.	IOLTS	2003	DBLP DOI BibTeX RDF
34	Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.	The use of carry-save representation in joint module selection and retiming.	DAC	2000	DBLP DOI BibTeX RDF
34	Hercule Kwan, Robert Leonard Nelson Jr., Earl E. Swartzlander Jr.	A new design for a lookahead carry generator.	J. VLSI Signal Process.	1996	DBLP DOI BibTeX RDF
34	Tobias G. Noll	Carry-save architectures for high-speed digital signal processing.	J. VLSI Signal Process.	1991	DBLP DOI BibTeX RDF
33	R. D. (Shawn) Blanton, John P. Hayes	Design of a fast, easily testable ALU.	VTS	1996	DBLP DOI BibTeX RDF	ALU, adder design, L-testable design, level-testable, carry-lookahead addition, fault diagnosis, logic testing, integrated circuit testing, automatic testing, digital arithmetic, integrated circuit design, adders, logic arrays, test patterns, area overhead, functional faults, carry logic, arithmetic-logic unit, 8 bit
33	Jaswinder Pal Singh, Anshul Kumar, Shashi Kumar	A multiplier generator for Xilinx FPGAs.	VLSI Design	1996	DBLP DOI BibTeX RDF	multiplier generator, Xilinx FPGAs, LUT based FPGA, sequential designs, combinational designs, pipelined designs, IDEAS synthesis system, XC3000 family, XC4000 family, dedicated carry logic, XACT tool, XBLOX tool, field programmable gate arrays, high level synthesis, sequential circuits, combinational circuits, digital arithmetic, logic CAD, pipeline processing, integrated circuit design, circuit CAD, table lookup, multiplying circuits, module generator, carry logic, multiplier designs
33	Sudhakar Maddi, M. B. Srinivas	A unified and reconfigurable Montgomery Multiplier architecture without four-to-two CSA.	SBCCI	2007	DBLP DOI BibTeX RDF	sum-carry logic, RSA, ECC, reconfigurable architectures, montgomery multiplication, unified architectures
33	Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman	Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	binary signed-digit number system, most significant carry detection, Sign detection
33	Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis, Constantin Halatsis	C-Testable modified-Booth multipliers.	J. Electron. Test.	1996	DBLP DOI BibTeX RDF	Booth multipliers, design for testability, C-testability, iterative logic arrays, carry lookahead adders, cell fault model
32	Jianhua Liu, Michael Chang, Chung-Kuan Cheng, John F. MacDonald, Nan-Chi Chou, Peter Suaris	Fast adders in modern FPGAs.	FPGA	2004	DBLP DOI BibTeX RDF
30	Xiaofu Jin, Mingming Fan 0001	"I Used To Carry A Wallet, Now I Just Need To Carry My Phone": Understanding Current Banking Practices and Challenges Among Older Adults in China.	CoRR	2022	DBLP DOI BibTeX RDF
30	Adriana N. Borodzhieva, Ivanka D. Tsvetkova	Experiential Learning Approach for Teaching the Topic "Arithmetic Circuits for Fast Addition: Carry Propagation-Look-Ahead Carry Generator".	CompSysTech	2022	DBLP DOI BibTeX RDF
30	Xiaofu Jin, Mingming Fan 0001	"I Used To Carry A Wallet, Now I Just Need To Carry My Phone": Understanding Current Banking Practices and Challenges Among Older Adults in China.	ASSETS	2022	DBLP DOI BibTeX RDF
30		Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter.	J. Ambient Intell. Humaniz. Comput.	2021	DBLP DOI BibTeX RDF
30	Mehedi Hasan, Muhammad Saddam Hossain, Abdul Hasib Siddique, Mainul Hossain, Hasan U. Zaman, Sharnali Islam	A high-speed 4-bit Carry Look-Ahead architecture as a building block for wide word-length Carry-Select Adder.	Microelectron. J.	2021	DBLP DOI BibTeX RDF
30	Shobhit Belwal, Rajat Bhattacharjya, Kaustav Goswami 0002, Dip Sankar Banerjee	ACLA: An Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction.	ISQED	2021	DBLP DOI BibTeX RDF
30	Md. Ashik Zafar Dipto, Afran Sorwar, Elias Ahammad Sojib, Md. Mostak Tahmid Rangon	Performance Improvement in Conventional 4-bit Static CMOS Carry Look-Ahead Adder by Modifying Carry-Generate and Propagate Terms.	ICCCNT	2020	DBLP DOI BibTeX RDF
30	Mehedi Hasan, Parag Biswas, Md. Shihabul Alam, Hasan U. Zaman, Mainul Hossain, Sharnali Islam	High Speed and Ultra Low Power Design of Carry-Out Bit of 4-Bit Carry Look-Ahead Adder.	ICCCNT	2019	DBLP DOI BibTeX RDF
30	Minho Nam, Yeonhun Choi, Kyoung-Rok Cho	High-speed and energy efficient carry select adder (CSLA) dominated by carry generation logic.	Microelectron. J.	2018	DBLP DOI BibTeX RDF
30	Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Yasmin Afsharnezhad, Elham Zahraie Salehi	CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode.	Integr.	2017	DBLP DOI BibTeX RDF
30	P. Balasubramanian 0001, Cuong Dang, Douglas L. Maskell, K. Prasad	Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis.	CoRR	2017	DBLP BibTeX RDF
30	Jinnan Ding, Shuguo Li	Determine the carry bit of carry-sum generated by unsigned MBE multiplier without final addition.	FPL	2017	DBLP DOI BibTeX RDF
30	P. Balasubramanian 0001, Nikos E. Mastorakis	ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders.	CoRR	2016	DBLP BibTeX RDF
30	P. Balasubramanian 0001, Nikos E. Mastorakis	Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit.	CoRR	2016	DBLP BibTeX RDF
30	Atef Ibrahim, Fayez Gebali	Optimized structures of hybrid ripple carry and hierarchical carry lookahead adders.	Microelectron. J.	2015	DBLP DOI BibTeX RDF