Search results for "DAC"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
94	Anne Bracy, Kshitij Doshi, Quinn Jacobson	Disintermediated Active Communication.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
84	Ziqing Mao, Ninghui Li, Hong Chen, Xuxian Jiang	Trojan horse resistant discretionary access control.	SACMAT	2009	DBLP DOI BibTeX RDF	access control, operating system, information flow
84	Ninghui Li, Mahesh V. Tripunitara	On Safety in Discretionary Access Control.	S&P	2005	DBLP DOI BibTeX RDF
78	Ji Hwan (Paul) Chun, Hak-soo Yu, Jacob A. Abraham	An efficient linearity test for on-chip high speed ADC and DAC using loop-back.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	BIST, linearity, ADC, mixed signal test, DAC
78	Grant Martin	Wireless, ESL, DFM, and Power on Stage at 42nd DAC.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	DAC 2005, electronic system level (ESL) design, DAC 2006, wireless, EDA, SoC design
77	Santanu Sarkar 0002, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee	An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.	ISCAS	2008	DBLP DOI BibTeX RDF
73	Kai Chen 0005, Chuanxiong Guo, Haitao Wu, Jing Yuan, Zhenqian Feng, Yan Chen 0004, Songwu Lu, Wenfei Wu	Generic and automatic address configuration for data center networks.	SIGCOMM	2010	DBLP DOI BibTeX RDF	address configuration, graph isomorphism, data center networks
67	DongHyun Ko, Ji-Hoon Jung, YoungGun Pu, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam	A Design of 14-bits ADC and DAC for CODEC Applications in 0.18 µm CMOS Process.	DELTA	2008	DBLP DOI BibTeX RDF	ADC(Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), Sigma-Delta Modulator
66	Jae-Jin Jung, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, Sung-Mo Kang	Design of a 6 bit 1.25 GS/s DAC for WPAN.	ISCAS	2008	DBLP DOI BibTeX RDF
66	Stijn Reekmans, Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten	Quadrature mismatch shaping with a complex, tree structured DAC.	ISCAS	2006	DBLP DOI BibTeX RDF
66	Nicola Ghittori, Andrea Vigna, Piero Malcovati, Stefano D'Amico, Andrea Baschirotto	A low-distortion 1.2 V DAC+filter for transmitters in wireless applications.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
66	T. Salim, John C. Devlin, Jim Whittington	Analog Conversion for FPGA Implementation of the TIGER Transmitter using a 14 bit DAC.	DELTA	2004	DBLP DOI BibTeX RDF
63	Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund	Parallel current-steering D/A Converters for Flexibility and Smartness.	ISCAS	2007	DBLP DOI BibTeX RDF
63	Hanjun Jiang, Degang Chen 0001, Randall L. Geiger	Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
63	Osamu Matsumoto, Hisashi Harada, Yasuo Morimoto, Toshio Kumamoto, Takahiro Miki, Masao Hotta	An 11-bit 160-MS/s 1.35-V 10-mW D/A converter using automated device sizing system.	ASP-DAC	2005	DBLP DOI BibTeX RDF
57	Chanyang Joo, Soojae Kim, Kwangsub Yoon	A low-power 12-bit 80MHz CMOS DAC using pseudo-segmentation.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	binary decoder, pseudo-segmentation, swing reduced driver, low power, DAC
56	Lei Ma, Geert Seuren, Robert Van Rijsinge, Corné Bastiaansen, Leon van der Dussen	A Design-Based Structural Test Method for a Switched-Resistor DAC.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	Switched-resistor DAC, Design-based structural test, THD, Test time reduction, Static test
56	Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen	A low-power mixing DAC IR-UWB-receiver.	ISCAS	2008	DBLP DOI BibTeX RDF
56	Jae-Jin Jung, Bong-Hyuck Park, Sang-Seong Choi, Shin-Il Lim, Suki Kim	A 6-bit 2.704Gsps DAC for DS-CDMA UWB.	APCCAS	2006	DBLP DOI BibTeX RDF
56	Kei-Tee Tiew, Yuan Chen	DAC compensation for continuous-time delta-sigma modulators.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
56	Hanqing Xing, Degang Chen 0001, Randall L. Geiger	A two-step DDEM ADC for accurate and cost-effective DAC testing.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
56	Chun-Yueh Huang, Tsung-Tien Hou, Chi-Chieh Chuang, Hung-Yu Wang	Design of 12-bit 100-MHz Current-Steering DAC for SoC Applications.	IWSOC	2005	DBLP DOI BibTeX RDF
56	Pawel Czarnul	Development and Tuning of Irregular Divide-and-Conquer Applications in DAMPVM/DAC.	PVM/MPI	2002	DBLP DOI BibTeX RDF
54	SeongKi Kim, EunKyung Jin, YoungJin Song, Sang-Yong Han	Design and Implementation of Fast Access Control That Supports the Separation of Duty.	Inscrypt	2006	DBLP DOI BibTeX RDF	Flask, Access control, RBAC, SELinux, DAC
52	Shermann S.-M. Chan, Qing Li 0001, José A. Pino	VideoAcM: a transitive and temporal access control mechanism for collaborative video database production applications.	Multim. Tools Appl.	2006	DBLP DOI BibTeX RDF	Transitive and temporal access control model, Client-data access control, Data-data access control, Video database, Authorization rule
52	Hernan Benitez, Xavier Maldague, Clemente Ibarra-Castanedo, Humberto Loaiza, Abdelhakim Bendada, Eduardo Caicedo	Modified Differential Absolute Contrast using Thermal Quadrupoles for the Nondestructive Testing of Finite Thickness Specimens by Infrared Thermography.	CCECE	2006	DBLP DOI BibTeX RDF
52	Hyuen-Hee Bae, Jin-Sik Yoon, Myung-Jin Lee, Eun-Seok Shin, Seung-Hoon Lee	A 3 V 12b 100 MS/s CMOS D/A converter for high-speed system applications.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
52	Lingkun Chu, Hong Tang 0004, Tao Yang 0009, Kai Shen	Optimizing data aggregation for cluster-based internet services.	PPoPP	2003	DBLP DOI BibTeX RDF	cluster-based network services, load-adaptive tree formation, scalable data aggregation, fault tolerance, throughput, response time
47	Sachin S. Sapatnekar, Leon Stok	DAC Highlights.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	semiconductor industry, DAC, electronic design automation, automotive electronics, Design Automation Conference
47	Van Nhan Vo 0001, Viet-Hung Dang, Hung Tran, Dac-Binh Ha, Cong Le, Tu Dac Ho, Chakchai So-In	Secondary Network Throughput Optimization of NOMA Cognitive Radio Networks Under Power and Secure Constraints.	IEEE Access	2023	DBLP DOI BibTeX RDF
45	Hugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr.	A small area 8bits 50MHz CMOS DAC for bluetooth transmitter.	SBCCI	2007	DBLP DOI BibTeX RDF	current-steering segmented, low area, bluetooth
45	Ghyslain Gagnon, Leonard MacEachern	Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass Delta-Sigma Modulators.	ISCAS	2007	DBLP DOI BibTeX RDF
45	Wen-Shen Chou, Shu-Chieh Yang, Fu-Lung Hsueh, Heng-Chang Huang, Chih-Ji Hsiao	A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process.	ISCAS	2007	DBLP DOI BibTeX RDF
45	S. Radiom, B. Sheikholeslami, Hamed Aminzadeh, Reza Lotfi	Folded-current-steering DAC: an approach to low-voltage high-speed high-resolution D/A converters.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Friedel Gerfers, Maurits Ortmanns, P. Schmitz	A transistor-based clock jitter insensitive DAC architecture.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Weining Ni, Xueyang Geng, Yin Shi, Foster F. Dai	A 12-bit 300 MHz CMOS DAC for high-speed system applications.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Svante Signell, Mezbah Uddin Shaber	High-speed pipelined DAC architecture using Gray coding.	ISCAS	2006	DBLP DOI BibTeX RDF
45	Hossein Shamsi, Omid Shoaei	Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms.	APCCAS	2006	DBLP DOI BibTeX RDF
45	A. Seedher, Preetam Tadeparthy, K. A. S. Satheesh, V. T. Anuroop	Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
45	Samiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey	A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 Segmented Current Steering CMOS DAC.	VLSI Design	2005	DBLP DOI BibTeX RDF	MOS Analog Circuits, Digital to Analog Conversion, Mixed Analog -Digital Integrated Circuits, Low Power
45	Pavel Horsky	A 16 Bit + Sign Monotonic Precise Current DAC for Sensor Applications.	DATE	2004	DBLP DOI BibTeX RDF
45	Saeed Saeedi, Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh	A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
45	Brandon Greenley, Un-Ku Moon, Raymond Veith	A 1.8 V CMOS DAC cell with ultra high gain op-amp in 0.0143 mm2.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
45	Foto N. Afrati, Irène Guessarian, Michel de Rougemont	The Expressiveness of Datalog Circuits (DAC).	MFCS	1997	DBLP DOI BibTeX RDF
44	Dac C. Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel	Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor.	ASP-DAC	2006	DBLP DOI BibTeX RDF	64-bit Power Architecture, design dependency solution, digital thermal sensor, flexible IO, hardware content protection, high-performance latch, linear sensor, local clock buffer, multi-operating system, synergistic processor, real-time system, modularity, power management, Linux, multi-core, multi-threading, SOC, thermal management, design environment, CELL Processor, clock distribution, virtualization technology, SOI, correct-by-construction, re-use, design hierarchy
43	Christian Mandl, Adolfo Fucci	A fast FPGA based coprocessor supporting hard real-time search.	EUROMICRO	1997	DBLP DOI BibTeX RDF	fast FPGA based coprocessor, hard real time search, dual port memories, programmable message driven multi port memories, sequential requests, data acquisition systems, hard real time requirements, DAC systems, coprocessor architectures, file descriptor table, implementation costs, TI DSP C40, hardware strategy, dual port memory, generic searching coprocessor, field programmable gate arrays, hardware implementation, computer systems, high throughput, searching strategy, design approach, DPMs
42	Ling Yuan, Weining Ni, Yin Shi, Foster F. Dai	A 10-bit 2GHz Current-Steering CMOS D/A Converter.	ISCAS	2007	DBLP DOI BibTeX RDF
42	Michael E. Locasto, Angelos Stavrou, Angelos D. Keromytis	Dark application communities.	NSPW	2006	DBLP DOI BibTeX RDF	application communities, dark application communities, network security, automorphic
42	Jared Welz, Ian Galton	A necessary and sufficient condition for mismatch shaping in multi-bit DACs.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
42	Henrik T. Jensen 0001, Joseph F. Jensen	A low-complexity dynamic element matching technique for reduced-distortion digital-to-analog conversion.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
42	Henrik Boström, Lars Asker	Combining Divide-and-Conquer and Separate-and-Conquer for Efficient and Effective Rule Induction.	ILP	1999	DBLP DOI BibTeX RDF
42	Vijay P. Bhatkar	Parallel Computing: An Indian Perspective.	CONPAR	1990	DBLP DOI BibTeX RDF
36	Sachin S. Sapatnekar, Grant Martin	DAC Highlights.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	DAC, Design Automation Conference
36	Andrew B. Kahng, Grant Martin	DAC Highlights.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	DAC, Design Automation Conference
35	Qilin Zheng, Zongwei Wang, Zishun Feng, Bonan Yan, Yimao Cai, Ru Huang, Yiran Chen 0001, Chia-Lin Yang, Hai Helen Li	Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks.	DAC	2020	DBLP DOI BibTeX RDF
35	Mark Po-Hung Lin, Vincent Wei-Hao Hsiao, Chun-Yu Lin	Parasitic-aware Sizing and Detailed Routing for Binary-weighted Capacitors in Charge-scaling DAC.	DAC	2014	DBLP DOI BibTeX RDF
35	Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li 0001, Yaoguang Wei	The DAC 2012 routability-driven placement contest and benchmark suite.	DAC	2012	DBLP DOI BibTeX RDF
35	Douglas Densmore, Mark Horowitz, Smita Krishnaswamy, Xiling Shen, Adam P. Arkin, Erik Winfree, Chris Voigt	Joint DAC/IWBDA special session design and synthesis of biological circuits.	DAC	2011	DBLP DOI BibTeX RDF
35	Marc D. Riedel, Soha Hassoun, Ron Weiss, Pamela Silver, J. Christopher Anderson, Richard M. Murray	Joint DAC/IWBDA special session engineering biology: fundamentals and applications.	DAC	2010	DBLP DOI BibTeX RDF	bio-design automation, biological circuits, cellular programming, robustness, control, feedback, computational biology, system biology, modular designs, synthetic biology
35	Fuding Ge, Malay Trivedi, Brent Thomas, William Jiang, Hongjiang Song	1.5V 0.5mW 2MSPS 10B DAC with rail-to-rail output in 0.13mum CMOS technology.	SoCC	2008	DBLP DOI BibTeX RDF
35	Marek Kopel, Aleksander Zgrzywa	The Consistency and Conformance of Web Document Collection Based on Heterogeneous DAC Graph.	IEA/AIE	2008	DBLP DOI BibTeX RDF	Web document collection, heterogeneous graph, consistency, relationship, conformance
35	Hanjun Jiang, Degang Chen 0001, Randall L. Geiger	Deterministic DEM DAC Performance Analysis.	ISCAS	2007	DBLP DOI BibTeX RDF
35	Georgi I. Radulov, Patrick J. Quinn, Pieter C. W. van Beek, Johannes A. Hegt, Arthur H. M. van Roermund	A binary-to-thermometer decoder with built-in redundancy for improved DAC yield.	ISCAS	2006	DBLP DOI BibTeX RDF
35	Paulo G. R. Silva, Kofi A. A. Makinwa, Johan H. Huijsing, Lucien J. Breems	Noise analysis of continuous-time Sigma Delta modulators with switched-capacitor feedback DAC.	ISCAS	2006	DBLP DOI BibTeX RDF
35	Akira Yasuda, Akinori Ohkubo, Katsuya Ogata, Hajime Ueno, Takeshi Anzai, Takashi Kimura, Koichiro Ochiai, Toshihiko Hamasaki	A single-chip audio system with delta-sigma DAC and class-D amplifier.	ISCAS	2006	DBLP DOI BibTeX RDF
35	Yuan Yao, Xuefeng Yu, Foster F. Dai, Richard C. Jaeger	A 12-bit current steering DAC for cryogenic applications.	ISCAS	2006	DBLP DOI BibTeX RDF
35	Dong Phil Kim, Seok Joo Koh, Sang Wook Kim	mSCTP-DAC: Dynamic Address Configuration for mSCTP Handover.	EUC	2006	DBLP DOI BibTeX RDF	mSCTP, Mobility, Latency, Handover, Link Layer
35	Gordon Allan, John Knight, Norman M. Filiol, Tom A. D. Riley	Digitally Place and Routed Up-converting Bandpass DAC.	CCECE	2006	DBLP DOI BibTeX RDF
35	Gaurav Raja, Basabi Bhaumik	16-Bit Segmented Type Current Steering DAC for Video Applications.	VLSI Design	2006	DBLP DOI BibTeX RDF	Digital-to-Analog Conversion, Segmentation, Matching
35	Ka-Hou Ao Ieong, Seng-Pan U., Rui Paulo Martins	A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique.	APCCAS	2006	DBLP DOI BibTeX RDF
35	Seong-Min Ha, Tae-Kyu Nam, Kwang S. Yoon	An I/Q channel 12 bit 120MS/s CMOS DAC with three stage thermometer decoders for WLAN.	APCCAS	2006	DBLP DOI BibTeX RDF
35	Hossein Shamsi, Omid Shoaei	A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators.	APCCAS	2006	DBLP DOI BibTeX RDF
35	Bo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe	Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
35	Beatriz Olleta, Hanjun Jiang, Degang Chen 0001, Randall L. Geiger	A segmented thermometer coded DAC with deterministic dynamic element matching for high resolution ADC test.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
35	Guan-Xun Chen, Chung-Len Lee 0001, Jwu E. Chen	A New BIST Scheme Based on a Summing-into-Timing-Signal Principle with Self Calibration for the DAC.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
35	Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli	Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
35	Hao San, Haruo Kobayashi 0001, Shinya Kawakami, Nobuyuki Kuroiwa	An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators.	VLSI Design	2004	DBLP DOI BibTeX RDF
35	K. Ola Andersson, Niklas U. Andersson, Mark Vesterbacka, J. Jacob Wikner	A differential DAC architecture with variable common-mode level.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
35	Vijay P. Bhatkar	KBCS Activities at C-DAC.	KBCS	1989	DBLP DOI BibTeX RDF
34	Napoleon Torres-Martinez	ASP-DAC 2017 keynote speech II: Emerging medical technologies for interfacing the brain: From deep brain stimulation to brain computer interfaces.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	Steve Trimberger	ASP-DAC 2017 keynote speech III: All-programmable FPGAs: More powerful devices require more powerful tools.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	K. T. Tim Cheng	ASP-DAC 2017 keynote speech I-1: Heterogeneous integration of X-tronics: Design automation and education.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	Subhasish Mitra, Deming Chen	ASP-DAC 2017 keynote speech I: In memory of Edward J. McCluskey: The next wave of pioneering innovations.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	Hiroto Yasuura	ASP-DAC 2017 keynote speech I-3: Design of society: Beyond digital system design.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	John Rogers	ASP-DAC 2017 keynote speech I-2: Electronics for the human body.	ASP-DAC	2017	DBLP DOI BibTeX RDF
34	Daisuke Kanemoto, Keigo Oshiro, Keiji Yoshida, Haruichi Kanaya	A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications.	ASP-DAC	2015	DBLP DOI BibTeX RDF
34	Atsushi Takahara	ASP-DAC 2015 keynote speech II programmable network.	ASP-DAC	2015	DBLP DOI BibTeX RDF
34	Noriko Arai	ASP-DAC 2015 keynote speech III: When and how will an AI be smart enough to design?	ASP-DAC	2015	DBLP DOI BibTeX RDF
34	Dongsheng Yang 0002, Wei Deng 0001, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa	An HDL-synthesized gated-edge-injection PLL with a current output DAC.	ASP-DAC	2015	DBLP DOI BibTeX RDF
34	Dong Qiu, Ting Yi, Zhiliang Hong	A low-power triple-mode sigma-delta DAC for reconfigurable (WCDMA/TD-SCDMA/GSM) transmitters.	ASP-DAC	2011	DBLP DOI BibTeX RDF
33	He Wang 0020, Sylvia L. Osborn	Discretionary access control with the administrative role graph model.	SACMAT	2007	DBLP DOI BibTeX RDF	role graph model, role-based access control, DAC
33	John Hale, Mauricio Papa, Oliver Bremer, Rodrigo Chandia, Sujeet Shenoi	Extending Java for Package based Access Control.	ACSAC	2000	DBLP DOI BibTeX RDF	package based access control, programmable security, TBAC, primitive ticket, language translation preprocessor, security service library, ticket management, Java, object-oriented programming, RBAC, MAC, source code, software libraries, syntax, authorisation, program interpreters, DAC, Java language, bytecode interpretation
32	Bruce Mathewson	The evolution of SOC interconnect and how NOC fits within it.	DAC	2010	DBLP DOI BibTeX RDF	AMBA AXI, network on chip
32	Patrick Groeneveld, Rob A. Rutenbar, Jed W. Pitera, Erik C. Carlson, Jinsong Chen	Oil fields, hedge funds, and drugs.	DAC	2009	DBLP DOI BibTeX RDF	financial market analysis, oil field discovery, Monte Carlo methods, drug discovery
32	Tiffany Sparks, Pete Weitzner, Luc Burgun, Russell Lefevre, Todd Cutler, Clayton Parker, Vicki Hadfield, Chris Rowen	Election year: what the electronics industry needs---and can expect---from the incoming administration.	DAC	2008	DBLP DOI BibTeX RDF
32	Francine Bacchini, Gregory S. Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada	Megatrends and EDA 2017.	DAC	2007	DBLP BibTeX RDF
32	Rasit Onur Topaloglu, Alex Orailoglu	A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs.	DAC	2005	DBLP DOI BibTeX RDF
32	Francine Bacchini, David Maliniak, Terry Doherty, Peter McShane, Suhas A. Pai, Sriram Sundararajan, Soo-Kwan Eo, Pascal Urard	ESL: building the bridge between systems to silicon.	DAC	2005	DBLP DOI BibTeX RDF	electronic system-level design
32	Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane	System level design: six success stories in search of an industry.	DAC	2004	DBLP DOI BibTeX RDF
31	Mohammad Tehranipoor, Farinaz Koushanfar	A Survey of Hardware Trojan Taxonomy and Detection.	IEEE Des. Test Comput.	2010	DBLP DOI BibTeX RDF	hardware Trojans, Trojan taxonomy and detection, security, design and test, ICs