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Publication years (Num. hits)
1989-2001 (17) 2002-2005 (19) 2006-2007 (22) 2008-2010 (20) 2011-2012 (20) 2013 (23) 2014 (22) 2015 (20) 2016 (15) 2017 (17) 2018 (31) 2019 (24) 2020 (19) 2021 (26) 2022 (27) 2023 (25) 2024 (6)
Publication types (Num. hits)
article(118) inproceedings(232) phdthesis(3)
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Found 353 publication records. Showing 353 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
67Jaber A. Abu-Qahouq, Wisam Al-Hoor, Liangbin Yao, Issa Batarseh Drive voltage optimization controller to improve efficiency. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
64Sol M. Shatz, Khanh Mai, Christopher Black, Shengru Tu Design and Implementation of a Petri Net Based Toolkit for Ada Tasking Analysis. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1990 DBLP  DOI  BibTeX  RDF Ada tasking analysis, analysis framework, tasking-oriented toolkit for the Ada language, TOTAL, front-end translator subsystem, FETS, back-end information display subsystem, Ada-net reachability graphs, Petri net, Petri nets, Ada, software tools, query, toolkit, utility, BIDS, Ada tasking
56Kiichi Tachi, Sylvain Barraud, Kuniyuki Kakushima, Hiroshi Iwai, Sorin Cristoloveanu, Thomas Ernst 0005 Comparison of low-temperature electrical characteristics of gate-all-around nanowire FETs, Fin FETs and fully-depleted SOI FETs. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
47Xuebei Yang, Jyotsna Chauhan, Jing Guo, Kartik Mohanram Graphene tunneling FET and its applications in low-power circuit design. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF graphene nanoribbons, tunneling fets, low-power
37Niharika Thakuria, Atanu K. Saha, Sandeep Krishna Thirumala, Daniel Schulman, Saptarshi Das, Sumeet Kumar Gupta Polarization-induced Strain-coupled TMD FETs (PS FETs) for Non-Volatile Memory Applications. Search on Bibsonomy DRC The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
37Shubham Sahay, Mamidala Jagadesh Kumar Comprehensive Analysis of Gate-Induced Drain Leakage in Emerging FET Architectures: Nanotube FETs Versus Nanowire FETs. Search on Bibsonomy IEEE Access The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
37Manuel Porcel de Soto, José M. de la Rosa 0001 Simulation-based comparison of CNT-FETs and G-FETs from a circuit designer's perspective. Search on Bibsonomy ISCAS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
35Kartik Mohanram, Jing Guo Graphene nanoribbon FETs: technology exploration and CAD. Search on Bibsonomy ICCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35John A. Chandy, Faquir C. Jain Multiple Valued Logic Using 3-State Quantum Dot Gate FETs. Search on Bibsonomy ISMVL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multiple-valued logic, quantum dots
35Mihir R. Choudhury, Youngki Yoon, Jing Guo, Kartik Mohanram Technology exploration for graphene nanoribbon FETs. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF graphene nanoribbons, variability, defects
35Guochi Huang, Tae-Sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye Post linearization of CMOS LNA using double cascade FETs. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Arijit Raychowdhury, Kaushik Roy 0001 A Novel Multiple-Valued Logic Design Using Ballistic Carbon Nanotube FETs. Search on Bibsonomy ISMVL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Takahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs. Search on Bibsonomy ISMVL The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
34Kaushik Roy 0001, Jaydeep P. Kulkarni, Sumeet Kumar Gupta Device/circuit interactions at 22nm technology node. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF 22 nm technology node, DG MOSFETs, scaling, SRAM, transistor sizing, FinFETs
34Jia-Jun Wong, Siu-Yeung Cho Facial emotion recognition by adaptive processing of tree structures. Search on Bibsonomy SAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF facial emotion tree structures, probabilistic based neural networks, neural networks, tree structures
34John E. Savage Computing with Electronic Nanotechnologies. Search on Bibsonomy CIAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
34Shahid H. Bokhari, Matthew A. Glaser, Harry F. Jordan, Yves Lansac, Jon R. Sauer, Bart Van Zeghbroeck Parallelizing a DNA Simulation Code for the Cray MTA-2. Search on Bibsonomy CSB The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34R. Murali, Lihui Wang, Blanca Austin, James D. Meindl Low-power circuit advantages of the scaled accumulation FET. Search on Bibsonomy ISCAS (5) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Richard Martel, V. Derycke, Jörg Appenzeller, Shalom J. Wind, Phaedon Avouris Carbon nanotube field-effect transistors and logic circuits. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF FET, SWNT, Schottky barrier, field-effect transistor, circuits, carbon nanotube, nanoelectronics, logic gate, inverter, semiconductor
31Arijit Raychowdhury, Xuanyao Fong, Qikai Chen, Kaushik Roy 0001 Analysis of super cut-off transistors for ultralow power digital logic circuits. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF carbon nanotube FETs, tunneling transistors
19M. Balasubbareddy, K. Sivasankaran Impact of Device-to-Device Thermal Interference Due to Self-Heating on the Performance of Stacked Nanosheet FETs. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19V. Bharath Sreenivasulu, Aruna Kumari Neelam, Asisa Kumar Panigrahy, Lokesh Vakkalakula, Jawar Singh, Shiv Govind Singh Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Rinku Rani Das, Rajalekshmi TR, Sruthi Pallathuvalappil, Alex Pappachen James FETs for Analog Neural MACs. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Adelcio M. de Souza, Daniel R. Celino, Regiane Ragi, Murilo Araújo Romero Analytical Model for Cylindrical Junctionless Nanowire FETs. Search on Bibsonomy LASCAS The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Om Maheshwari, Dev Vyas, Nihar Ranjan Mohapatra K-means Clustering with ANN based Classification to Predict Current-Voltage Characteristics of Advanced FETs. Search on Bibsonomy VLSID The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Vivek Kumar, Nischal Anand, Rohit Rai, Sneha Chauhan, Jyoti Patel Unveiling Thermal Cross Talk in 5nm Gate-All-Around Stacked Nanosheet FETs: A Machine Learning Perspective. Search on Bibsonomy VLSID The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Sagarika Dash, Yiming Li 0005, Wen-Li Sung A Hybrid 1D-CNN-LSTM Technique for WKF-Induced Variability of Multi-Channel GAA NS- and NF-FETs. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Ki Ryung Nam, Kwang Soo Kim, Woo Young Choi Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Jae Won Lim, Changhyun Yoo, Kiron Park, Jongwook Jeon Self-Heating and Corner Rounding Effects on Time Dependent Dielectric Breakdown of Stacked Multi-Nanosheet FETs. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Shengzhe Yan, Zhaori Cong, Nianduan Lu, Jinshan Yue, Qing Luo Recent progress in InGaZnO FETs for high-density 2T0C DRAM applications. Search on Bibsonomy Sci. China Inf. Sci. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Xinhao Li, Huilong Zhu, Zhenzhen Kong, Qi Wang 0041, Yongkui Zhang, Zhenhua Wu On the SRAM with comb-shaped nano FETs advancing to 3 nm node and beyond. Search on Bibsonomy Microelectron. J. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Nikolaos Mavredakis, Anibal Pacheco-Sanchez, Wei Wei, Emiliano Pallecchi, Henri Happy, David Jiménez Straightforward bias- and frequency-dependent small-signal model extraction for single-layer graphene FETs. Search on Bibsonomy Microelectron. J. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19John Daniel, Zheng Sun, Xuejian Zhang, Yuanqiu Tan, Neil Dilley, Zhihong Chen, Jörg Appenzeller Experimental demonstration of an integrated on-chip p-bit core utilizing stochastic Magnetic Tunnel Junctions and 2D-MoS2 FETs. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Moinul Shahidul Haque, Md Moniruzzaman, Seungdeog Choi, Sangshin Kwak, Ahmed H. Okilly, Jeihoon Baek A Fast Loss Model for Cascode GaN-FETs and Real-Time Degradation-Sensitive Control of Solid-State Transformers. Search on Bibsonomy Sensors The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Nicolò Zagni, Francesco Maria Puglisi, Paolo Pavan, Muhammad Ashraful Alam Reliability of HfO2-Based Ferroelectric FETs: A Critical Review of Current and Future Challenges. Search on Bibsonomy Proc. IEEE The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Tamanna Nazeer, Sheikh Aamir Ahsan NITSRI-2D: A Surface Potential Based SPICE Compatible Model for pH-Sensitive FETs Based on 2-D Materials. Search on Bibsonomy ESSDERC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Utpreksh Patbhaje, Rupali Verma, Jeevesh Kumar, Ansh, Mayank Shrivastava Unveiling Field Driven Performance Unreliabilities Governed by Channel Dynamics in MoSe2 FETs. Search on Bibsonomy IRPS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19L. Panarella, Ben Kaczer, Quentin Smets, Devin Verreck, Tom Schram, Daire Cott, Dennis Lin, Stanislav Tyaginov, I. Asselberghs, Cesar J. Lockhart de la Rosa, Gouri Sankar Kar, Valeri Afanas'ev Impact of gate stack processing on the hysteresis of 300 mm integrated WS2 FETs. Search on Bibsonomy IRPS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Seongkyung Kim, Hyerim Park, Eunyu Choi, Young Han Kim, Dahyub Kim, Hyewon Shim, Shin-Young Chung, Paul Jung Reliability Assessment of 3nm GAA Logic Technology Featuring Multi-Bridge-Channel FETs. Search on Bibsonomy IRPS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Mislav Matic, Mirko Poljak Transport Properties and Device Performance of Quasi-One-Dimensional MoS2 FETs. Search on Bibsonomy MIPRO The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Zhuocheng Zhang, Zehao Lin, Chang Niu, Mengwei Si, Muhammad Ashraful Alam, Peide D. Ye Ultrahigh Bias Stability of ALD In2O3 FETs Enabled by High Temperature O2 Annealing. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Xiaolin Wang, Zijie Zheng, Qiwen Kong, Leming Jiao, Kaizhen Han, Chen Sun 0010, Zuopu Zhou, Long Liu, Yuye Kang, Gan Liu, Dong Zhang, Xiao Gong First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×109 Endurance, and 58.3% Area Saving. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19N. Breil, B.-C. Lee, J. Avila Avendano, J. Jewell, M. Vellaikal, E. Newman, E. M. Bazizi, A. Pal, L. Liu, Oleg Gluschenkov, A. Greene, S. Mochizuki, Nicolas Loubet, B. Colombeau, B. Haran Contact Cavity Shaping and Selective SiGe: B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Jih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Yu-Ciao Chen, Yu-Cheng Fan, C. W. Liu First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61mV/dec, Ioff<10-7 μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °C. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Wei-Xiang You, Cheng-Yin Wang, Yih Wang, Tsung-Yung Jonathan Chang, Szuya Sandy Liao Write-enhanced Single-ended 11T SRAM Enabling Single Bitcell Reconfigurable Compute-in-Memory Employing Complementary FETs. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Yi Han, Jingxuan Sun, Jin Hee Bae, Detlev Grützmacher, Joachim Knoch, Qing-Tai Zhao High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Shinichi Takagi Reservoir computing utilizing ferroelectric-gate-insulator FETs and capacitors. Search on Bibsonomy ICICDT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Shinichi Takagi, Kasidit Toprasertpong, Eishin Nako, Zeyu Wang, Rikuo Suzuki, Shin-Yi Min, Mitsuru Takenaka, Ryosho Nakane Reservoir Computing Utilizing Ferroelectric-Gate-Insulator FETs and Capacitors. Search on Bibsonomy ICICDT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Xiao Yu Disturb-Free Operation Scheme and Application for Multilevel Cell Ferroelectric FETs NAND Array. Search on Bibsonomy ICICDT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Xinze Li, Yuxuan Wu, Qiao Teng, Ying Sun, Xiao Gong, Guillaume Besnard, Christophe Maleville, Olivier Weber, Rui Zhang, Bing Chen, Dawei Gao, Ran Cheng Investigation of Random Telegraph Noise in Advanced Silicon-On-Insulator N-FETs: The Impact of Back Bias, Strain, and Hot Carrier Stress. Search on Bibsonomy ICICDT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Ankit Kumar, Arnab Pal, Kamyar Parto, Wei Cao, Kaustav Banerjee Exploration and Exploitation of Strain Engineering in 2D-FETs. Search on Bibsonomy DRC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi Negative capacitance FETs for energy efficient and hardware secure logic designs. Search on Bibsonomy Microelectron. J. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Adelcio M. de Souza, Daniel R. Celino, Regiane Ragi, Murilo Araújo Romero Fully analytical compact model for the Q-V and C-V characteristics of cylindrical junctionless nanowire FETs. Search on Bibsonomy Microelectron. J. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Ajit Kumar, Pramod Kumar Tiwari, J. N. Roy Subthreshold model of asymmetric GAA junctionless FETs with scaled equivalent oxide thickness. Search on Bibsonomy Microelectron. J. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Yasmine Elogail, Fritz Berkmann, Caterina J. Clausen, Inga A. Fischer, Linda A. Hänel, Daniel Schwarz, Jörg Schulze Investigation of Ge-Based P-Channel Planar-Doped Barrier FETs integrated on Si. Search on Bibsonomy Microelectron. J. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Daniel Lizzit, David Esseni Operation and Design of Ferroelectric FETs for a BEOL Compatible Device Implementation. Search on Bibsonomy CoRR The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Dejin Zhou, Hongliang Lu, Shu Yuan, Ningye He, Yuan Xu, Rengxia Ning, Zhenhai Chen, Wei Huang A 20MHz 4A gate driver with 5.5 to 24V output drive voltage for wide bandgap FETs. Search on Bibsonomy IEICE Electron. Express The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Sanjay Das, Arun Govindankutty, Shan Deng, Kai Ni 0004, Sumitha George Adaptable Multi-level Voltage to Binary Converter Using Ferroelectric FETs. Search on Bibsonomy ISVLSI The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Asifa Amin, Aarti Rathi, Sujit K. Singh, Abhisek Dixit, Oscar Huerta-Gonzalez, P. Srinivasan 0002, Fernando Guarin Deep Cryogenic Temperature TDDB in 45-nm PDSOI N-channel FETs for Quantum Computing Applications. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19L. Fursin, P. Losee, Akin Akturk Investigation of Terrestrial Neutron Induced Failure Rates in Silicon Carbide JFET Based Cascode FETs. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Masaharu Kobayashi Monolithic 3D Integration of Oxide Semiconductor FETs and Memory Devices for AI Acceleration (Invited). Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Kookjin Lee, Ben Kaczer, Anastasiia Kruv, Mario Gonzalez, Geert Eneman, Oguzhan O. Okudur, Alexander Grill, Jacopo Franco, Andrea Vici, Robin Degraeve, Ingrid De Wolf Significant Enhancement of HCD and TDDB in CMOS FETs by Mechanical Stress. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Erik Bury, Adrian Vaisman Chasin, Jacopo Franco, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Nilotpal Choudhury, Ayush Ranjan, Souvik Mahapatra Decoupling of NBTI and Pure HCD Contributions in p-GAA SNS FETs Under Mixed VG/VD Stress. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Theresia Knobloch, Yury Yu. Illarionov, Tibor Grasser Finding Suitable Gate Insulators for Reliable 2D FETs. Search on Bibsonomy IRPS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Vasilis Siomos, Giacomo Tarroni, Jonathan Passerat-Palmbach FeTS Challenge 2022 Task 1: Implementing FedMGDA + and a New Partitioning. Search on Bibsonomy BrainLes@MICCAI (2) The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Sadegh Kamaei, Ali Saeidi, Xia Liu, Carlotta Gastaldi, Clara Moldovan, Jürgen Brugger, Adrian M. Ionescu Fully integrated Si: HfO2 Negative Capacitance 2D-2D WSe2/SnSe2 Subthermionic Tunnel FETs. Search on Bibsonomy ESSCIRC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Zijie Zheng, Chen Sun 0010, Leming Jiao, Dong Zhang, Zuopu Zhou, Xiaolin Wang, Gan Liu, Qiwen Kong, Yue Chen, Kai Ni, Xiao Gong Boosting the Memory Window of the BEOL-Compatible MFMIS Ferroelectric/ Anti-Ferroelectric FETs by Charge Injection. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Pai-Ying Liao, Sami Alajlouni, Mengwei Si, Zhuocheng Zhang, Zehao Lin, Jinhyun Noh, Calista Wilk, Ali Shakouri, Peide D. Ye Thermal Studies of BEOL-compatible Top-Gated Atomically Thin ALD In2O3 FETs. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Zehao Lin, Mengwei Si, Peide D. Ye Ultra-Fast Operation of BEOL-Compatible Atomic-Layer-Deposited In2O3 Fe-FETs: Achieving Memory Performance Enhancement with Memory Window of 2.5 V and High Endurance > 109 Cycles without VT Drift Penalty. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Jingrui Guo, Ying Sun, Lingfei Wang, Xinlv Duan, Kailiang Huang, Zhaogui Wang, Junxiao Feng, Qian Chen, Shijie Huang, Lihua Xu, Di Geng, Guangfan Jiao, Shihui Yin, Zhengbo Wang, Weiliang Jing, Ling Li, Ming Liu Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Yiju Zhao, Youngki Yoon, Lan Wei A Multi-Level Simulation of GeH FETs: From Nanomaterial and Device Characteristics to Circuit Performance Optimization. Search on Bibsonomy NANOARCH The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Yannick Raffel, Ricardo Olivo, Maximilian Lederer, Franz Müller 0001, R. Hoffmann, Tarek Ali, Konstantin Mertens, Luca Pirro, Maximilian Drescher, Sven Beyer, Thomas Kämpfe, Konrad Seidel, Lukas M. Eng, J. Heitmann Endurance improvements and defect characterization in ferroelectric FETs through interface fluorination. Search on Bibsonomy IMW The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Reena Elangovan, Ashish Ranjan 0001, Niharika Thakuria, Sumeet Kumar Gupta, Anand Raghunathan Energy Efficient Cache Design with Piezoelectric FETs. Search on Bibsonomy ISLPED The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks. Search on Bibsonomy iSES The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Aruru Sai Kumar, M. Deekshana, V. Bharath Sreenivasulu, Rajendra Prasad Somineni, D. Kanthi Sudha Characterization for Sub-5nm Technology Nodes of Junctionless Gate-All-Around Nanowire FETs. Search on Bibsonomy ICCCNT The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Anirban Kar, Swapna Sarker, Avirup Dasgupta, Yogesh Singh Chauhan Impact of Corner Rounding on Quantum Confinement in GAA Nanosheet FETs for Advanced Technology Nodes. Search on Bibsonomy DRC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19L. Panarella, Quentin Smets, Devin Verreck, Tom Schram, Daire Cott, I. Asselberghs, Ben Kaczer Analysis of BTI in 300 mm integrated dual-gate WS2 FETs. Search on Bibsonomy DRC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Jun-Sik Yoon, Seunghwan Lee, Hyeok Yun, Rock-Hyun Baek Digital/Analog Performance Optimization of Vertical Nanowire FETs Using Machine Learning. Search on Bibsonomy IEEE Access The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Jinsu Jeong, Jun-Sik Yoon, Rock-Hyun Baek Analysis of TSV-Induced Mechanical Stress and Electrical Noise Coupling in Sub 5-nm Node Nanosheet FETs for Heterogeneous 3D-ICs. Search on Bibsonomy IEEE Access The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Mamidala Karthik Ram, Neha Tiwari, Dawit Burusie Abdi, Sneh Saurabh Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis. Search on Bibsonomy IEEE Access The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Saambhavi Baskaran, Jack Sampson Evaluation of Tradeoffs in the Design of FPGA Fabrics Using Electrostrictive 2-D FETs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Chandrasekar Lakshumanan, Kumar Prasannajit Pradhan Memoryless non-linearity in B-Substitution doped and undoped graphene FETs: A comparative investigation. Search on Bibsonomy IET Circuits Devices Syst. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Guodong Yin, Yi Cai 0003, Juejian Wu, Zhengyang Duan, Zhenhua Zhu, Yongpan Liu, Yu Wang 0002, Huazhong Yang, Xueqing Li Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Mohammad Khaleqi Qaleh Jooq, Mohammad Hossein Moaiyeri, Khalil Tamersit Ultra-Compact Ternary Logic Gates Based on Negative Capacitance Carbon Nanotube FETs. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Vinay Vashishtha, Lawrence T. Clark Comparing bulk-Si FinFET and gate-all-around FETs for the 5 ​nm technology node. Search on Bibsonomy Microelectron. J. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19V. Bharath Sreenivasulu, Vadthiya Narendar Characterization and optimization of junctionless gate-all-around vertically stacked nanowire FETs for sub-5 nm technology nodes. Search on Bibsonomy Microelectron. J. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Vandana Devi Wangkheirakpam, Brinda Bhowmick, Puspa Devi Pukhrambam Noise behavior of vertical tunnel FETs under the influence of interface trap states. Search on Bibsonomy Microelectron. J. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Weixing Huang, Huilong Zhu, Yongkui Zhang, Zhenhua Wu, Kunpeng Jia, Xiaogen Yin, Yangyang Li, Chen Li, Xuezheng Ai, Qiang Huo, Junfeng Li Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits. Search on Bibsonomy Microelectron. J. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Guodong Yin, Yi Cai 0003, Juejian Wu, Zhengyang Duan, Zhenhua Zhu, Yongpan Liu, Yu Wang 0002, Huazhong Yang, Xueqing Li Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing with Ferroelectric FETs. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
19Sarthak Pati, Ujjwal Baid, Maximilian Zenk, Brandon Edwards, Micah J. Sheller, G. Anthony Reina, Patrick Foley, Alexey Gruzdev, Jason Martin, Shadi Albarqouni, Yong Chen, Russell Taki Shinohara, Annika Reinke, David Zimmerer, John B. Freymann, Justin S. Kirby, Christos Davatzikos, Rivka R. Colen, Aikaterini Kotrotsou, Daniel S. Marcus, Mikhail Milchenko, Arash Nazeri, Hassan M. Fathallah-Shaykh, Roland Wiest, András Jakab, Marc-André Weber, Abhishek Mahajan, Lena Maier-Hein, Jens Kleesiek, Bjoern H. Menze, Klaus H. Maier-Hein, Spyridon Bakas The Federated Tumor Segmentation (FeTS) Challenge. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
19David Esseni, Riccardo Fontanini, Daniel Lizzit, Marco Massarotto, Francesco Driussi, Mirko Loghi Ferroelectric based FETs and synaptic devices for highly energy efficient computational technologies. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
19Amita Rawat, Krishna K. Bhuwalka, Philippe Matagne, Bjorn Vermeersch, Hao Wu, Geert Hellings, Julien Ryckaert, Changze Liu Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner-spacers and Epi-induced Stress: Understanding & Mitigating Process Risks. Search on Bibsonomy ESSDERC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Daniel Lizzit, David Esseni Operation and Design of Ferroelectric FETs for a BEOL Compatible Device Implementation. Search on Bibsonomy ESSDERC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19P. Srinivasan 0002, Fernando Guarin, Shafi Syed, Joris Angelo Sundaram Jerome, Wen Liu, Sameer H. Jain, Dimitri Lederer, Stephen Moss, Paul Colestock, Anirban Bandyopadhyay, Ned Cahoon, Byoung Min, Martin Gall RF Reliability of SOI-based Power Amplifier FETs for mmWave 5G Applications. Search on Bibsonomy IRPS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Nilotpal Choudhury, Tarun Samadder, Ravi Tiwari, Huimei Zhou, Richard G. Southwick, Miaomiao Wang 0006, Souvik Mahapatra Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETs. Search on Bibsonomy IRPS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Amita Rawat, Krishna K. Bhuwalka, Philippe Matagne, Bjorn Vermeersch, Hao Wu, Geert Hellings, Julien Ryckaert, Changze Liu Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner-spacers and Epi-induced Stress: Understanding & Mitigating Process Risks. Search on Bibsonomy ESSCIRC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Yusuke Hatakenaka, Kazuhiro Umetani, Masataka Ishihara, Eiji Hiraki, Hiroshi Tadano Parasitic Inductance Design for Preventing Oscillatory False Triggering of Parallel-Connected GaN-FETs. Search on Bibsonomy IECON The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19David E. Root, Jianjun Xu, Masaya Iwamoto Thermal Resistance Formulation and Analysis of III-V FETs Based on DC Electrical Data. Search on Bibsonomy BCICTS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Chi-Yo Huang, Ying-Ting Kuo, Liang-Chieh Wang, Yi-Hao Hsiao, Chia-Lee Yang Technology Roadmapping for the GAA-FETs Based on the Methods of Patent Mining, Fuzzy Knapsack Problem, and Fuzzy Competence Set Expansion. Search on Bibsonomy iFUZZY The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
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