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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 24 occurrences of 21 keywords
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Results
Found 49 publication records. Showing 49 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
123 | Koji Asari, Yukio Mitsuyama, Takao Onoye, Isao Shirakawa, Hiroshige Hirano, Toshiyuki Honda, Tatsuo Otsuki, Takaaki Baba, Teresa H. Meng |
FeRAM Circuit Technology for System on a Chip. |
Evolvable Hardware |
1999 |
DBLP DOI BibTeX RDF |
|
55 | Betty Prince |
Embedded non-volatile memories. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FeRAM, MONOS, PC-RAM, SONOS, floating gate memory, nanocrystal memory, nitride storage memory, trapping site memory, flash memory, embedded memory, non-volatile memory, MRAM |
48 | In Hwan Doh, Young Jin Kim, Jung Soo Park, Eunsam Kim, Jongmoo Choi, Donghee Lee 0001, Sam H. Noh |
Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grain scale. |
Conf. Computing Frontiers |
2010 |
DBLP DOI BibTeX RDF |
non-volatile ram (nvram), storage class memory (scm), power management, servers |
48 | Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Shoichi Masui, Kenji Mukaida |
An area-efficient universal cryptography processor for smart cards. |
IEEE Trans. Very Large Scale Integr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
48 | John Y. Fong, Randy Acklin, John Roscher, Feng Li, Cindy Laird, Cezary Pietrzyk |
Nonvolatile Repair Caches Repair Embedded SRAM and New Nonvolatile Memories. |
DFT |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Betty Prince |
Nanotechnology and emerging memories. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FeRAM, ferroelectric, floating body, nanocrystal, nitride storage, scaling issues, single electron memories, memory, variability, scaling, SRAM, MEMs, DRAM, flash, MRAM, phase change, non-volatile, molecular memory |
31 | Erwin J. Prinz |
The zen of nonvolatile memories. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
FeRAM, SONOS, nanocrystal, oating gate, phase change memory, MRAM, nonvolatile memories |
27 | Qiqiao Wu, Yue Cao, Qing Luo, Haijun Jiang, Zhongze Han, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu 0010, Jianguo Yang, Ming Liu 0022 |
A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. |
IEEE J. Solid State Circuits |
2024 |
DBLP DOI BibTeX RDF |
|
27 | Wenwu Xiao, Yue Peng, Yan Liu, Huifu Duan, Fujun Bai, Bing Yu, Qiwei Ren, Xiao Yu, Genquan Han |
Hf0.5Zr0.5O2 1T-1C FeRAM arrays with excellent endurance performance for embedded memory. |
Sci. China Inf. Sci. |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Jean-Philippe Noël, E. Valea, Laurent Grenouillet, B. Chapuis, C. Fisher, A. Recoquillay, Bastien Giraud |
Compute-In-Place Serial FeRAM: Enhancing Performance, Efficiency and Adaptability in Critical Embedded Systems. |
VLSI-SoC |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Tiancheng Cao, Zhongyi Zhang, Wang Ling Goh, Chen Liu 0009, Yao Zhu, Yuan Gao 0011 |
A Ternary Weight Mapping and Charge-mode Readout Scheme for Energy Efficient FeRAM Crossbar Compute-in-Memory System. |
AICAS |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Kuo-Yu Hsiang, J.-Y. Lee, F.-S. Chang, Z.-F. Lou, Z.-X. Li, Z.-H. Li, J.-H. Chen, C. W. Liu, T.-H. Hou, Min-Hung Lee |
FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM Operations. |
VLSI Technology and Circuits |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao 0005, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu |
First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip. |
VLSI Technology and Circuits |
2023 |
DBLP DOI BibTeX RDF |
|
27 | J. Laguerre, Marc Bocquet, Olivier Billoint, S. Martin, Jean Coignus, Catherine Carabasse, Thomas Magis, T. Dewolf, François Andrieu, Laurent Grenouillet |
Memory Window in Si: HfO2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes. |
IMW |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Jianguo Yang, Qing Luo, Xiaoyong Xue, Haijun Jiang, Qiqiao Wu, Zhongze Han, Yue Cao, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu 0010, Ming Liu 0022 |
A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. |
ISSCC |
2023 |
DBLP DOI BibTeX RDF |
|
27 | Yandong Luo, Yuan-Chun Luo, Shimeng Yu |
A FeRAM based Volatile/Non-volatile Dual-mode Buffer Memory for Deep Neural Network Training. |
DATE |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Jun Okuno, Takafumi Kunihiro, Kenta Konishi, Hideki Maemura, Yusuke Shuto, Fumitaka Sugaya, Monica Materano, Tarek Ali, Maximilian Lederer, Kati Kühnel, Konrad Seidel, Uwe Schroeder, Thomas Mikolajick, Masanori Tsukamoto, Taku Umebayashi |
High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory Application. |
IMW |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Jae Hur, Yuan-Chun Luo, Zheng Wang, Wonbo Shim, Asif Islam Khan, Shimeng Yu |
A Technology Path for Scaling Embedded FeRAM to 28nm with 2T1C Structure. |
IMW |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Pai-Ying Liao, Mengwei Si, Gang Qiu, Peide D. Ye |
2D Ferroelectric CuInP2S6: Synthesis, ReRAM, and FeRAM. |
DRC |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Shoichiro Kawashima, Keizo Morita, Mitsuharu Nakazawa, Kazuaki Yamane, Mitsuhiro Ogai, Kuninori Kawabata, Kazuaki Takai, Yasuhiro Fujii, Ryoji Yasuda, Wensheng Wang, Yukinobu Hikosaka, Ken'ichi Inoue |
An 8-Mbit 0.18-µm CMOS 1T1C FeRAM in Planar Technology. |
IEICE Trans. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Taiki Uemura, Masanori Hashimoto |
Investigation of single event upset and total ionizing dose in FeRAM for medical electronic tag. |
IRPS |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Yozaburo Nakai, Shintaro Izumi, Ken Yamashita, Masanao Nakano, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto |
A 14µA ECG processor with noise tolerant heart rate extractor and FeRAM for wearable healthcare systems. |
ASP-DAC |
2015 |
DBLP DOI BibTeX RDF |
|
27 | Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan |
A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems. |
IEEE J. Solid State Circuits |
2014 |
DBLP DOI BibTeX RDF |
|
27 | Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan |
A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems. |
ISSCC |
2013 |
DBLP DOI BibTeX RDF |
|
27 | Daisaburo Takashima, Yasushi Nagadomi, Tohru Ozaki |
A 100 MHz Ladder FeRAM Design With Capacitance-Coupled-Bitline (CCB) Cell. |
IEEE J. Solid State Circuits |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Daisaburo Takashima, Yasushi Nagadomi, Kosuke Hatsuda, Yohji Watanabe, Shuso Fujii |
A 128 Mb Chain FeRAM and System Design for HDD Application and Enhanced HDD Performance. |
IEEE J. Solid State Circuits |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Masahiro Iida, Masahiro Koga, Kazuki Inoue, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi |
A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. |
IEICE Trans. Electron. |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Michael Zwerg, Adolf Baumann, Rüdiger Kuhn, Matthias Arnold, Ronald Nerlich, Marcus Herzog, Ralph Ledwa, Christian Sichert, Volker Rzehak, Priya Thanigai, Björn Oliver Eversmann |
An 82μA/MHz microcontroller with embedded FeRAM for energy-harvesting applications. |
ISSCC |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan |
A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS. |
ISSCC |
2011 |
DBLP DOI BibTeX RDF |
|
27 | Hidehiro Shiga, Daisaburo Takashima, Shinichiro Shiratake, Katsuhiko Hoya, Tadashi Miyakawa, Ryu Ogiwara, Ryo Fukuda, Ryosuke Takizawa, Kosuke Hatsuda, Fumiyoshi Matsuoka, Yasushi Nagadomi, Daisuke Hashimoto, Hisaaki Nishimura, Takeshi Hioka, Sumiko M. Doumae, Shoichi Shimizu, Mitsumo Kawano, Toyoki Taguchi, Yohji Watanabe, Shuso Fujii, Tohru Ozaki, Hiroyuki Kanaya, Yoshinori Kumura, Yoshiro Shimojo, Yuki Yamada, Yoshihiro Minami, Susumu Shuto, Koji Yamakawa, Soichi Yamazaki, Iwao Kunishima, Takeshi Hamamoto, Akihiro Nitayama, Tohru Furuyama |
A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes. |
IEEE J. Solid State Circuits |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Katsuhiko Hoya, Daisaburo Takashima, Shinichiro Shiratake, Ryu Ogiwara, Tadashi Miyakawa, Hidehiro Shiga, Sumiko M. Doumae, Sumito Ohtsuki, Yoshinori Kumura, Susumu Shuto, Tohru Ozaki, Koji Yamakawa, Iwao Kunishima, Akihiro Nitayama, Shuso Fujii |
A 64-Mb Chain FeRAM With Quad BL Architecture and 200 MB/s Burst Mode. |
IEEE Trans. Very Large Scale Integr. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Masahiro Koga, Masahiro Iida, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi |
First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. |
FPL |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Daisaburo Takashima, Hidehiro Shiga, Daisuke Hashimoto, Tadashi Miyakawa, Shinichiro Shiratake, Katsuhiko Hoya, Ryu Ogiwara, Ryosuke Takizawa, Ryosuke Doumae, Ryo Fukuda, Yohji Watanabe, Shuso Fujii, Tohru Ozaki, Hiroyuki Kanaya, Susumu Shuto, Koji Yamakawa, Iwao Kunishima, Takeshi Hamamoto, Akihiro Nitayama |
A scalable shield-bitline-overdrive technique for 1.3V Chain FeRAM. |
ISSCC |
2010 |
DBLP DOI BibTeX RDF |
|
27 | Hidehiro Shiga, Daisaburo Takashima, Shinichiro Shiratake, Katsuhiko Hoya, Tadashi Miyakawa, Ryu Ogiwara, Ryo Fukuda, Ryosuke Takizawa, Kosuke Hatsuda, Fumiyoshi Matsuoka, Yasushi Nagadomi, Daisuke Hashimoto, Hisaaki Nishimura, Takeshi Hioka, Sumiko M. Doumae, Shoichi Shimizu, Mitsumo Kawano, Toyoki Taguchi, Yohji Watanabe, Shuso Fujii, Tohru Ozaki, Hiroyuki Kanaya, Yoshinori Kumura, Yoshiro Shimojo, Yuki Yamada, Yoshihiro Minami, Susumu Shuto, Koji Yamakawa, Soichi Yamazaki, Iwao Kunishima, Takeshi Hamamoto, Akihiro Nitayama, Tohru Furuyama |
A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes. |
ISSCC |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Shoichiro Kawashima, Isao Fukushi, Keizo Morita, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Kazuaki Yamane, Tomohisa Hirayama, Toru Endo |
A Reliable 1T1C FeRAM Using a Thermal History Tracking 2T2C Dual Reference Level Technique for a Smart Card Application Chip. |
IEICE Trans. Electron. |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Katsuhiko Hoya, Daisaburo Takashima, Shinichiro Shiratake, Ryu Ogiwara, Tadashi Miyakawa, Hidehiro Shiga, Sumiko M. Doumae, Sumito Ohtsuki, Yoshinori Kumura, Susumu Shuto, Tohru Ozaki, Koji Yamakawa, Iwao Kunishima, Akihiro Nitayama, Shuso Fujii |
A 64Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode. |
ISSCC |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Hiroyuki Nakamoto, Daisuke Yamazaki, Takuji Yamamoto, Hajime Kurata, Satoshi Yamada, Kenji Mukaida, Tsuzumi Ninomiya, Takashi Ohkawa, Shoichi Masui, Kunihiko Gotoh |
A Passive UHF RFID Tag LSI with 36.6% Efficiency CMOS-Only Rectifier and Current-Mode Demodulator in 0.35µm FeRAM Technology. |
ISSCC |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Kunisato Yamaoka, Shunichi Iwanari, Yasuo Murakuki, Hiroshige Hirano, Masahiko Sakagami, Tetsuji Nakakuma, Takashi Miki, Yasushi Gohou |
A 0.9-V 1T1C SBT-based embedded nonvolatile FeRAM with a reference voltage scheme and multilayer shielded bit-line structure. |
IEEE J. Solid State Circuits |
2005 |
DBLP DOI BibTeX RDF |
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27 | Yadollah Eslami, Ali Sheikholeslami, Shoichi Masui, Toru Endo, Shoichiro Kawashima |
Circuit implementations of the differential capacitance read scheme (DCRS) for ferroelectric random-access memories (FeRAM). |
IEEE J. Solid State Circuits |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Shinichiro Shiratake, Tadashi Miyakawa, Yoshiaki Takeuchi, Ryu Ogiwara, Masahiro Kamoshida, Katsuhiko Hoya, Kohei Oikawa, Tohru Ozaki, Iwao Kunishima, Koji Yamakawa, Shigeki Sugimoto, Daisaburo Takashima, Hans-Oliver Joachim, Norbert Rehm, Joerg Wohlfahrt, Nicolas Nagel, Gerhard Beitel, Michael Jacob, Thomas Roehr |
A 32-Mb chain FeRAM with segment/stitch array architecture. |
IEEE J. Solid State Circuits |
2003 |
DBLP DOI BibTeX RDF |
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27 | Shoichiro Kawashima, Toru Endo, Akira Yamamoto, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Keizo Morita, Masaki Aoki |
Bitline GND sensing technique for low-voltage operation FeRAM. |
IEEE J. Solid State Circuits |
2002 |
DBLP DOI BibTeX RDF |
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27 | Junichi Yamada, Tohru Miwa, Hiroki Koike, Hideo Toyoshima, Kazushi Amanuma, Sota Kobayashi, Toru Tatsumi, Yukihiko Maejima, Hiromitsu Hada, Hidemitsu Mori, Seiichi Takahashi, Hidenori Takeuchi, Takemitsu Kunio |
A 128-kb FeRAM macro for contact/contactless smart-card microcontrollers. |
IEEE J. Solid State Circuits |
2002 |
DBLP DOI BibTeX RDF |
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27 | Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo, Shoichiro Kawashima |
A 16 kb 1T1C FeRAM test chip using current-based reference scheme. |
CICC |
2002 |
DBLP DOI BibTeX RDF |
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27 | S. L. Lung, Dennis Lin, S. S. Chen, Gary Weng, C. L. Liu 0001, S. C. Lai, C. W. Tsai, T. B. Wu, Rich Liu |
Modularized low temperature LNO/PZT/LNO ferroelectric capacitor-over-interconnect (COI) FeRAM for advanced SOC (ASOC) application. |
CICC |
2002 |
DBLP DOI BibTeX RDF |
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27 | Thomas Mikolajick, Christine Dehm, Walter Hartner, Ivan Kasko, Marcus J. Kastner, Nicolas Nagel, Manfred Moert, Carlos Mazure |
FeRAM technology for high density applications. |
Microelectron. Reliab. |
2001 |
DBLP DOI BibTeX RDF |
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27 | Hideo Toyoshima, Sota Kobayashi, Junichi Yamada, Tohru Miwa, Hiroki Koike, Hidenori Takeuchi, Hidemitsu Mori, Naoki Kasai, Yukihiko Maejima, Nobuhira Tanabe, Toru Tatsumi, Hiromitsu Hada |
FeRAM device and circuit technologies fully compatible with advanced CMOS. |
CICC |
2001 |
DBLP DOI BibTeX RDF |
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27 | Tohru Miwa, Junichi Yamada, Yuji Okamoto, Hiroki Koike, Hideo Toyoshiina, Hiromitsu Hada, Yoshihiro Hayashi, Hiroaki Oliizaki, Yoichi Miyasalca, Takemitsu Kunio, Hidenobu Miyamoto, Hideki Gomi, Hiroshi Kitajima |
An embedded FeRAM macro cell for a smart card microcontroller. |
CICC |
1998 |
DBLP DOI BibTeX RDF |
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24 | William Enck, Kevin R. B. Butler, Thomas Richardson, Patrick D. McDaniel, Adam D. Smith |
Defending Against Attacks on Main Memory Persistence. |
ACSAC |
2008 |
DBLP DOI BibTeX RDF |
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24 | In Hwan Doh, Jongmoo Choi, Donghee Lee 0001, Sam H. Noh |
Exploiting non-volatile RAM to enhance flash file system performance. |
EMSOFT |
2007 |
DBLP DOI BibTeX RDF |
non-volatile RAM, metadata, file system, flash memory, experimental evaluation |
Displaying result #1 - #49 of 49 (100 per page; Change: )
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