Search results for "Floorplans"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
101	Claudia I. Horta, José A. Lima	Slicing and non-slicing, unified and rotation independent, algebraic representation of floorplans.	EUROMICRO	1997	DBLP DOI BibTeX RDF	floorplan area optimization problem, rectangle envelope, nonoverlapping basic rectangles, floorplan topology, formal algebraic specification, SETS notation, VLSI physical design layout, module dimensions, arbitrarily complex composite floorplans, rotation-invariant single-expression formalism, generalized wheels floorplans, slicing representation, nonslicing representation, unified representation, topology-dimensionless description, floorplanning problem algorithms, algebraic specification, line segments, relative positioning
91	Shin-Ichi Nakano	Enumerating Floorplans with n Rooms.	ISAAC	2001	DBLP DOI BibTeX RDF	Graphs, Enumeration, Listing, Plane graphs
87	Parthasarathi Dasgupta, Susmita Sur-Kolay	Slicible rectangular graphs and their optimal floorplans.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	graph dualization, nonslicible floorplans, slicible floorplans, heuristic search, planar graphs, Floorplanning
64	Yun-Chih Chang, Yao-Wen Chang, Guang-Ming Wu, Shu-Wei Wu	B*-Trees: a new representation for non-slicing floorplans.	DAC	2000	DBLP DOI BibTeX RDF
64	Peichen Pan, C. L. Liu 0001	Area minimization for floorplans.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
55	Jia Wang 0003, Hai Zhou 0001	Exploring adjacency in floorplanning.	ASP-DAC	2009	DBLP DOI BibTeX RDF
55	Lei Cheng 0001, Liang Deng, Martin D. F. Wong	Floorplanning for 3-D VLSI design.	ASP-DAC	2005	DBLP DOI BibTeX RDF
55	Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Ronald L. Graham	Revisiting floorplan representations.	ISPD	2001	DBLP DOI BibTeX RDF
55	Shmuel Wimer, Israel Koren, Israel Cederbaum	Optimal aspect ratios of building blocks in VLSI.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
55	Shmuel Wimer, Israel Koren, Israel Cederbaum	Optimal Aspect Ratios of Building Blocks in VLSI.	DAC	1988	DBLP BibTeX RDF
51	Parthasarathi Dasgupta, Susmita Sur-Kolay	Slicibility of rectangular graphs and floorplan optimization.	ISPD	1997	DBLP DOI BibTeX RDF	graph dualization, nonslicible floorplans, slicible floorplans, very large scale integration, heuristic search, planar graphs, floorplanning
50	Zion Cien Shen, Chris C. N. Chu	Bounds on the number of slicing, mosaic, and general floorplans.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
50	Silke Salewski, Erich Barke	An Upper Bound for 3D Slicing Floorplans.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
50	Helvio P. Peixoto, Margarida F. Jacome, Ander Royo	A Tight Area Upper Bound for Slicing Floorplans.	VLSI Design	2000	DBLP DOI BibTeX RDF	Early area estimation, slicing floorplan, system level design
50	Peichen Pan, Weiping Shi, C. L. Liu 0001	Area minimization for hierarchical floorplans.	ICCAD	1994	DBLP DOI BibTeX RDF
48	J. T. Mowchenko, Y. Yang	Optimizing wiring space in slicing floorplans.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	wiring space optimisation, slicing floorplans, net density, sibling rectangles, circuit modules, routed layouts, VLSI, heuristic, network routing, circuit layout CAD, circuit optimisation, integrated circuit layout, branch and bound algorithm, wiring, IC layout
42	Song Chen 0001, Takeshi Yoshimura	On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence.	APCCAS	2006	DBLP DOI BibTeX RDF
42	Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang 0003, Hsin-Hsien Ho	Modem floorplanning with abutment and fixed-outline constraints.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
42	Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Ronald L. Graham	Floorplan representations: Complexity and connections.	ACM Trans. Design Autom. Electr. Syst.	2003	DBLP DOI BibTeX RDF	Baxter permutation, Floorplan representation, O-tree, mosaic floorplan, number of combinations, twin binary trees
42	D. F. Wong 0001, P. S. Sakhamuri	Efficient Floorplan Area Optimization.	DAC	1989	DBLP DOI BibTeX RDF
40	P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya	VLSI floorplan generation and area optimization using AND-OR graph search.	VLSI Design	1995	DBLP DOI BibTeX RDF	VLSI floorplan generation, AND-OR graph search, rectangular dualization, minimum-area floorplan, optimal sizing, heuristic search method, top-down first phase, search effort, bottom-up polynomial-time algorithm, nonslicible floorplans, VLSI, graph theory, circuit layout CAD, circuit optimisation, integrated circuit interconnections, aspect ratios, area optimization, adjacency graph
36	Jai-Ming Lin, Yao-Wen Chang	TCG: A transitive closure graph-based representation for general floorplans.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
36	Jai-Ming Lin, Yao-Wen Chang	TCG-S: orthogonal coupling of P*-admissible representations for general floorplans.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
36	Jai-Ming Lin, Yao-Wen Chang	TCG-S: orthogonal coupling of P*-admissible representations for general floorplans.	DAC	2002	DBLP DOI BibTeX RDF
36	Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya	Partitioning VLSI Floorplans by Staircase Channels for Global Routing.	VLSI Design	1998	DBLP DOI BibTeX RDF	maxflow-mincut, algorithms, complexity, partitioning, NP-completeness, Global routing
36	Weiping Shi	A fast algorithm for area minimization of slicing floorplans.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
36	Weiping Shi	An optimal algorithm for area minimization of slicing floorplans.	ICCAD	1995	DBLP DOI BibTeX RDF	floorplan, area optimization, area minimization
36	Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya	A unified approach to topology generation and area optimization of general floorplans.	ICCAD	1995	DBLP DOI BibTeX RDF	VLSI floorplanning, AND-OR graphs, placement, heuristic search
28	Chaomin Luo, Miguel F. Anjos, Anthony Vannelli	Large-scale fixed-outline floorplanning design using convex optimization techniques.	ASP-DAC	2008	DBLP DOI BibTeX RDF
28	Pradeep Fernando, Srinivas Katkoori	An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning.	VLSI Design	2008	DBLP DOI BibTeX RDF
28	Love Singhal, Elaheh Bozorgzadeh	Novel Multi-Layer floorplanning for Heterogeneous FPGAs.	FPL	2007	DBLP DOI BibTeX RDF
28	Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang 0003, Ching-Hwa Cheng	Noise-Aware Floorplanning for Fast Power Supply Network Design.	ISCAS	2007	DBLP DOI BibTeX RDF
28	Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat	Floorplan repair using dynamic whitespace management.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	VLSI, placement, floorplanning, legalization
28	Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir	STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs.	VLSI Design	2007	DBLP DOI BibTeX RDF
28	Cara Winterbottom, Edwin H. Blake, James E. Gain	Using Visualizations to Support Design and Debugging in Virtual Reality.	ISVC (1)	2006	DBLP DOI BibTeX RDF
28	Love Singhal, Elaheh Bozorgzadeh	Multi-layer Floorplanning on a Sequence of Reconfigurable Designs.	FPL	2006	DBLP DOI BibTeX RDF
28	Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir	Floorplan driven leakage power aware IP-based SoC design space exploration.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	floorplan, leakage power, temperature
28	Rong Liu, Sheqin Dong, Xianlong Hong	Fixed-outline floorplanning based on common subsequence.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	common subsequence, floorplanning, fixed-outline
28	Jason Cong, Gabriele Nataneli, Michail Romesis, Joseph R. Shinnerl	An area-optimality study of floorplanning.	ISPD	2004	DBLP DOI BibTeX RDF	area partitioning, block packing, optimality, benchmarking, placement, floorplanning, aspect ratios
28	Martin D. F. Wong	Reticle Floorplanning with Guaranteed Yield for Multi-Project Wafers.	ICCD	2004	DBLP DOI BibTeX RDF
28	Hayward H. Chan, Igor L. Markov	Practical slicing and non-slicing block-packing without simulated annealing.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	block-packing, optimal, evaluation, branch-and-bound, floorplanning, slicing, hierarchical, large-scale, soft blocks
28	Yan Feng, Dinesh P. Mehta	Constrained Floorplanning with Whitespace.	VLSI Design	2004	DBLP DOI BibTeX RDF
28	Shuo Zhou, Sheqin Dong, Chung-Kuan Cheng, Jun Gu	ECBL: an extended corner block list with solution space including optimum placement.	ISPD	2001	DBLP DOI BibTeX RDF
28	Sylvie Fontaine	Spatial Cognition and the Processing of Verticality in Underground Environments.	COSIT	2001	DBLP DOI BibTeX RDF	underground and urban environments, spatial cognition, verticality, navigational aids
28	Christine L. Valenzuela, Pearl Y. Wang	A Genetic Algorithm for VLSI Floorplanning.	PPSN	2000	DBLP DOI BibTeX RDF
28	Takayuki Yamanouchi, Kazuo Tamakashi, Takashi Kambe	Hybrid floorplanning based on partial clustering and module restructuring.	ICCAD	1996	DBLP DOI BibTeX RDF	slicing structure, clustering, placement, floorplanning
26	Steven A. Shafer	A Framework for Creating and Using Maps of Privately Owned Spaces.	LoCA	2009	DBLP DOI BibTeX RDF	Indoor maps, Location-Awareness, Floorplans, Indoor location
22	Katsuhisa Yamanaka, Shin-Ichi Nakano	Enumerating floorplans with walls.	Discret. Appl. Math.	2024	DBLP DOI BibTeX RDF
22	Vahid Azizi 0003, Muhammad Usman 0010, Samuel S. Sohn, Mathew Schwartz, Seonghyeon Moon, Petros Faloutsos, Mubbasir Kapadia	The role of latent representations for design space exploration of floorplans.	Simul.	2023	DBLP DOI BibTeX RDF
22	Luyu Jiang, Dantong Ouyang, Huisi Zhou, Naiyu Tian, Liming Zhang 0005	DPAHMA: a novel dual-population adaptive hybrid memetic algorithm for non-slicing VLSI floorplans.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
22	Patrick Berggold, Stavros Nousias, Rohit Kumar Dubey, André Borrmann	Towards predicting Pedestrian Evacuation Time and Density from Floorplans using a Vision Transformer.	CoRR	2023	DBLP DOI BibTeX RDF
22	Krishnendra Shekhawat, Rohit Lohani, Chirag Dasannacharya, Sumit Bisht, Sujay Rastogi	Automated generation of floorplans with non-rectangular rooms.	Graph. Model.	2023	DBLP DOI BibTeX RDF
22	Tianxing Jin, Jiayan Zhuang, Jiangjian Xiao, Ningyuan Xu, Shihao Qin	Reconstructing Floorplans from Point Clouds Using GAN.	J. Imaging	2023	DBLP DOI BibTeX RDF
22	Yu Yin, Will Hutchcroft, Naji Khosravan, Ivaylo Boyadzhiev, Yun Fu 0001, Sing Bing Kang	Generating Topological Structure of Floorplans from Room Attributes.	CoRR	2022	DBLP DOI BibTeX RDF
22	Wai Cheong Tam, Eugene Yujun Fu, Jiajia Li, Xinyan Huang, Jian Chen, Michael Xuelin Huang	A spatial temporal graph neural network model for predicting flashover in arbitrary building floorplans.	Eng. Appl. Artif. Intell.	2022	DBLP DOI BibTeX RDF
22	Vahid Azizi 0003, Muhammad Usman 0010, Honglu Zhou, Petros Faloutsos, Mubbasir Kapadia	Graph-based generative representation learning of semantically and behaviorally augmented floorplans.	Vis. Comput.	2022	DBLP DOI BibTeX RDF
22	Jiahui Sun, Wenming Wu, Ligang Liu, Wenjie Min, Gaofeng Zhang, Liping Zheng	WallPlan: synthesizing floorplans by learning to generate wall graphs.	ACM Trans. Graph.	2022	DBLP DOI BibTeX RDF
22	Jiyan Jonas Schneider, Takahiro Hoshino	Incremental Informational Value of Floorplans for Rent Price Prediction - Applications of Modern Computer Vision Techniques in Real-Estate.	JSAI-isAI Workshops	2022	DBLP DOI BibTeX RDF
22	Yu Yin, Will Hutchcroft, Naji Khosravan, Ivaylo Boyadzhiev, Yun Fu 0001, Sing Bing Kang	Generating Topological Structure of Floorplans from Room Attributes.	ICMR	2022	DBLP DOI BibTeX RDF
22	Deke Guo, Xiaoqiang Teng, Yulan Guo, Xiaolei Zhou 0001, Zhong Liu	SiFi: Self-Updating of Indoor Semantic Floorplans for Annotated Objects.	ACM Trans. Internet Things	2021	DBLP DOI BibTeX RDF
22	Madhawa Vidanapathirana, Qirui Wu, Yasutaka Furukawa, Angel X. Chang, Manolis Savva	Plan2Scene: Converting Floorplans to 3D Scenes.	CoRR	2021	DBLP BibTeX RDF
22	Krishnendra Shekhawat, Rahil N. Jain, Sumit Bisht, Aishwarya Kondaveeti, Dipam Goswami	Graph-based approach for enumerating floorplans based on users specifications.	Artif. Intell. Eng. Des. Anal. Manuf.	2021	DBLP DOI BibTeX RDF
22	Madhawa Vidanapathirana, Qirui Wu, Yasutaka Furukawa, Angel X. Chang, Manolis Savva	Plan2Scene: Converting Floorplans to 3D Scenes.	CVPR	2021	DBLP BibTeX RDF
22	M. Shunmugathammal, C. Christopher Columbus, S. Anand	A Novel B*tree Crossover-Based Simulated Annealing Algorithm for Combinatorial Optimization in VLSI Fixed-Outline Floorplans.	Circuits Syst. Signal Process.	2020	DBLP DOI BibTeX RDF
22	Krishnendra Shekhawat, Nitant Upasani, Sumit Bisht, Rahil N. Jain	GPLAN: Computer-Generated Dimensioned Floorplans for given Adjacencies.	CoRR	2020	DBLP BibTeX RDF
22	Vahid Azizi 0003, Muhammad Usman 0010, Honglu Zhou, Petros Faloutsos, Mubbasir Kapadia	Graph-Based Generative Representation Learning of Semantically and Behaviorally Augmented Floorplans.	CoRR	2020	DBLP BibTeX RDF
22	Oscar Mendez Maldonado, Simon Hadfield, Nicolas Pugeault, Richard Bowden	SeDAR: Reading Floorplans Like a Human - Using Deep Learning to Enable Human-Inspired Localisation.	Int. J. Comput. Vis.	2020	DBLP DOI BibTeX RDF
22	Katsuhisa Yamanaka, Shin-Ichi Nakano	Floorplans with Walls.	TAMC	2020	DBLP DOI BibTeX RDF
22	Moustafa Elhamshary, Moustafa Alzantot, Moustafa Youssef 0001	JustWalk: A Crowdsourcing Approach for the Automatic Construction of Indoor Floorplans.	IEEE Trans. Mob. Comput.	2019	DBLP DOI BibTeX RDF
22	Nitant Upasani, Krishnendra Shekhawat, Garv Sachdeva	Automated Generation of Dimensioned Rectangular Floorplans.	CoRR	2019	DBLP BibTeX RDF
22	Jiacheng Chen, Chen Liu 0012, Jiaye Wu, Yasutaka Furukawa	Floor-SP: Inverse CAD for Floorplans by Sequential Room-wise Shortest Path.	CoRR	2019	DBLP BibTeX RDF
22	Jiacheng Chen, Chen Liu 0012, Jiaye Wu, Yasutaka Furukawa	Floor-SP: Inverse CAD for Floorplans by Sequential Room-Wise Shortest Path.	ICCV	2019	DBLP DOI BibTeX RDF
22	Wojciech Jaworski, Pawel Wilk, Mateusz Juszczak, Monika Wysoczanska, Andrew YongGwon Lee	Towards automatic configuration of floorplans for Indoor Positioning System.	IPIN	2019	DBLP DOI BibTeX RDF
22	Chao Gao, Robert Harle	Semi-Automated Signal Surveying Using Smartphones and Floorplans.	IEEE Trans. Mob. Comput.	2018	DBLP DOI BibTeX RDF
22	Xiaoqiang Teng, Deke Guo, Yulan Guo, Xiang Zhao 0002, Zhong Liu	SISE: Self-Updating of Indoor Semantic Floorplans for General Entities.	IEEE Trans. Mob. Comput.	2018	DBLP DOI BibTeX RDF
22	Katsuhisa Yamanaka, Md. Saidur Rahman 0001, Shin-Ichi Nakano	Enumerating Floorplans with Columns.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2018	DBLP DOI BibTeX RDF
22	Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal	Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model.	CoRR	2018	DBLP BibTeX RDF
22	Grazyna Slusarczyk	Graph-based representation of design properties in creating building floorplans.	Comput. Aided Des.	2018	DBLP DOI BibTeX RDF
22	Seongyong Kim, Seula Park, Kiyun Yu	Application of Style Transfer in the Vectorization Process of Floorplans (Short Paper).	GIScience	2018	DBLP DOI BibTeX RDF
22	Chao Gao, Robert Harle	Semi-automated Signal Surveying Using Smartphones and Floorplans.	CoRR	2017	DBLP BibTeX RDF
22	Katsuhisa Yamanaka, Md. Saidur Rahman 0001, Shin-Ichi Nakano	Floorplans with Columns.	COCOA (1)	2017	DBLP DOI BibTeX RDF
22	Katsuhisa Yamanaka, Shin-Ichi Nakano	Uniformly Random Generation of Floorplans.	IEICE Trans. Inf. Syst.	2016	DBLP DOI BibTeX RDF
22	Divya Sharma, Chiranjoy Chattopadhyay, Gaurav Harit	A unified framework for semantic matching of architectural floorplans.	ICPR	2016	DBLP DOI BibTeX RDF
22	Jai-Ming Lin, Po-Yang Chiu, Yen-Fu Chang	SAINT: handling module folding and alignment in fixed-outline floorplans for 3D ICs.	ICCAD	2016	DBLP DOI BibTeX RDF
22	Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández 0001	On the convex formulation of area for slicing floorplans.	Integr.	2015	DBLP DOI BibTeX RDF
22	Katsuhisa Yamanaka, Shin-Ichi Nakano	Another Optimal Binary Representation of Mosaic Floorplans.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2015	DBLP DOI BibTeX RDF
22	Yi-Jun Chang, Hsu-Chun Yen	Constrained floorplans in 2D and 3D.	Theor. Comput. Sci.	2015	DBLP DOI BibTeX RDF
22	Bapi Kar, Susmita Sur-Kolay, Chittaranjan A. Mandal	A New Method for Defining Monotone Staircases in VLSI Floorplans.	ISVLSI	2015	DBLP DOI BibTeX RDF
22	Moustafa Elhamshary, Moustafa Youssef 0001	SemSense: Automatic construction of semantic indoor floorplans.	IPIN	2015	DBLP DOI BibTeX RDF
22	Stefan Felsner	Exploiting Air-Pressure to Map Floorplans on Point Sets.	J. Graph Algorithms Appl.	2014	DBLP DOI BibTeX RDF
22	Bryan Dawei He	A simple optimal binary representation of mosaic floorplans and Baxter permutations.	Theor. Comput. Sci.	2014	DBLP DOI BibTeX RDF
22	Hongxia Zhou, Chiu-Wing Sham, Hailong Yao	Slicing Floorplans with Handling Symmetry and General Placement Constraints.	ISVLSI	2014	DBLP DOI BibTeX RDF
22	Javier de San Pedro, Jordi Cortadella, Antoni Roca 0001	A hierarchical approach for generating regular floorplans.	ICCAD	2014	DBLP DOI BibTeX RDF
22	Andrei Asinowski, Gill Barequet, Mireille Bousquet-Mélou, Toufik Mansour, Ron Y. Pinter	Orders Induced by Segments in Floorplans and (2 - 14 - 3, 3 - 41 - 2)-Avoiding Permutations.	Electron. J. Comb.	2013	DBLP DOI BibTeX RDF
22	Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernández 0001	Area optimization on fixed analog floorplans using convex area functions.	DATE	2013	DBLP DOI BibTeX RDF
22	Stefan Felsner	Exploiting Air-Pressure to Map Floorplans on Point Sets.	GD	2013	DBLP DOI BibTeX RDF
22	Moustafa Alzantot, Moustafa Youssef 0001	CrowdInside: Automatic Construction of Indoor Floorplans	CoRR	2012	DBLP BibTeX RDF
22	Gregory G. Faust, Runjie Zhang, Kevin Skadron, Mircea R. Stan, Brett H. Meyer	ArchFP: Rapid prototyping of pre-RTL floorplans.	VLSI-SoC	2012	DBLP DOI BibTeX RDF
22	Moustafa Alzantot, Moustafa Youssef 0001	CrowdInside: automatic construction of indoor floorplans.	SIGSPATIAL/GIS	2012	DBLP DOI BibTeX RDF
22	Bryan D. He	Optimal Binary Representation of Mosaic Floorplans and Baxter Permutations.	FAW-AAIM	2012	DBLP DOI BibTeX RDF