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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 24 occurrences of 24 keywords
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Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
91 | Douglas J. Morrice, Richard A. Valdez, Jack P. Chida Jr., Missan Eido |
Discrete event simulation in supply chain planing and inventory control at Freescale Semiconductor, Inc. |
WSC |
2005 |
DBLP DOI BibTeX RDF |
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75 | Matthew G. Stout, Kenneth P. Tumin |
Innovative Test Solutions for Pin-Limited Microcontrollers. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Freescale, Stout, Tumin, test, testing, DFT, scan, microcontroller, design-for-test, pins |
59 | Serge N. Demidenko, Victor Lai |
Industry-Academia Collaboration in Undergraduate Test Engineering Unit Development. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
|
32 | WeiLun Cheng, Yanliang Li |
Driving Design of Vehicle LCD Display Based on Freescale I.mx6 Platform. |
RICAI |
2019 |
DBLP DOI BibTeX RDF |
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32 | Zheng John Xu |
LS2085/8A Freescale's new QorlQ Layerscape communications processor. |
Hot Chips Symposium |
2015 |
DBLP DOI BibTeX RDF |
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32 | Naraig Manjikian |
Dynamic RAM-based programs and tasks in the freescale MQX operating system. |
CCECE |
2015 |
DBLP DOI BibTeX RDF |
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32 | Aymen Boudguiga, Witold Klaudel, Jimmy Durand Wesolowski |
On the performance of freescale i.MX6 cryptographic acceleration and assurance module. |
RAPIDO@HiPEAC |
2015 |
DBLP DOI BibTeX RDF |
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32 | Pal-Stefan Murvay, Bogdan Groza |
Performance Evaluation of SHA-2 Standard vs. SHA-3 Finalists on Two Freescale Platforms. |
Int. J. Secur. Softw. Eng. |
2013 |
DBLP DOI BibTeX RDF |
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32 | Petr Blaha, Pavel Vaclavek |
Rapid prototyping of robust motor control algorithms on freescale targets. |
SII |
2013 |
DBLP DOI BibTeX RDF |
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32 | David Burgess, Edmund Gieske, James Holt, Thomas Hoy, Gary Whisenhunt |
e6500: Freescale's Low-Power, High-Performance Multithreaded Embedded Processor. |
IEEE Micro |
2012 |
DBLP DOI BibTeX RDF |
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32 | Fuhuan Chen, Huahai Qiu, Yawei Gao |
Freescale Single-chip Microcomputer Intelligent Car Voltage Control Discussed. |
ICDMA |
2012 |
DBLP DOI BibTeX RDF |
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32 | Douglas H. Summerville |
Embedded Systems Interfacing for Engineers using the Freescale HCS08 Microcontroller II: Digital and Analog Hardware Interfacing |
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2009 |
DOI RDF |
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32 | Douglas H. Summerville |
Embedded Systems Interfacing for Engineers using the Freescale HCS08 Microcontroller I: Assembly Language Programming |
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2009 |
DOI RDF |
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32 | Lew Boon Kian |
Test Cost Saving and Challenges in the Implementation of x6 and x8 Parallel Testing on Freescale 16-bit HCS12 Micro-controller Product Family. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
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32 | Nandu Tendolkar, Dawit Belete, Ashutosh Razdan, Hereman Reyes, Bill Schwarz, Marie Sullivan |
Test methodology for Freescale's high performance e600 core based on PowerPC© instruction set architecture. |
ITC |
2005 |
DBLP DOI BibTeX RDF |
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20 | André V. Fidalgo, Gustavo R. Alves, Manuel G. Gericota, José Manuel Martins Ferreira |
A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
real time systems, dependability, fault injection |
20 | Martino Ruggiero, Andrea Bartolini, Luca Benini |
DBS4video: dynamic luminance backlight scaling based on multi-histogram frame characterization for video streaming application. |
EMSOFT |
2008 |
DBLP DOI BibTeX RDF |
power management, video streaming, display, lcd, backlight scaling |
20 | Kathy Werner |
VSI Standards, Current Status and Future Work. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
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20 | Adit D. Singh |
Scan Delay Testing of Nanometer SoCs. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
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20 | Laszlo Kis, Gergely Regula, Béla Lantos |
Design and hardware-in-the-loop test of the embedded control system of an indoor quadrotor helicopter. |
WISES |
2008 |
DBLP DOI BibTeX RDF |
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20 | Rich Ketcham, Jeff Frolik |
A low-complexity, compact antenna for mitigating frequency-selective fading. |
IPSN |
2007 |
DBLP DOI BibTeX RDF |
link optimization, wireless sensor networks, multipath fading |
20 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
LEAF: A System Level Leakage-Aware Floorplanner for SoCs. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
LEAF, leakage-aware floorplanning, temperature-aware leakage power, dynamic power profile, system on chip, SoC designs |
20 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
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20 | Miguel Jimeno, Kenneth J. Christensen |
A Prototype Power Management Proxy for Gnutella Peer-to-Peer File Sharing. |
LCN |
2007 |
DBLP DOI BibTeX RDF |
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20 | Qiang Xie, Jinfeng Liu 0006, Pai H. Chou |
Tapper: a lightweight scripting engine for highly constrained wireless sensor nodes. |
IPSN |
2006 |
DBLP DOI BibTeX RDF |
resource constrained systems, scripting engine, wireless sensor platform, scripting, test and debugging, reprogramming |
20 | Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir |
Floorplan driven leakage power aware IP-based SoC design space exploration. |
CODES+ISSS |
2006 |
DBLP DOI BibTeX RDF |
floorplan, leakage power, temperature |
20 | Weijun Xiao, Yan Sun 0001, Yinan Liu, Qing Yang 0001 |
TEA: Transmission Error Approximation for Distance Estimation between Two Zigbee Devices. |
IWNAS |
2006 |
DBLP DOI BibTeX RDF |
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20 | Adriel Cheng, Atanas N. Parashkevov, Cheng-Chew Lim |
Coverage Measurement for Software Application Testing using Partially Ordered Domains and Symbolic Trajectory Evaluation Techniques. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
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20 | Peter J. Green, Desmond P. Taylor |
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmable Gate Array. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
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20 | Peter J. Green, Desmond P. Taylor |
Implementation of a High Speed Four Transmitter Space-Time Encoder using Field Programmable Gate Array and Parallel Digital Signal Processors. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
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20 | Jayanta Bhadra, Magdy S. Abadir, David Burgess, Ekaterina Trofimova |
Automatic Generation of High Performance Embedded Memory Models for PowerPC Microprocessors. |
MTV |
2005 |
DBLP DOI BibTeX RDF |
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20 | Brian Kahne, Magdy S. Abadir |
Retiming Verification Using Sequential Equivalence Checking. |
MTV |
2005 |
DBLP DOI BibTeX RDF |
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20 | Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir |
Enhanced Equivalence Checking: Toward a Solidarity of Functional Verification and Manufacturing Test Generation. |
IEEE Des. Test Comput. |
2004 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #33 of 33 (100 per page; Change: )
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