Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
73 | Scott McMillan, Cameron Patterson |
JBitsTM Implementations of the Advanced Encryption Standard (Rijndael). |
FPL |
2001 |
DBLP DOI BibTeX RDF |
|
68 | Mohammed Y. Niamat, Surya S. Hejeebu, Mansoor Alam |
A BIST Approach for Testing FPGAs Using JBITS. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
68 | Eric Keller |
Building Asynchronous Circuits with JBits. |
FPL |
2001 |
DBLP DOI BibTeX RDF |
|
68 | Cameron Patterson |
High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm). |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
|
55 | Alex Carreira, Trevor W. Fox, Laurence E. Turner |
A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBitsTM. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
55 | Brandon Blodget |
Pre-route Assistant: A Routing Tool for Run-Time Reconfiguration. |
FPL |
2000 |
DBLP DOI BibTeX RDF |
|
55 | Cameron Patterson |
A Dynamic FPGA Implementation of the Serpent Block Cipher. |
CHES |
2000 |
DBLP DOI BibTeX RDF |
|
51 | Anup Kumar Raghavan, Peter Sutton |
JPG - A Partial Bitstream Generation Tool to Support Partial Reconfiguration in Virtex FPGAs. |
IPDPS |
2002 |
DBLP DOI BibTeX RDF |
JBits, FPGA design flow, Partial Bitstream, Xilinx Virtex, Partial Reconfiguration |
50 | Mansour H. Assaf, Rami S. Abielmona, Payam Abolghasem, Sunil R. Das, Emil M. Petriu, Voicu Groza, Mehmet Sahinoglu |
Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment. |
CIT |
2004 |
DBLP DOI BibTeX RDF |
|
50 | Sergio López-Buedo, Paula Riviere, Pablo Pernas, Eduardo I. Boemo |
Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Jérémie Detrey, Florent de Dinechin |
Multipartite Tables in JBits for the Evaluation of Functions on FPGAs. |
IPDPS |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Prasanna Sundararajan, Steve Guccione |
Run-Time defect tolerance using JBits. |
FPGA |
2001 |
DBLP DOI BibTeX RDF |
Java, FPGA, cores, defect tolerance, run-time reconfiguration |
36 | Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner |
JHDLBits: The Merging of Two Worlds. |
FPL |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Steve Guccione |
Run-Time Reconfiguration at Xilinx. |
IPDPS Workshops |
2000 |
DBLP DOI BibTeX RDF |
|
36 | Delon Levi, Steve Guccione |
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices. |
Evolvable Hardware |
1999 |
DBLP DOI BibTeX RDF |
|
33 | Sergio López-Buedo, Eduardo I. Boemo |
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
JBits, FPGA, embedded processors, run-time reconfiguration, ring-oscillator, temperature measurement |
31 | A. P. Shanthi, Balaji Vijayan, Manivel Rajendran, Senthilkumar Veluswami, Ranjani Parthasarathi |
JBits Based Fault Tolerant Framework for Evolvable Hardware. |
Engineering of Reconfigurable Systems and Algorithms |
2003 |
DBLP BibTeX RDF |
|
31 | Jing Ma, Peter Athanas |
A JBits-Based Incremental Design Environment with Non-Preemptive Refinement for Multi-Million Gate FPGAs. |
Engineering of Reconfigurable Systems and Algorithms |
2003 |
DBLP BibTeX RDF |
|
31 | Mansour H. Assaf, Rami S. Abielmona, Payam Abolghasem, Sunil R. Das, Emil M. Petriu, Voicu Groza |
JBits Implementation and Design Verification in Space Compressor Design of Digital Circuits. |
Modelling, Identification and Control |
2003 |
DBLP BibTeX RDF |
|
31 | Vamsi Krishna Marreddy, Sharareh Noorbaloochi, Kia Bazargan |
Linear Placement for Static / Dynamic Reconfiguration in JBits. |
FCCM |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Steve Guccione, Eric Keller |
Gene Matching Using JBits. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Alex Carreira, Trevor W. Fox, Laurence E. Turner |
A method of implementing bit-serial LDI ladder filters in FPGAs using JBits. |
FPT |
2002 |
DBLP DOI BibTeX RDF |
|
31 | Satnam Singh, Philip James-Roxby |
Rapid Construction of Partial Configuration Datastreams from High-Level Constructs Using JBits. |
FPL |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Cameron Patterson, Steven A. Guccione |
JBits™ Design Abstractions. |
FCCM |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Satnam Singh, Philip James-Roxby |
Lava and JBits: From HDL to Bitstream in Seconds. |
FCCM |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Jean-Baptiste Note, Éric Rannaud |
From the bitstream to the netlist. |
FPGA |
2008 |
DBLP DOI BibTeX RDF |
bitstream format, FPGA, reverse-engineering |
18 | Rashad S. Oreifej, Rawad N. Al-Haddad, Heng Tan, Ronald F. DeMara |
Layered Approach to Instrinsic Evolvable Hardware Using Direct Bistream Manipulation of VIRTEX II Pro Devices. |
FPL |
2007 |
DBLP DOI BibTeX RDF |
|
18 | P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis |
A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Neil Steiner, Peter M. Athanas |
An Alternate Wire Database for Xilinx FPGAs. |
FCCM |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Terrence S. T. Mak, Kai-Pui Lam |
Embedded Computation of Maximum-Likelihood Phylogeny Inference Using Platform FPGA. |
CSB |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Iván González, Sergio López-Buedo, Francisco J. Gómez, Javier Martínez |
Using Partial Reconfiguration in Cryptographic Applications: An Implementation of the IDEA Algorithm. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Weifeng Xu, Ramshankar Ramanarayanan, Russell Tessier |
Adaptive Fault Recovery for Networked Reconfigurable Systems. |
FCCM |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Terrence S. T. Mak, Kai-Pui Lam |
High Speed GAML-based Phylogenetic Tree Reconstruction Using HW/SW Codesign. |
CSB |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Monica Alderighi, Sergio D'Angelo, Marcello Mancini, Giacomo R. Sechi |
A Fault Injection Tool for SRAM-based FPGAs. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Monica Alderighi, Fabio Casini, Sergio D'Angelo, Marcello Mancini, A. Marmo, Sandro Pastore, Giacomo R. Sechi |
A Tool for Injecting SEU-Like Faults into the Configuration Control Mechanism of Xilinx Virtex FPGAs. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Scott McMillan, Steve Guccione |
Partial Run-Time Reconfiguration Using JRTR. |
FPL |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Eric Keller |
JRoute: A Run-Time Routing API for FPGA Hardware. |
IPDPS Workshops |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Gordon Hollingworth, Steve Smith, Andy M. Tyrrell |
The Intrinsic Evolution of Virtex Devices Through Internet Reconfigurable Logic. |
ICES |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Philip James-Roxby, Steven A. Guccione |
Automated Extraction of Run-Time Parameterizable Cores from Programmable Device Configurations. |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Jonathan E. Scalera, Mark Jones 0002 |
A Run-Time Reconfigurable Plug-In for the Winamp MP3 Player. |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
|