Search results for "JTAG"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
79	Ronald F. Buskey, Barbara B. Frosik	Protected JTAG.	ICPP Workshops	2006	DBLP DOI BibTeX RDF
63	Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard	Testing High-Speed IO Links Using On-Die Circuitry.	VLSI Design	2006	DBLP DOI BibTeX RDF	link characterization, on-die oscilloscope, BER, register file, JTAG, IO
61	Hong Shin Jun, Sung Soo Chung, Sang H. Baeg	Removing JTAG Bottlenecks in System Interconnect Test.	ITC	2004	DBLP DOI BibTeX RDF
61	Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani	Extending JTAG for Testing Signal Integrity in SoCs.	DATE	2003	DBLP DOI BibTeX RDF
61	Lee Whetsel	Adapting JTAG for AC Interconnect Testing.	ITC	2003	DBLP DOI BibTeX RDF
52	Kurt Rosenfeld, Ramesh Karri	Attacks and Defenses for JTAG.	IEEE Des. Test Comput.	2010	DBLP DOI BibTeX RDF	security, design and test, hardware security, embedded test, JTAG
50	Senling Wang, Shaoqi Wei, Jun Ma, Hiroshi Kai, Yoshinobu Higami, Hiroshi Takahashi, Akihiro Shimizu, Xiaoqing Wen, Tianming Ni	SASL-JTAG: A Light-Weight Dependable JTAG.	DFT	2023	DBLP DOI BibTeX RDF
50	Christopher J. Clark	Anti-tamper JTAG TAP Design Enables DRM to JTAG Registers and P1687 on-chip Instruments.	HOST	2010	DBLP DOI BibTeX RDF
50	Sung Soo Chung, Sanghyeon Baeg	AC-JTAG: empowering JTAG beyond testing DC nets.	ITC	2001	DBLP DOI BibTeX RDF
45	Myeong-Chul Park, Young-Joo Kim, Ingeol Chun, Seok-Wun Ha, Yong-Kee Jun	A GDB-Based Real-Time Tracing Tool for Remote Debugging of SoC Programs.	ICHIT	2006	DBLP DOI BibTeX RDF	SoC Program, GDB, Remote Debugging, Real-time Tracing, JTAG
45	Jeffrey A. Floyd, Matt Perry	Real-time on-board bus testing.	VTS	1995	DBLP DOI BibTeX RDF	on-board bus testing, wide buses, computer buses, board layout, full-fault testing, multiple speeds, pseudo-random pattern generation, characteristic equations, IEEE JTAG protocol, real-time systems, protocols, logic testing, automatic testing, system buses, operating environments, multiple seed, clock speeds
43	Leon van de Logt, Frank van der Heyden, Tom Waayers	An extension to JTAG for at-speed debug on a system.	ITC	2003	DBLP DOI BibTeX RDF
36	Maciej Nikodem	Boundary Scan Security Enhancements for a Cryptographic Hardware.	EUROCAST	2009	DBLP DOI BibTeX RDF	IEEE 1149, side-channel attacks, countermeasures, boundary scan
36	Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena	A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors.	IOLTS	2007	DBLP DOI BibTeX RDF
36	Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani	Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity.	ICCD	2003	DBLP DOI BibTeX RDF
36	Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani	Testing SoC Interconnects for Signal Integrity Using Boundary Scan.	VTS	2003	DBLP DOI BibTeX RDF	Integrity Loss Sensor, System-on-Chip Interconnects, Data Compression, Boundary Scan, Signal Integrity
36	Magnus Eckersand, Fredrik Franzon, Ken Filliter	Using At-Speed BIST to Test LVDS Serializer/Deserializer Function.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	LVDS, BIST, differential, At-speed
36	Dave Stang, Ramaswami Dandapani	An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements.	ITC	2002	DBLP DOI BibTeX RDF
36	R. P. van Riessen, Hans G. Kerkhoff, A. Kloppenburg	Designing and Implementing an Architecture with Boundary Scan.	IEEE Des. Test Comput.	1990	DBLP DOI BibTeX RDF
27	Zachary K. Baker, Joshua S. Monson	In-situ FPGA Debug Driven by On-Board Microcontroller.	FCCM	2009	DBLP DOI BibTeX RDF	Extreme Environments, FPGA, Debugging, Space, JTAG
27	Don Sterba, Andy Halliday, Don McClean	ATPG and diagnostics for boards implementing boundary scan.	J. Electron. Test.	1991	DBLP DOI BibTeX RDF	1149.1, ATPG, diagnostics, boundary scan, JTAG
27	Colin M. Maunder, Rodham E. Tulloss	An introduction to the boundary scan standard: ANSI/IEEE Std 1149.1.	J. Electron. Test.	1991	DBLP DOI BibTeX RDF	ANSI/IEEE Std 1149.1, loaded-board test, self-test, boundary scan, JTAG
25	Michele Portolan, Martin Keim, Jeff Rearick, Heiko Ehrenberg	Refreshing the JTAG Family.	VTS	2023	DBLP DOI BibTeX RDF
25	Kuen-Jong Lee, Zheng-Yao Lu, Shih-Chun Yeh	A Secure JTAG Wrapper for SoC Testing and Debugging.	IEEE Access	2022	DBLP DOI BibTeX RDF
25	S. Lapeyre, Nicolas Valette, Marc Merandat, Marie-Lise Flottes, Bruno Rouzeyre, Arnaud Virazel	A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing.	ETS	2022	DBLP DOI BibTeX RDF
25	Muhammad Haris Rais, Rima Asmar Awad, Juan Lopez Jr., Irfan Ahmed 0001	JTAG-based PLC memory acquisition framework for industrial control systems.	Digit. Investig.	2021	DBLP DOI BibTeX RDF
25	Shubhra Deb Paul, Swarup Bhunia	SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure.	ACM J. Emerg. Technol. Comput. Syst.	2021	DBLP DOI BibTeX RDF
25	Andrea Floridia, Ernesto Sánchez 0001	A JTAG-based Fault Emulation Platform for Dependability Analyses of Processor-based ASICs.	LASCAS	2021	DBLP DOI BibTeX RDF
25	Jack Li	Using JTAG Interface to Enhance Microprocessor Education.	EIT	2020	DBLP DOI BibTeX RDF
25	Matej Bartík	Reverse Engineering of Arrow USB Programmer2 JTAG Adapter for Intel/Altera FPGAs.	MECO	2020	DBLP DOI BibTeX RDF
25	Mike Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, M. Abdalwahab, Bradford G. Van Treuren, Jeff Rearick	Modeling Novel Non-JTAG IEEE 1687-Like Architectures.	ITC	2020	DBLP DOI BibTeX RDF
25	Xuanle Ren, Francisco Pimentel Torres, Ronald D. Blanton, Vítor Grade Tavares	IC Protection Against JTAG-Based Attacks.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2019	DBLP DOI BibTeX RDF
25	Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre	Encryption-Based Secure JTAG.	DDECS	2019	DBLP DOI BibTeX RDF
25	Dongfang Li, Wei Shen, Zhihao Wang	A Noval Method of Security Verification for JTAG Protection Function.	QRS Companion	2019	DBLP DOI BibTeX RDF
25	Mark Fosberry, Ben McMahon	Matlab JTAG AXI Master opens new dimensions for development and testability.	NATW	2019	DBLP DOI BibTeX RDF
25	Prashant Hari Narayan Rajput, Michail Maniatakos	JTAG: A Multifaceted Tool for Cyber Security.	IOLTS	2019	DBLP DOI BibTeX RDF
25	Chunmei Hu, Zhenyang Zhang, Yang Guo, Jingyan Xu	A Implementation for Built-in Self-Testing of RapidIO by JTAG.	ASICON	2019	DBLP DOI BibTeX RDF
25	Gopal Vishwakarma, Wonjun Lee 0003	Exploiting JTAG and Its Mitigation in IOT: A Survey.	Future Internet	2018	DBLP DOI BibTeX RDF
25	Fabien Majéric, Benoit Gonzalvo, Lilian Bossuet	JTAG Fault Injection Attack.	IEEE Embed. Syst. Lett.	2018	DBLP DOI BibTeX RDF
25	Safa Berrima, Yves Blaquière, Yvon Savaria	Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits.	Integr.	2018	DBLP DOI BibTeX RDF
25	Charalambos Konstantinou, Eduardo Chielle, Michail Maniatakos	PHYLAX: Snapshot-based profiling of real-time embedded devices via JTAG interface.	DATE	2018	DBLP DOI BibTeX RDF
25	Nicole Fern, Kwang-Ting (Tim) Cheng	Pre-silicon Formal Verification of JTAG Instruction Opcodes for Security.	ITC	2018	DBLP DOI BibTeX RDF
25	Xuanle Ren	IC protection against JTAG/IJTAG-based attacks		2018	RDF
25	Xuanle Ren, Ronald D. Blanton, Vítor Grade Tavares	A Learning-Based Approach to Secure JTAG Against Unseen Scan-Based Attacks.	ISVLSI	2016	DBLP DOI BibTeX RDF
25	Andrew Hennessy, Yu Zheng 0011, Swarup Bhunia	JTAG-based robust PCB authentication for protection against counterfeiting attacks.	ASP-DAC	2016	DBLP DOI BibTeX RDF
25	Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin	High-speed programmable FPGA Configuration through JTAG.	FPL	2016	DBLP DOI BibTeX RDF
25	Fabien Majéric, Benoit Gonzalvo, Lilian Bossuet	JTAG Combined Attack - Another Approach for Fault Injection.	NTMS	2016	DBLP DOI BibTeX RDF
25	Kyungroul Lee, Yeunsu Lee, Hyeji Lee, Kangbin Yim	A Brief Review on JTAG Security.	IMIS	2016	DBLP DOI BibTeX RDF
25	Mordechai Guri, Yuri Poliak, Bracha Shapira, Yuval Elovici	JoKER: Trusted Detection of Kernel Rootkits in Android Devices via JTAG Interface.	CoRR	2015	DBLP BibTeX RDF
25	Xuanle Ren, Vítor Grade Tavares, R. D. (Shawn) Blanton	Detection of illegitimate access to JTAG via statistical learning in chip.	DATE	2015	DBLP BibTeX RDF
25	Mordechai Guri, Yuri Poliak, Bracha Shapira, Yuval Elovici	JoKER: Trusted Detection of Kernel Rootkits in Android Devices via JTAG Interface.	TrustCom/BigDataSE/ISPA (1)	2015	DBLP DOI BibTeX RDF
25	Mrugesh Walimbe	JTAG-AXI Debug IP with Performance Meter Mode.	MTV	2014	DBLP DOI BibTeX RDF
25	Yves Blaquière, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria	Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain.	ISCAS	2014	DBLP DOI BibTeX RDF
25	Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede	Secure JTAG Implementation Using Schnorr Protocol.	J. Electron. Test.	2013	DBLP DOI BibTeX RDF
25	Michele Portolan	Packet-based JTAG for remote testing.	ITC	2012	DBLP DOI BibTeX RDF
25	Yu Okumura, Kengo Toda, Ken Tomiyama, Takayuki Furuta	Development of Educational Robotics Instruction Kit for Embodying Creativity: "f-palette" Educational Microcomputer Kit with Extension Methodsand Full JTAG Function.	J. Robotics Mechatronics	2011	DBLP DOI BibTeX RDF
25	Luke Pierce, Spyros Tragoudas	Multi-level secure JTAG architecture.	IOLTS	2011	DBLP DOI BibTeX RDF
25	Xun Jiang, Xiaoxin Cui, Dunshan Yu	A JTAG-based configuration circuit applied in SerDes chip.	ASICON	2011	DBLP DOI BibTeX RDF
25	Keunyoung Park, Sang Guun Yoo, Taejun Kim, Juho Kim	JTAG Security System Based on Credentials.	J. Electron. Test.	2010	DBLP DOI BibTeX RDF
25	Igor Ilyin, Rostislav Grushvitsky	Internal structure of software application for controlling devices via JTAG 1149 interface.	EWDTS	2010	DBLP DOI BibTeX RDF
25	Ping Zhang, Yanmin Song, Jianmin Zhang, Zuocheng Xing	Design of Testing Struture in Microprocessor Based on JTAG.	ISCID (1)	2009	DBLP DOI BibTeX RDF
25	Sergei Devadze, Artur Jutman, Igor Aleksejev, Raimund Ubar	Turning JTAG inside out for fast extended test access.	LATW	2009	DBLP DOI BibTeX RDF
25	Sergei Devadze, Artur Jutman, Igor Aleksejev, Raimund Ubar	Fast extended test access via JTAG and FPGAs.	ITC	2009	DBLP DOI BibTeX RDF
25	Keonwoo Kim, Dowon Hong, Jae-Cheol Ryou 0001	Forensic Data Acquisition from Cell Phones using JTAG Interface.	Security and Management	2008	DBLP BibTeX RDF
25	Katarina Paulsson, Ulrich Viereck, Michael Hübner 0001, Jürgen Becker 0001	Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs.	ISVLSI	2008	DBLP DOI BibTeX RDF
25	Bradford G. Van Treuren	System JTAG Initiative Group Advancements.	ITC	2008	DBLP DOI BibTeX RDF
25	Bradford G. Van Treuren, Adam W. Ley	JTAG system test in a MicroTCA world.	ITC	2007	DBLP DOI BibTeX RDF
25	Ing. M. F. Breeuwsma	Forensic imaging of embedded systems using JTAG (boundary-scan).	Digit. Investig.	2006	DBLP DOI BibTeX RDF
25	Hung-chi Lihn	Reusable, Low-cost, and Flexible Multidrop System JTAG Architecture.	ITC	2006	DBLP DOI BibTeX RDF
25	Lee Whetsel	A High Speed Reduced Pin Count JTAG Interface.	ITC	2006	DBLP DOI BibTeX RDF
25	Frans G. M. de Jong, Alex S. Biewenga	SiP-TAP: JTAG for SiP.	ITC	2006	DBLP DOI BibTeX RDF
25	Jeff Rearick, Bill Eklow, Ken Posse, Al Crouch, Ben Bennetts	IJTAG (internal JTAG): a step toward a DFT standard.	ITC	2005	DBLP DOI BibTeX RDF
25	Bradford G. Van Treuren, Bryan E. Peterson, José M. Miranda	JTAG-based vector and chain management for system test.	ITC	2005	DBLP DOI BibTeX RDF
25	Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani	Testing SoC interconnects for signal integrity using extended JTAG architecture.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
25	Cynthia Cousineau, François Laperle, Yvon Savaria	Design of a JTAG Based Run Time Reconfigurable System.	FCCM	1999	DBLP DOI BibTeX RDF
25	Takeshi Fuchi, Shinichiro Takagi	Japanese Morphological Analyzer using Word Co-occurence -JTAG.	COLING-ACL	1998	DBLP BibTeX RDF
25	Andrew Flint	A Simulation-Based JTAG ATPG Optimized for MCMs.	ITC	1997	DBLP DOI BibTeX RDF
25	Mark F. Lefebvre	Functional test and diagnosis: a proposed JTAG sample mode scan tester.	ITC	1990	DBLP DOI BibTeX RDF
25	Johann Maierhofer	Hierarchical self-test concept based on the JTAG standard.	ITC	1990	DBLP DOI BibTeX RDF
25	Anton T. Dahbura, M. Ümit Uyar, Chi W. Yau	An Optimal Test Sequence for the JTAG/IEEE P1149.1 Test Access Port Controller.	ITC	1989	DBLP DOI BibTeX RDF
18	Nicolas Burri, Roland Flury, Silvan Nellen, Benjamin Sigg, Philipp Sommer, Roger Wattenhofer	YETI: an Eclipse plug-in for TinyOS 2.1.	SenSys	2009	DBLP DOI BibTeX RDF	sensor networks, debugging, development, TinyOS
18	Michael Higgins, Ciaran MacNamee, Brendan Mullane	SoCECT: System on Chip Embedded Core Test.	DDECS	2008	DBLP DOI BibTeX RDF
18	Thuyen Le, Tilman Glökler, Jason Baumgartner	Formal verification of a pervasive interconnect bus system in a high-performance microprocessor.	DATE	2007	DBLP DOI BibTeX RDF
18	Joon-Myung Kang, Hong-Taek Ju, Mi-Jung Choi, James Won-Ki Hong	OMA DM Based Remote Software Debugging of Mobile Devices.	APNOMS	2007	DBLP DOI BibTeX RDF	Mobile Device Diagn-ostics, OMA DM, OMA DM DiagMon, Software Debugging, Device Management
18	Michel Pignol	Methodology and Tools Developed for Validation of COTS-based Fault-Tolerant Spacecraft Supercomputers.	IOLTS	2007	DBLP DOI BibTeX RDF
18	Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller	A reconfigurable design-for-debug infrastructure for SoCs.	DAC	2006	DBLP DOI BibTeX RDF	assertion-based debug, at-speed debug, what-if experiments, silicon debug
18	Jean Paul Talledo Vilela	Design and Implementation of an Ethernet Frame Analyzer for High Speed Networks.	CONIELECOMP	2005	DBLP DOI BibTeX RDF
18	Bhanu Pisupati, Geoffrey Brown	File System Interfaces for Embedded Software Development.	ICCD	2005	DBLP DOI BibTeX RDF
18	Rawat Siripokarpirom, Friedrich Mayer-Lindenberg	Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
18	Olivier Duval, L.-P. Lafrance, Yvon Savaria, Patrick Desjardins	An Integrated Test Platform for Nanostructure Electrical Characterization.	ICMENS	2004	DBLP DOI BibTeX RDF
18	Hans Eberle, Arvinderpal Wander, Nils Gura	Testing Systems Wirelessly.	VTS	2004	DBLP DOI BibTeX RDF
18	David Resnick	Embedded Test for a new Memory-Card Architecture.	ITC	2004	DBLP DOI BibTeX RDF
18	Chen-Huan Chiang, Paul J. Wheatley, Kenneth Y. Ho, Ken L. Cheung	Testing and Remote Field Update of Distributed Base Stations in a Wireless Network.	ITC	2004	DBLP DOI BibTeX RDF
18	Man Wah Chiang, Zeljko Zilic, Jean-Samuel Chenard, Katarzyna Radecka	Architectures of Increased Availability Wireless Sensor Network Nodes.	ITC	2004	DBLP DOI BibTeX RDF
18	Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, Kavitha Subramanian	On Design and Implementation of an Embedded Automatic Speech Recognition System.	VLSI Design	2004	DBLP DOI BibTeX RDF
18	Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang 0001, Yizheng Ye	A Test Architecture for System-on-a-Chip.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
18	Nikolaus Kerö, Thilo Sauter	Efficient Analysis of Mixed-Signal ASICs for Smart Sensors.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
18	Adam Kristof	Extension of the boundary-scan architecture and new idea of BIST for more effective testing and self-testing of interconnections.	ED&TC	1997	DBLP DOI BibTeX RDF