Search results for "LFSR"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
134	Seongmoon Wang, Sandeep K. Gupta 0001	DS-LFSR: a BIST TPG for low switching activity.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
84	Jovan Dj. Golic, Renato Menicocci	Statistical distinguishers for irregularly decimated linear recurring sequences.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF
82	Jinkyu Lee 0005, Nur A. Touba	LFSR-Reseeding Scheme Achieving Low-Power Dissipation During Test.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
82	Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang	SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling.	DATE	2007	DBLP DOI BibTeX RDF
82	Hong-Sik Kim, Sungho Kang 0001	Increasing encoding efficiency of LFSR reseeding-based test compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
82	C. V. Krishna, Nur A. Touba	Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression.	ITC	2002	DBLP DOI BibTeX RDF
79	Seongmoon Wang, Kedarnath J. Balakrishnan, Wenlong Wei	X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	output compaction, temporal compactor, blocking unknown values, LFSR reseeding, Built-in Self-Test, BIST, test data compression, MISR, response compaction
79	Richard Putman	Using reiterative LFSR based X-masking to increase output compression in presence of unknowns.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	reiterative, x-masking, compression, LFSR
79	Sarbani Palit, Bimal K. Roy, Arindom De	A Fast Correlation Attack for LFSR-Based Stream Ciphers.	ACNS	2003	DBLP DOI BibTeX RDF	LFSR polynomial, Correlation immune function, Stream cipher, Correlation attack
73	Guang Zeng, Yang Yang, Wenbao Han, Shuqin Fan	Word Oriented Cascade Jump sigma-LFSR.	AAECC	2009	DBLP DOI BibTeX RDF	Cascade Jump LFSR, ??LFSR, Fast Software Encryption, Stream Cipher, Linear Feedback Shift Register(LFSR)
73	Ming-Der Shieh, Hsin-Fu Lo, Ming-Hwa Sheu	High-speed generation of LFSR signatures.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	high-speed generation, LFSR signatures, compaction simulation, single-input signature register, equivalent multiple-input implementation, finite field theory, high-speed signature computations, lookahead technique, internal-XOR LFSR, external-XOR LFSR, performance evaluation, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, BIST, linear feedback shift register, binary sequences, subsequences
71	Zhanglei Wang, Hongxia Fang, Krishnendu Chakrabarty, Michael Bienek	Deviation-Based LFSR Reseeding for Test-Data Compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
71	C. V. Krishna, Abhijit Jas, Nur A. Touba	Achieving high encoding efficiency with partial dynamic LFSR reseeding.	ACM Trans. Design Autom. Electr. Syst.	2004	DBLP DOI BibTeX RDF	linear finite shift register, compression, Built-in self-test, reseeding
71	Jinkyu Lee 0005, Nur A. Touba	Low Power Test Data Compression Based on LFSR Reseeding.	ICCD	2004	DBLP DOI BibTeX RDF
71	Shridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao	An apparatus for pseudo-deterministic testing.	VTS	1995	DBLP DOI BibTeX RDF	pseudo-deterministic testing, deterministic patterns, at-speed BIST, arbitrary length shift register, care bits, tap configurations, test segments, don't care bits, random pattern resistant faults, interconnected logic blocks, logic testing, built-in self test, integrated circuit testing, LFSR, shift registers, computational efficiency, test vector, pseudo-random sequences
69	Dimitri Kagaris, Spyros Tragoudas	LFSR Characteristic Polynomials for Pseudo-Exhaustive TPG with Low Number of Seeds.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	built-in self-test (BIST), Linear Feedback Shift Registers (LFSR), test pattern generation (TPG)
68	Santosh Chandrasekhar, Saikat Chakrabarti 0002, Mukesh Singhal	Efficient Proxy Signatures For Ubiquitous Computing.	SUTC	2008	DBLP DOI BibTeX RDF	Schnorr signature, LFSR sequence, cubic LFSR-based cryptosystems, mobile agents, provable security, Proxy signature, ubiquitous systems
66	Guang Zeng, Yang Yang, Wenbao Han, Shuqin Fan	Reducible Polynomial over F2 Constructed by Trinomial sigma-LFSR.	Inscrypt	2008	DBLP DOI BibTeX RDF	Stickelberger-Swan Theorem, ??LFSR, Finite Field, Linear Feedback Shift Register(LFSR), Irreducible Polynomial
63	Cédric Lauradoux	From Hardware to Software Synthesis of Linear Feedback Shift Registers.	IPDPS	2007	DBLP DOI BibTeX RDF
63	Chien-In Henry Chen, Kiran George	Automated Synthesis of Configurable Two-dimensional Linear Feedback Shifter Registers for Random/Embedded Test Patterns.	ISQED	2003	DBLP DOI BibTeX RDF
63	Wei-Lun Wang, Kuen-Jong Lee	An Efficient Deterministic Test Pattern Generator for Scan-Based BIST Environment.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	mixed-mode pattern generation, built-in self-test, power consumption, test application time, scan chain
61	Maoxiang Yi, Huaguo Liang, Kaihua Zhan, Cuiyun Jiang	Optimal LFSR-Coding Test Data Compression Based on Test Cube Dividing.	CSE (2)	2009	DBLP DOI BibTeX RDF
61	Zhanglei Wang, Krishnendu Chakrabarty, Michael Bienek	A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression.	ETS	2007	DBLP DOI BibTeX RDF
61	Patrick Girard 0001, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, João Paulo Teixeira 0001, Marcelino B. Santos	Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
61	Dimitrios Kagaris, Spyros Tragoudas	Cost-effective LFSR synthesis for optimal pseudoexhaustive BIST test sets.	IEEE Trans. Very Large Scale Integr. Syst.	1993	DBLP DOI BibTeX RDF
60	Sourav Mukhopadhyay, Palash Sarkar 0001	Application of LFSRs in Time/Memory Trade-Off Cryptanalysis.	WISA	2005	DBLP DOI BibTeX RDF	Time/memory trade-off, LFSR, rainbow table
60	Jin Hong 0001, Dong Hoon Lee 0002, Seongtaek Chee, Palash Sarkar 0001	Vulnerability of Nonlinear Filter Generators Based on Linear Finite State Machines.	FSE	2004	DBLP DOI BibTeX RDF	nonlinear filter model, Anderson information leakage, Stream cipher, LFSR, CA
58	Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert	Authenticating Feedback in Multicast Applications Using a Novel Multisignature Scheme Based on Cubic LFSR Sequences.	AINA Workshops (1)	2007	DBLP DOI BibTeX RDF	Multicast acknowledgements, authenticated feedback, Ack implosion, generalized El-Gamal signatures, LFSR-based PKCs, multisignatures
58	Seongan Lim, Seungjoo Kim, Ikkwon Yie, Jaemoon Kim	Comments on a Signature Scheme Based on the Third Order LFSR Proposed at ACISP2001.	INDOCRYPT	2001	DBLP DOI BibTeX RDF	Trace Projection, LFSR, digital signature scheme, XTR
58	Dimitrios Kagaris, Spyros Tragoudas	Avoiding linear dependencies in LFSR test pattern generators.	J. Electron. Test.	1995	DBLP DOI BibTeX RDF	ATPG, BIST, LFSR, characteristic polynomials, pseudo-random testing
55	Laung-Terng Wang, Edward J. McCluskey	Condensed Linear Feedback Shift Register (LFSR) Testing - A Pseudoexhaustive Test Technique.	IEEE Trans. Computers	1986	DBLP DOI BibTeX RDF	Autonomous test, condensed LFSR testing, LFSR testing, built-in self-test, test pattern generation, pseudoexhaustive testing
52	Benjamin Vigoda, Justin Dauwels, Matthias Frey, Neil Gershenfeld, Tobias Koch 0001, Hans-Andrea Loeliger, Patrick R. Merkli	Synchronization of Pseudorandom Signals by Forward-Only Message Passing With Application to Electronic Circuits.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF
52	Wei-Lun Wang, Kuen-Jong Lee	Accelerated test pattern generators for mixed-mode BIST environments.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	accelerated test pattern generators, mixed-mode BIST, pseudorandom patterns, deterministic patterns, scan-based built-in self-test, multiple sub-chains, multiple sequence generator, fault diagnosis, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, fault coverage, linear feedback shift registers, cost, test pattern generator, shift registers, test application time, scan chain, mixed analogue-digital integrated circuits, clock cycle, integrated circuit economics
52	Christian Dufaza, Yervant Zorian	On the generation of pseudo-deterministic two-patterns test sequence with LFSRs.	ED&TC	1997	DBLP DOI BibTeX RDF
50	Myung-Hoon Yang, YongJoon Kim, Sunghoon Chun, Sungho Kang 0001	An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Built-in self-test, Power consumption, Linear feedback shift register, Reseeding
50	Laurent Alaus, Dominique Noguet, Jacques Palicot	A Reconfigurable LFSR for Tri-standard SDR Transceiver, Architecture and Complexity Analysis.	DSD	2008	DBLP DOI BibTeX RDF
50	Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar	Efficient unknown blocking using LFSR reseeding.	DATE	2006	DBLP DOI BibTeX RDF
50	Antoine Joux, Pascal Delaunay	Galois LFSR, Embedded Devices and Side Channel Weaknesses.	INDOCRYPT	2006	DBLP DOI BibTeX RDF
50	Yu-Hsuan Fu, Sying-Jyan Wang	Test Data Compression with Partial LFSR-Reseeding.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
50	Kenneth J. Giuliani, Guang Gong	New LFSR-Based Cryptosystems and the Trace Discrete Log Problem (Trace-DLP).	SETA	2004	DBLP DOI BibTeX RDF
50	Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota	Combining dictionary coding and LFSR reseeding for test data compression.	DAC	2004	DBLP DOI BibTeX RDF	built-In self test, VLSI test
50	Hong-Sik Kim, YongJoon Kim, Sungho Kang 0001	Test-decompression mechanism using a variable-length multiple-polynomial LFSR.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
50	C. V. Krishna, Nur A. Touba	Hybrid BIST Using an Incrementally Guided LFSR.	DFT	2003	DBLP DOI BibTeX RDF
50	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A ROMless LFSR Reseeding Scheme for Scan-based BIST.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
50	Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu-Liang Wu	A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits.	ITC	1998	DBLP DOI BibTeX RDF
50	Li-Ren Huang, Jing-Yang Jou, Sy-Yen Kuo	An Efficient PRPG Strategy By Utilizing Essential Faults.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	PRPG, essential fault, multiple polynomial, Gauss elimination, pseudorandom test pattern, multivariable linear equation, deterministic test set, random pattern resistant circuit, don't care value, intelligent heuristic, ISCAS-85 benchmark, ISCAS-89 benchmark, built-in self test, BIST, fault coverage, LFSR, test length, hardware overhead, multiple seed
48	Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert	Authenticating DSR Using a Novel Multisignature Scheme Based on Cubic LFSR Sequences.	ESAS	2007	DBLP DOI BibTeX RDF	generalized El Gamal signatures, LFSR-based PKCs, DSR, secure routing, multisignatures, small-world graphs, PGP
48	Hongjoong Shin, Hak-soo Yu, Jacob A. Abraham	LFSR-based BIST for analog circuits using slope detection.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	slope detection, BIST, LFSR, analog testing, mixed-signal testing
48	Lijian Li, Yinghua Min	An efficient BIST design using LFSR-ROM architecture.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	read-only storage, BIST design, LFSR-ROM architecture, built-in self test, logic design, automatic test pattern generation, test pattern generation, integrated circuit design, shift registers, hardware overhead, ROM, integrated circuit economics
42	Andrzej Hlawiczka, Krzysztof Gucwa, Tomasz Garbolino, Michal Kopec	Interconnect Faults Identification and Localization Using Modified Ring LFSRs.	DDECS	2008	DBLP DOI BibTeX RDF
42	Alexander Maximov	Cryptanalysis of the "Grain" family of stream ciphers.	AsiaCCS	2006	DBLP DOI BibTeX RDF	decoding problem, cryptanalysis, correlation attacks, distinguisher, grain
42	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	Multiphase BIST: a new reseeding technique for high test-data compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
42	Huaguo Liang, Cuiyun Jiang	Sharing BIST with Multiple Cores for System-on-a-Chip.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
42	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A highly regular multi-phase reseeding technique for scan-based BIST.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	scan-based schemes, built-in self-test, linear feedback shift registers, reseeding
42	Irith Pomeranz, Sudhakar M. Reddy	On methods to match a test pattern generator to a circuit-under-test.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
42	Jovan Dj. Golic	Towards Fast Correlation Attacks on Irregularly Clocked Shift Registers.	EUROCRYPT	1995	DBLP DOI BibTeX RDF
42	Willi Meier, Othmar Staffelbach	Fast Correlation Attacks on Stream Ciphers (Extended Abstract).	EUROCRYPT	1988	DBLP DOI BibTeX RDF
40	Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert	An Efficient and Scalable Quasi-Aggregate Signature Scheme Based on LFSR Sequences.	IEEE Trans. Parallel Distributed Syst.	2009	DBLP DOI BibTeX RDF
40	Artur Jutman, Anton Tsertov, Raimund Ubar	Calculation of LFSR Seed and Polynomial Pair for BIST Applications.	DDECS	2008	DBLP DOI BibTeX RDF
40	Claudio Mucci, Luca Vanzolini, Ilario Mirimin, Daniele Gazzola, Antonio Deledda, Sebastian Goller, Joachim Knäblein, Axel Schneider, Luca Ciccarelli, Fabio Campi	Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array.	DATE	2008	DBLP DOI BibTeX RDF
40	Zheng Gong, Yu Long 0001, Kefei Chen	Efficient Partially Blind Signature from LFSR.	SNPD (2)	2007	DBLP DOI BibTeX RDF
40	Sanjay Burman, Debdeep Mukhopadhyay, Kamakoti Veezhinathan	LFSR Based Stream Ciphers Are Vulnerable to Power Attacks.	INDOCRYPT	2007	DBLP DOI BibTeX RDF	Linear Feed Back Shift Registers, Dynamic Power Dissipation, Side Channel Attacks, Power Analysis, Hamming Distance
40	Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed	Low Transition LFSR for BIST-Based Applications.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
40	Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu	On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding.	ITC	2003	DBLP DOI BibTeX RDF
40	Nan-Cheng Li, Sying-Jyan Wang	A Reseeding Technique for LFSR-Based BIST Applications.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF	Reseedling, LFST, BIST, Test Pattern Generator, Pseudo-Random Testing
40	Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang	Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
40	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	A New Reseeding Technique for LFSR-Based Test Pattern Generation.	IOLTW	2001	DBLP DOI BibTeX RDF
40	Li-Ren Huang, Jing-Yang Jou, Sy-Yen Kuo	Gauss-elimination-based generation of multiple seed-polynomial pairs for LFSR.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
40	Shujian Zhang, Rod Byrne, Jon C. Muzio, D. Michael Miller	Quantitative analysis for linear hybrid cellular automata and LFSR as built-in self-test generators for sequential faults.	J. Electron. Test.	1995	DBLP DOI BibTeX RDF	linear hybrid cellular automata, sequential fault, transition capability, built-in self-test, linear feedback shift register, linear finite state machine
40	Hugo Krawczyk	LFSR-based Hashing and Authentication.	CRYPTO	1994	DBLP DOI BibTeX RDF
40	Peizhong Lu, Song Guowen	Feasible Calculation of the Generator for Combined LFSR Sequences.	AAECC	1990	DBLP DOI BibTeX RDF
39	Bin Zhang 0003, Dengguo Feng	New Guess-and-Determine Attack on the Self-Shrinking Generator.	ASIACRYPT	2006	DBLP DOI BibTeX RDF	Self-shrinking, Guess-and-determine, Stream cipher, Linear feedback shift register (LFSR)
39	Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee	Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator.	VLSI Design	2000	DBLP DOI BibTeX RDF	Extension field, BIST structure, Cellular Automata (CA), VLSI design and RTL, Finite field, DFT, Fault coverage, LFSR
39	Nadime Zacharia, Janusz Rajski, Jerzy Tyszer	Decompression of test data using variable-length seed LFSRs.	VTS	1995	DBLP DOI BibTeX RDF	test data decompression, variable-length seed LFSRs, deterministic test vectors, scan circuits, multiple polynomial LFSR, encoding efficiency, logic testing, built-in self test, integrated circuit testing, encoding, automatic testing, polynomials, linear feedback shift register, shift registers, modular design, digital integrated circuits
38	Mohamed El-Hadedy 0001, Russell Hua, Kazutomo Yoshii, Wen-Mei Hwu, Martin Margala	RECO-LFSR: Reconfigurable Low-power Cryptographic processor based on LFSR for Trusted IoT platforms.	ISQED	2023	DBLP DOI BibTeX RDF
38	Abhishek Chakraborty 0001, Bodhisatwa Mazumdar, Debdeep Mukhopadhyay	Fibonacci LFSR vs. Galois LFSR: Which is More Vulnerable to Power Attacks?	SPACE	2014	DBLP DOI BibTeX RDF
37	Leonard Colavito, Dennis Silage	Efficient PGA LFSR Implementation Whitens Pseudorandom Numbers.	ReConFig	2009	DBLP DOI BibTeX RDF	Whitening, FPGA, LFSR
37	Xiaowei Li 0001, Paul Y. S. Cheung, Hideo Fujiwara	LFSR-Based Deterministic TPG for Two-Pattern Testing.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	configurable LFSR, built-in self-test, path delay faults, two-pattern test
31	Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed	Low-Transition Test Pattern Generation for BIST-Based Applications.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Low power pattern generation, Test generation, Built-in tests, Testing strategies, Random generation
31	Hong-Sik Kim, Sungho Kang 0001, Michael S. Hsiao	A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Keyword System on a chip, Test compression, Low power testing, Scan testing
31	Debrup Chakraborty, Palash Sarkar 0001	A General Construction of Tweakable Block Ciphers and Different Modes of Operations.	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
31	Makoto Matsumoto, Mutsuo Saito, Takuji Nishimura, Mariko Hagita	A Fast Stream Cipher with Huge State Space and Quasigroup Filter for Software.	Selected Areas in Cryptography	2007	DBLP DOI BibTeX RDF	combined generator, filter with memory, quasigroup filter, multiplicative filter, CryptMT, distribution, stream cipher, period, eSTREAM
31	Petr Fiser	Pseudo-Random Pattern Generator Design for Column-Matching BIST.	DSD	2007	DBLP DOI BibTeX RDF
31	Dong Zheng 0001, Xiangxue Li, Kefei Chen, Jianhua Li	Linkable Ring Signatures from Linear Feedback Shift Register.	EUC Workshops	2007	DBLP DOI BibTeX RDF	Characteristic sequence, Linkabilty, Anonymity, Linear feedback shift register, Ring signatures
31	Kedarnath J. Balakrishnan	Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding.	VLSI Design	2007	DBLP DOI BibTeX RDF
31	Malav Shah, Dipankar Nagchoudhuri	BIST Scheme for Low Heat Dissipation and Reduced Test Application Time.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
31	Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar	PIDISC: Pattern Independent Design Independent Seed Compression Technique.	VLSI Design	2006	DBLP DOI BibTeX RDF
31	Frederik Armknecht, Willi Meier	Fault Attacks on Combiners with Memory.	Selected Areas in Cryptography	2005	DBLP DOI BibTeX RDF
31	Bin Zhang 0003, Hongjun Wu 0001, Dengguo Feng, Feng Bao 0001	Security Analysis of the Generalized Self-shrinking Generator.	ICICS	2004	DBLP DOI BibTeX RDF	Stream cipher, Linear feedback shift register, Fast correlation attack, Clock control, Self-shrinking generator
31	Patrik Ekdahl, Willi Meier, Thomas Johansson 0001	Predicting the Shrinking Generator with Fixed Connections.	EUROCRYPT	2003	DBLP DOI BibTeX RDF
31	Chien-In Henry Chen, Kiran George	Configurable two-dimensional linear feedback shifter registers for deterministic and random patterns [logic BIST].	ISCAS (5)	2003	DBLP DOI BibTeX RDF
31	Chunsheng Liu, Krishnendu Chakrabarty	Compact Dictionaries for Fault Diagnosis in BIST.	ISQED	2003	DBLP DOI BibTeX RDF
31	Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang 0008	Low-Energy BIST Design for Scan-based Logic Circuits.	VLSI Design	2003	DBLP DOI BibTeX RDF
31	Peter Wohl, John A. Waicukauski, Sanjay Patel, Minesh B. Amin	Efficient compression and application of deterministic patterns in a logic BIST architecture.	DAC	2003	DBLP DOI BibTeX RDF	test-generation (ATPG), self-test (BIST)
31	Srinivas Devadas, Kurt Keutzer	An algorithmic approach to optimizing fault coverage for BIST logic synthesis.	ITC	1998	DBLP DOI BibTeX RDF
31	Nur A. Touba, Edward J. McCluskey	Transformed pseudo-random patterns for BIST.	VTS	1995	DBLP DOI BibTeX RDF	pseudorandom patterns transformation, onchip test pattern generation, mapping logic, on-chip TPG, logic testing, built-in self test, integrated circuit testing, logic design, BIST, combinational circuits, automatic testing, combinational logic
31	Kencheng Zeng, Dah-Yea Wei, T. R. N. Rao	d-Functions in Vk(F2) and Self-Decimation of m-Sequences.	AAECC	1991	DBLP DOI BibTeX RDF
31	Peter D. Hortensius, Robert D. McLeod, Werner Pries, D. Michael Miller, Howard C. Card	Cellular automata-based pseudorandom number generators for built-in self-test.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
31	Yves Roggeman	Varying Feedback Shift Registers.	EUROCRYPT	1989	DBLP DOI BibTeX RDF
31	Harald Niederreiter	Keysystem Sequences with a Good Linear Complexity Profile for Every STrating Point.	EUROCRYPT	1989	DBLP DOI BibTeX RDF