Search results for "MPSoCs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
84	Frank E. B. Ophelders, Marco Bekooij, Henk Corporaal	A tuneable software cache coherence protocol for heterogeneous MPSoCs.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	performance, design, reliability
84	Ewerson Carvalho, Ney Calazans, Fernando Moraes 0001	Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
57	Krutartha Patel, Sri Parameswaran	LOCS: a low overhead profiler-driven design flow for security of MPSoCs.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	tensilica, architecture, mpsoc, execution profile, code injection
57	Krutartha Patel, Sri Parameswaran	SHIELD: a software hardware design methodology for security and reliability of MPSoCs.	DAC	2008	DBLP DOI BibTeX RDF	bit flips, tensilica, architecture, multiprocessors, code injection
57	David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida	HW-SW emulation framework for temperature-aware design in MPSoCs.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	Thermal-aware design, FPGA, emulation, MPSoC, temperature
55	Chong Sun, Li Shang, Robert P. Dick	Three-dimensional multiprocessor system-on-chip thermal optimization.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	synthesis, 3D, multiprocessor system-on-chip, thermal
52	Jun Zhu 0011, Ingo Sander, Axel Jantsch	Energy efficient streaming applications with guaranteed throughput on MPSoCs.	EMSOFT	2008	DBLP DOI BibTeX RDF	synchronous moc, energy efficiency, mpsocs, streaming applications
52	Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta 0001, Stephen P. Boyd, Giovanni De Micheli	Temperature-aware processor frequency assignment for MPSoCs using convex optimization.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	temperature-aware, MPSoCs, convex optimization, thermal
50	Jaume Joven, Oriol Font-Bach, David Castells-Rufas, Ricardo Martínez, Lluís Terés, Jordi Carrabina	xENoC - An eXperimental Network-On-Chip Environment for Parallel Distributed Computing on NoC-based MPSoC Architectures.	PDP	2008	DBLP DOI BibTeX RDF	NoC-based MPSoCs, Message Passing Interface, Distributed Programming, Design Tools and Techniques
43	Francesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo	A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs.	SAMOS	2008	DBLP DOI BibTeX RDF	Dual-mode switching, Non-exclusive switching, Networks on Chip, Circuit switching
43	Ewerson Carvalho, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Congestion-Aware Task Mapping in NoC-based MPSoCs with Dynamic Workload.	ISVLSI	2007	DBLP DOI BibTeX RDF
43	Mirko Loghi, Massimo Poncino, Luca Benini	Cache coherence tradeoffs in shared-memory MPSoCs.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	low power, multiprocessor, system-on-chip, Cache coherence
43	Fabio Wronski, Eduardo Wenzel Brião, Flávio Rech Wagner	Evaluating Energy-Aware Task Allocation Strategies for MPSOCS.	DIPES	2006	DBLP DOI BibTeX RDF	Simulation, Networks-on-Chip, Task Allocation, Multiprocessor SoCs, Energy Estimation
41	Jason Agron, David Andrews 0001	Building heterogeneous reconfigurable systems with a hardware microkernel.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	FPGAs, operating systems, heterogeneous architectures
41	Pramod Chandraiah, Rainer Dömer	Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
41	Wayne H. Wolf, Ahmed Amine Jerraya, Grant Martin	Multiprocessor System-on-Chip (MPSoC) Technology.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
41	Xu Cheng	Heterogeneous Multi-processor SoC: An Emerging Paradigm of Embedded System Design and Its Challenges.	ICESS	2005	DBLP DOI BibTeX RDF
41	Feihui Li, Mahmut T. Kandemir	Locality-conscious workload assignment for array-based computations in MPSOC architectures.	DAC	2005	DBLP DOI BibTeX RDF	MPSoC, data locality
39	Francesco Zanini, David Atienza, Giovanni De Micheli, Stephen P. Boyd	Online convex optimization-based algorithm for thermal management of MPSoCs.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	management, MPSoCs, convex optimization, online, thermal
39	Fadi N. Sibai	Which On-Chip Interconnection Network for 16-core MPSoCs?.	CISIS	2010	DBLP DOI BibTeX RDF	split NoCs, MPSoCs, On-chip interconnection networks, network diameter
36	Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino	Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	embedded multimedia, low power, energy efficiency, MPSoCs, programming models, task-level parallelism
36	Mario Diaz-Nava, Patrick Blouet, Philippe Teninge, Marcello Coppola, Tarek Ben Ismail, Samuel Picchiottino, Robin Wilson	An Open Platform for Developing Multiprocessor SoCs.	Computer	2005	DBLP DOI BibTeX RDF	hardware emulation platform, computing nodes, HW/SW development, microprocessors, multiprocessor systems, MPSoCs, network interfaces
32	Johanna Sepúlveda, Cezar Reinbrecht, Siavoosh Payandeh Azad, Behrad Niazmand, Gert Jervan	Understanding MPSoCs: exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs.	SAMOS	2018	DBLP DOI BibTeX RDF
32	Eduardo Wächter, Francisco F. S. Barreto, Vinicius Fochi, Alexandre M. Amory, Fernando Gehm Moraes	A layered approach for fault tolerant NoC-based MPSoCs - Special session: Dependable MPSoCs.	LATS	2016	DBLP DOI BibTeX RDF
32	Marcos Aurélio Pinto Cunha	Defining and using virtual platforms traces captured for debugging MPSoCs. (Définition et utilisation de traces issues de plateformes virtuelles pour le débogage des MPSoCs).		2016	RDF
32	Damien Hedde	Analyse de la consistance mémoire dans les MPSoCs à l'aide du prototypage virtuel. (Analysis of memory consistency in MPSoCs using virtual prototyping).		2013	RDF
32	Luciano Copello Ost	Abstract models of NoC-based MPSoCs for design space exploration (Abstract models of NoC-based MPSoCs for design space exploration).		2010	RDF
30	Mohamed M. Sabry, Martino Ruggiero, Pablo García Del Valle	Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	multi-core, virtual platform, L2 cache
30	Bastian Ristau, Torsten Limberg, Gerhard P. Fettweis	A Mapping Framework Based on Packing for Design Space Exploration of Heterogeneous MPSoCs.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	Performance evaluation, Mapping, Design space exploration, MPSoC, Packing
30	Andrea Marongiu, Andrea Acquaviva, Luca Benini	OpenMP Support for NBTI-Induced Aging Tolerance in MPSoCs.	SSS	2009	DBLP DOI BibTeX RDF
30	Marcus Vinícius Carvalho da Silva, Nadia Nedjah, Luiza de Macedo Mourelle	Application Synthesis for MPSoCs Implementation Using Multiobjective Optimization.	IWANN (1)	2009	DBLP DOI BibTeX RDF
30	Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar	Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	vlsi design, task allocation, multiprocessor systems-on-chip
30	Minyoung Kim, Sudarshan Banerjee, Nikil D. Dutt, Nalini Venkatasubramanian	Energy-aware cosynthesis of real-time multimedia applications on MPSoCs using heterogeneous scheduling policies.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	cosynthesis, energy, Real-time scheduling, MPSoC
30	Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu	Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs.	DATE	2008	DBLP DOI BibTeX RDF
30	Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross	Proactive temperature balancing for low cost thermal management in MPSoCs.	ICCAD	2008	DBLP DOI BibTeX RDF
30	Chengmo Yang, Alex Orailoglu	A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization.	CASES	2008	DBLP DOI BibTeX RDF	fault detection, checkpointing, fault recovery
30	Wei Han 0001, Ying Yi, Mark Muir, Ioannis Nousias, Tughrul Arslan, Ahmet Teyfik Erdogan	MRPSIM: A TLM based simulation tool for MPSOCS targeting dynamically reconfigurable processors.	SoCC	2008	DBLP DOI BibTeX RDF
30	Maurice Sebastian, Rolf Ernst	Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements.	ETFA	2008	DBLP DOI BibTeX RDF
30	Daniel Barcelos, Eduardo Wenzel Brião, Flávio Rech Wagner	A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs.	SBCCI	2007	DBLP DOI BibTeX RDF	energy, MPSoC, NoC, task migration, memory organization
30	Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes	Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs.	FCCM	2007	DBLP DOI BibTeX RDF
30	Chun-Mok Chung, Jihong Kim 0001, Dohyung Kim	Reducing snoop-energy in shared bus-based mpsocs by filtering useless broadcasts.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	broadcast filtering, low-energy cache coherency, MPSoC
30	Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa	Power/performance hardware optimization for synchronization intensive applications in MPSoCs.	DATE	2006	DBLP DOI BibTeX RDF
30	Minyoung Kim, Sudarshan Banerjee, Nikil D. Dutt, Nalini Venkatasubramanian	Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	cosynthesis, energy, real-time scheduling, MPSoC
30	Mirko Loghi, Massimo Poncino, Luca Benini	Synchronization-driven dynamic speed scaling for MPSoCs.	ISLPED	2006	DBLP DOI BibTeX RDF	MPSoC, power optimization, dynamic voltage/frequency scaling
30	Michele Lombardi 0001, Michela Milano	Stochastic Allocation and Scheduling for Conditional Task Graphs in MPSoCs.	CP	2006	DBLP DOI BibTeX RDF
27	Vincenzo Rana, Donatella Sciuto	A novel design framework for the design of reconfigurable systems based on NoCs.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	network-on-chip, reconfigurable computing, design flow, mapping algorithm
27	Jianjiang Ceng, Weihua Sheng, Jerónimo Castrillón, Anastasia Stulova, Rainer Leupers, Gerd Ascheid, Heinrich Meyr	A high-level virtual platform for early MPSoC software development.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	simulation, parallel programming, software, embedded, MPSoC, system level design, virtual platform
27	Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne	MPSoC Design Using Application-Specific Architecturally Visible Communication.	HiPEAC	2009	DBLP DOI BibTeX RDF
27	Chen-Ling Chou, Ümit Y. Ogras, Radu Marculescu	Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
27	Christian El Salloum, Roman Obermaisser, Bernhard Huber, Hermann Kopetz	A Novel Naming Scheme for System-on-a-Chips Supporting Dynamic Resource Management.	EDCC	2008	DBLP DOI BibTeX RDF
27	Roman Obermaisser, Hubert Kraut, Christian El Salloum	A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR.	EDCC	2008	DBLP DOI BibTeX RDF
27	Gilles Sassatelli, Nicolas Saint-Jean, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes	Architectural Issues in Homogeneous NoC-Based MPSoC.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
27	Olga Golubeva, Mirko Loghi, Massimo Poncino	On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	synchronization, multiprocessor, system-on-chip, energy
27	Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster 0001	Reducing power while increasing performance with supercisc.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	Low-power, synthesis, VLIW, predication, multicore architectures
27	Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo	Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA.	ICSAMOS	2006	DBLP DOI BibTeX RDF
27	Wayne H. Wolf	Multiprocessor Systems-on-Chips.	ISVLSI	2006	DBLP DOI BibTeX RDF
27	Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha	Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors.	VLSI Design	2005	DBLP DOI BibTeX RDF
23	Haris Javaid, Sri Parameswaran	A design flow for application specific heterogeneous pipelined multiprocessor systems.	DAC	2009	DBLP DOI BibTeX RDF	design space exploration, integer linear programming, MPSoCs
23	Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Michela Milano, Luca Benini	A Fast and Accurate Technique for Mapping Parallel Applications on Stream-Oriented MPSoC Platforms with Communication Awareness.	Int. J. Parallel Program.	2008	DBLP DOI BibTeX RDF	scheduling, Integer Programming, Constraint Programming, MPSoCs, allocation
23	Konstantinos Aisopos, Chien-Chun Chou, Li-Shiuan Peh	Extending open core protocol to support system-level cache coherence.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	coherence extensions, ocp, open core protocol, specification, mpsocs
23	Haris Javaid, Sri Parameswaran	Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	design space exploration, integer linear programming, MPSoCs
23	Andrea Marongiu, Luca Benini, Mahmut T. Kandemir	Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms.	CASES	2007	DBLP DOI BibTeX RDF	code parallelization, MPSoCs, barrier synchronization
23	Elias Teodoro Silva Jr., Flávio Rech Wagner, Edison Pignaton de Freitas, Carlos Eduardo Pereira	Hardware support in a middleware for distributed and real-time embedded applications.	SBCCI	2006	DBLP DOI BibTeX RDF	real-time systems, middleware, energy efficiency, MPSoCs, embedded applications
23	Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere	Multi-processor system design with ESPAM.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	system-level design, Kahn process networks, heterogeneous MPSoCs
23	Steve Leibson, James Kim	Configurable Processors: A New Era in Chip Design.	Computer	2005	DBLP DOI BibTeX RDF	nanometer silicon lithography, microprocessors, multiprocessor systems, MPSoCs, configurable processors
23	Ahmed Amine Jerraya, Hannu Tenhunen, Wayne H. Wolf	Guest Editors' Introduction: Multiprocessor Systems-on-Chips.	Computer	2005	DBLP DOI BibTeX RDF	SoCs, microprocessors, multiprocessor systems, MPSoCs, chip design, VLSI technology
23	Markus Levy	Evaluating Digital Entertainment System Performance.	Computer	2005	DBLP DOI BibTeX RDF	DENBench suite, digital media benchmarks, digital device performance, EEMBC, microprocessor systems, benchmarks, MPSoCs
23	John Goodacre, Andrew N. Sloss	Parallelism and the ARM Instruction Set Architecture.	Computer	2005	DBLP DOI BibTeX RDF	computer architectures, multiprocessor systems, MPSoCs, RISC processors
16	Diego V. Cirilo do Nascimento, Kyriakos Georgiou, Kerstin I. Eder, Samuel Xavier de Souza	Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs.	IEEE Embed. Syst. Lett.	2024	DBLP DOI BibTeX RDF
16	Luca Colagrande, Luca Benini	Optimizing Offload Performance in Heterogeneous MPSoCs.	CoRR	2024	DBLP DOI BibTeX RDF
16	Khalil Esper, Jürgen Teich	History-Based Run-Time Requirement Enforcement of Non-Functional Properties on MPSoCs.	NG-RES@HiPEAC	2024	DBLP DOI BibTeX RDF
16	Waqar Amin, Fawad Hussain, Sheraz Anjum, Sharoon Saleem, Waqar Ahmad, Mubashir Hussain	HyDra: Hybrid Task Mapping Application Framework for NOC-Based MPSoCs.	IEEE Access	2023	DBLP DOI BibTeX RDF
16	Sidhartha Sankar Rout, Badri M, Mitali Sinha, Sujay Deb	ReDeSIGN: Reuse of Debug Structures for Improvement in Performance Gain of NoC Based MPSoCs.	IEEE Trans. Emerg. Top. Comput.	2023	DBLP DOI BibTeX RDF
16	Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Miroslav Vasic, David Atienza	Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
16	Tomasz Kloda, Giovani Gracioli, Rohan Tabish, Reza Mirosanlou, Renato Mancuso 0001, Rodolfo Pellizzoni, Marco Caccamo	Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs.	ACM Trans. Embed. Comput. Syst.	2023	DBLP DOI BibTeX RDF
16	Dipika Deb, John Jose	ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs.	ACM Trans. Embed. Comput. Syst.	2023	DBLP DOI BibTeX RDF
16	Jan Spieck, Stefan Wildermann, Jürgen Teich	A Learning-based Methodology for Scenario-aware Mapping of Soft Real-time Applications onto Heterogeneous MPSoCs.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
16	Khalil Esper, Stefan Wildermann, Jürgen Teich	Automatic Synthesis of FSMs for Enforcing Non-functional Requirements on MPSoCs Using Multi-objective Evolutionary Algorithms.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
16	Halima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque	Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs.	CoRR	2023	DBLP DOI BibTeX RDF
16	Marvin Fuchs, Luis E. Ardila-Perez, Torben Mehner, Oliver Sander	Split Boot - True Network-Based Booting on Heterogeneous MPSoCs.	CoRR	2023	DBLP DOI BibTeX RDF
16	Rohan Tabish, Rodolfo Pellizzoni, Renato Mancuso 0001, Giovani Gracioli, Reza Mirosanlou, Marco Caccamo	X-Stream: Accelerating streaming segments on MPSoCs for real-time applications.	J. Syst. Archit.	2023	DBLP DOI BibTeX RDF
16	Ondrej Benedikt, Javier Pérez-Rodríguez, Patrick Meumeu Yomsi, Michal Sojka	Reducing Peak Temperature by Redistributing Idle-Time in Modern MPSoCs.	ISORC	2023	DBLP DOI BibTeX RDF
16	Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso 0001	Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs.	ECRTS	2023	DBLP DOI BibTeX RDF
16	Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella 0001, Francisco Javier Cazorla-Almeida	ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs.	SAC	2023	DBLP DOI BibTeX RDF
16	Klajd Zyla, Florian Maurer 0003, Thomas Wild, Andreas Herkersdorf	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs.	ARCS	2023	DBLP DOI BibTeX RDF
16	Khalil Esper, Jan Spieck, Pierre-Louis Sixdenier, Stefan Wildermann, Jürgen Teich	RAVEN: Reinforcement Learning for Generating Verifiable Run-Time Requirement Enforcers for MPSoCs.	NG-RES@HiPEAC	2023	DBLP DOI BibTeX RDF
16	Halima Bouzidi, Mohanad Odema, Hamza Ouarnoughi, Smaïl Niar, Mohammad Abdullah Al Faruque	Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs.	DAC	2023	DBLP DOI BibTeX RDF
16	Laura Elena Rubio Anguiano, José Luis Briz, Antonio Ramírez-Treviño	Accounting for Preemption and Migration Costs in the Calculation of Hard Real-Time Cyclic Executives for MPSoCs.	IEEE Robotics Autom. Lett.	2022	DBLP DOI BibTeX RDF
16	Soroush Heidari, Mehdi Ghasemi 0003, Young Geun Kim, Carole-Jean Wu, Sarma B. K. Vrudhula	CAMDNN: Content-Aware Mapping of a Network of Deep Neural Networks on Edge MPSoCs.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
16	Mostafa Rizk, Kevin J. M. Martin, Jean-Philippe Diguet	Run-Time Remapping Algorithm of Dataflow Actors on NoC-Based Heterogeneous MPSoCs.	IEEE Trans. Parallel Distributed Syst.	2022	DBLP DOI BibTeX RDF
16	Diego V. Cirilo do Nascimento, Kyriakos Georgiou, Kerstin I. Eder, Samuel Xavier de Souza	Evaluating the effects of reducing voltage margins for energy-efficient operation of MPSoCs.	CoRR	2022	DBLP DOI BibTeX RDF
16	Athena Abdi, Armin Salimi-Badr	A novel evolutionary-based neuro-fuzzy task scheduling approach to jointly optimize the main design challenges of heterogeneous MPSoCs.	CoRR	2022	DBLP DOI BibTeX RDF
16	Ehsan Saboori, Samar Abdi	Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping.	CoRR	2022	DBLP DOI BibTeX RDF
16	Chen Liu 0013, Chengmo Yang	Defense Against Hardware Trojan Collusion in MPSoCs.	Behavioral Synthesis for Hardware Security	2022	DBLP DOI BibTeX RDF
16	Guillem Cabo, Sergi Alcaide, Carles Hernández 0001, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella 0001	SafeSU-2: a Safe Statistics Unit for Space MPSoCs.	DATE	2022	DBLP DOI BibTeX RDF
16	Johanna Sepúlveda, Dominik Winkler	Super Acceleration of Dilithium in MPSoCs Critical Environments.	ETS	2022	DBLP DOI BibTeX RDF
16	Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, David Atienza	Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays.	ACM Great Lakes Symposium on VLSI	2022	DBLP DOI BibTeX RDF
16	Alfonso Mascareñas González, Jean-Baptiste Chaudron, Frédéric Boniol, Youcef Bouchebaba, Jean-Loup Bussenot	Task and Memory Mapping Optimization for SDRAM Interference Minimization on Heterogeneous MPSoCs.	ETFA	2022	DBLP DOI BibTeX RDF
16	Khalil Esper, Stefan Wildermann, Jürgen Teich	Multi-Requirement Enforcement of Non-Functional Properties on MPSoCs Using Enforcement FSMs - A Case Study.	NG-RES@HiPEAC	2022	DBLP DOI BibTeX RDF
16	Alfonso Mascareñas González, Jean-Baptiste Chaudron, Frédéric Boniol, Youcef Bouchebaba, Jean-Loup Bussenot	Towards an efficient cost function equation for DDR SDRAM interference analysis on heterogeneous MPSoCs.	DS-RT	2022	DBLP DOI BibTeX RDF