Search results for "Multiprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
65	Kenichiro Noguchi, Isao Ohnishi, Hiroshi Morita	Design considerations for a heterogeneous tightly-coupled multiprocessor system.	AFIPS National Computer Conference	1975	DBLP DOI BibTeX RDF
60	Jingzhao Ou, Viktor K. Prasanna	Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	FPGA, design space exploration, processor, cosimulation
50	Rob Aitken, Krisztián Flautner, John Goodacre	High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
50	Diana Göhringer, Michael Hübner 0001, Jürgen Becker 0001	Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
49	Abhishek Chandra, Prashant J. Shenoy	Hierarchical Scheduling for Symmetric Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2008	DBLP DOI BibTeX RDF	Scheduling, Multiprocessor Systems, Hierarchical design
49	Xinyu Li, Omar Hammami	Small scale multiprocessor soft IP (SSM IP): single FPGA chip area and performance evaluation.	FPGA	2009	DBLP DOI BibTeX RDF	fpga, multiprocessor, network on chip
49	Tei-Wei Kuo, Jun Wu 0010, Hsin-Chia Hsih	Real-Time Concurrency Control in a Multiprocessor Environment.	IEEE Trans. Parallel Distributed Syst.	2002	DBLP DOI BibTeX RDF	Real-time concurrency control, two-version database, multiprocessor architecture, priority inversion
49	Xiaodong Zhang 0001	Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor.	IEEE Trans. Software Eng.	1991	DBLP DOI BibTeX RDF	sequential code, virtual memory paging, modified Ware model, Encore Multimax, performance evaluation, architecture, performance modelling, performance measurement, multiprocessing systems, shared memory multiprocessor, cache coherence, multiprogramming, barriers, resource scheduling, timing models
48	José María López, José Luis Díaz, Daniel F. García	Utilization Bounds for EDF Scheduling on Real-Time Multiprocessor Systems.	Real Time Syst.	2004	DBLP DOI BibTeX RDF	multiprocessor utilization bounds, partitioning, multiprocessor scheduling, earliest deadline first scheduling, bin-packing problem
45	José María López, José Luis Díaz, Daniel F. García	Minimum and Maximum Utilization Bounds for Multiprocessor Rate Monotonic Scheduling.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF
44	Chiara Francalanci, Paolo Giacomazzi	High-Performance Self-Routing Algorithm for Multiprocessor Systems with Shuffle Interconnections.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	shuffle interconnection, Multiprocessor systems, self routing
44	Makoto Sugihara	SEU Vulnerability of Multiprocessor Systems and Task Scheduling for Heterogeneous Multiprocessor Systems.	ISQED	2008	DBLP DOI BibTeX RDF	Heterogeneous Multiprocessor Systems, Reliability, Task Scheduling, Soft Error, Single Event Upset
43	Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada	RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip.	ASP-DAC	2007	DBLP DOI BibTeX RDF	codesign toolkit, embedded multiprocessor systems, system-level design toolkit, real-time operating systems, RTOS, multiprocessor systems-on-chip
43	G. N. Srinivasa Prasanna, Bruce R. Musicus	Generalized Multiprocessor Scheduling and Applications to Matrix Computations.	IEEE Trans. Parallel Distributed Syst.	1996	DBLP DOI BibTeX RDF	multiprocessor compilation, parallel processing, task scheduling, multiprocessor scheduling, distributed-memory multiprocessors, DAG scheduling, communication locality
42	Qiang Li, David B. Gustavson	Fat-tree for local area multiprocessors.	IPPS	1995	DBLP DOI BibTeX RDF	local area multiprocessors, LAMP, high-performance low-cost parallel computing, LAN-size area, remote data cache, high performance multiprocessor, point-to-point physical connections, high system throughput, fat-tree topology, cable length, link clock speeds, biCMOS chips, performance evaluation, parallel architectures, parallel architecture, multiprocessor interconnection networks, local area networks, latency, packet switching, packet switch, CMOS, shared memory systems, distributed memory systems, simulation results, cache storage, system buses, SCI, buffer requirements, distributed-shared-memory multiprocessor, scalable coherent interface
41	Lennart Lindh, Johan Stärner, John Furunäs	From single to multiprocessor real-time kernels in hardware.	IEEE Real Time Technology and Applications Symposium	1995	DBLP DOI BibTeX RDF	multiprocessor real-time kernels, single processor real-time kernels, improved performance, improved determinism, integrated deterministic CPU, deterministic multitasking real time kernel, high performance multitasking real time kernel, high performance standalone multitasking real time kernel, deterministic standalone multitasking real time kernel, heterogeneous multiprocessor real-time systems, homogeneous multiprocessor real-time systems, scheduling, performance evaluation, real-time systems, multiprocessing systems, hardware, reconfigurable architectures, processor scheduling, multiprogramming, operating system kernels, firmware
41	Byoung-Joon Min, Sang-Seok Shin, Kee-Wook Rim	Design and analysis of a multiprocessor system with extended fault tolerance.	FTDCS	1995	DBLP DOI BibTeX RDF	extended fault tolerance, scalable multiprocessor system, tree-type interconnection networks, computational complexity, reliability, fault tolerant computing, multiprocessor interconnection networks, latency, multiprocessing systems, multiprocessor system, performance penalty, implementation complexity
40	Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere	Systematic and Automated Multiprocessor System Design, Programming, and Implementation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
40	Ankit Mathur, Mayank Agarwal, Soumyadeb Mitra, Anup Gangwar, M. Balakrishnan, Subhashis Banerjee	SMPS: an FPGA-based prototyping environment for multiprocessor embedded systems (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
40	Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha	Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors.	VLSI Design	2005	DBLP DOI BibTeX RDF
40	Jack B. Dennis	Fresh Breeze: a multiprocessor chip architecture guided by modular programming principles.	SIGARCH Comput. Archit. News	2003	DBLP DOI BibTeX RDF
40	Michael J. Anderson, Bryan Catanzaro, Jike Chong, Ekaterina Gonina, Kurt Keutzer, Chao-Yue Lai, Mark Murphy, Bor-Yiing Su, Narayanan Sundaram	PALLAS: Mapping Applications onto Manycore.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Ricardo Reis 0001	Design Tools and Methods for Chip Physical Design.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini	An Introduction to Multi-Core System on Chip - Trends and Challenges.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting	Invasive Computing: An Overview.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Benny Akesson, Anca Mariana Molnos, Andreas Hansson 0001, Jude Angelo Ambrose, Kees Goossens	Composability and Predictability for Independent Application Development, Verification, and Execution.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Dac Pham, Jim Holt, Sanjay Deshpande	Embedded Multicore Systems: Design Challenges and Opportunities.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Miltos D. Grammatikakis, George Kornaros, Marcello Coppola	Power-Aware Multicore SoC and NoC Design.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Rakesh Kumar 0002, Timothy G. Mattson, Gilles Pokam, Rob F. Van der Wijngaart	The Case for Message Passing on Many-Core Chips.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld	Hardware Support for Efficient Resource Utilization in Manycore Processor Systems.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
40	Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Fan Dongrui, Hao Zhang 0009	The MULTICUBE Design Flow.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Enrico Rigoni, Carlos Kavka, Alessandro Turco, Giovanni Mariani	Response Surface Modeling for Design Space Exploration of Embedded System.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Patrick Bellasi, Simone Corbetta, William Fornaciari	Run-Time Resource Management at the Operating System level.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Hector Posadas, Sara Real, Eugenio Villar	M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Cristina Silvano	Conclusions.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Prabhat Avasare, Chantal Ykman-Couvreur, Geert Vanmeerbeeck, Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria	Design Space Exploration Supporting Run-Time Resource Management.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Carlos Kavka, Luka Onesti, Enrico Rigoni, Alessandro Turco, Sara Bocchio, Fabrizio Castro, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani, Dongrui Fan, Hao Zhang 0009, Shibin Tang	Design Space Exploration of Parallel Architectures.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Marcos Martínez, David Ferruz, Hector Posadas, Eugenio Villar	High-level modeling and exploration of a powerline communication network based on System-on-Chip.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Giovanni Mariani, Chantal Ykman-Couvreur, Prabhat Avasare, Geert Vanmeerbeeck, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria	Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
40	Enrico Rigoni, Carlos Kavka, Alessandro Turco, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani	Optimization Algorithms for Design Space Exploration of Embedded Systems.	Multi-objective Design Space Exploration of Multiprocessor SoC Architectures	2011	DBLP DOI BibTeX RDF
39	Jason Cong, Guoling Han, Wei Jiang	Synthesis of an application-specific soft multiprocessor system.	FPGA	2007	DBLP DOI BibTeX RDF	clustering, multiprocessor, pipeline, labeling, design space
39	Maode Ma, Babak Hamidzadeh	A Fault-tolerant Strategy for Real-time Task Scheduling on Multiprocessor System.	ISPAN	1996	DBLP DOI BibTeX RDF	Multiprocessor computer, Chunk Self-Scheduling, Simulation, Fault tolerance, Real-time system
39	Xiaodong Zhang 0001, Xiaohan Qin	Performance Prediction and Evaluation of Parallel Processing on a NUMA Multiprocessor.	IEEE Trans. Software Eng.	1991	DBLP DOI BibTeX RDF	nonuniform memory access, parallel processing performance, BBN GP1000, NUMA shared-memory multiprocessor, scheduling, performance evaluation, parallel processing, programming environment, multiprocessing systems, analytical models, interprocessor communication, process scheduling, network contention, process synchronization, memory contention, optimal strategies, remote memory access
39	Norihisa Suzuki	TOP-1 Multiprocessor Workstation.	Workshop on Parallel Lisp	1989	DBLP DOI BibTeX RDF	Snoop cache, Queuing model simulation, Cache coherency, Interprocessor communication, Shared-bus multiprocessor
38	Chris J. Scheiman, Peter R. Cappello	A Period-Processor-Time-Minimal Schedule for Cubical Mesh Algorithms.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	period-processor-time-minimal schedule, cubical mesh algorithms, precedence-constrained multiprocessor schedules, toroidally connected mesh, scheduling, parallel algorithms, computational complexity, multiprocessor interconnection networks, directed graphs, systolic arrays, systolic array, directed acyclic graph, matrix algebra, matrix product, computationalcomplexity
38	Yun Jiang, Akifumi Makinouchi	A parallel hash-based join algorithm for a networked cluster of multiprocessor nodes.	COMPSAC	1997	DBLP DOI BibTeX RDF	parallel hash-based join algorithm, multiprocessor nodes, distributed shared virtual space, message model, performance, design, parallel algorithms, parallel processing, shared-memory multiprocessor, distributed environments, high speed, low-cost, skew, ease of use, relational database systems, networked cluster
38	Guan-Joe Lai, Cheng Chen	A new scheduling strategy for NUMA multiprocessor systems.	ICPADS	1996	DBLP DOI BibTeX RDF	non-uniform memory access, Longest Extended Critical Path First, multiprocessor systems, shared-memory multiprocessor, shared memory systems, processor scheduling, NUMA, scheduling strategies
38	Keying Wu, P. K. H. Ng, Xing Dong Jia, Richard M. M. Chen, A. M. Layfield	Performance tuning of a multiprocessor sparse matrix equation solver.	HICSS (1)	1995	DBLP DOI BibTeX RDF	multiprocessor sparse matrix equation solver, sparse matrix equation, linear simultaneous equations, electrical circuit, multiprocessor implementation, parallel direct method, parallel algorithms, circuit analysis computing, SPICE, SPICE, circuit simulation, sparse matrices, performance tuning
38	Wonyong Sung, Sanjit K. Mitra, Branko Jeren	Multiprocessor Implementation of Digital Filtering Algorithms Using a Parallel Block Processing Method.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	recursive filtering algorithms, digital filtering algorithms, parallel block processing, digital signal processingalgorithms, precedence graph, dependencyrelation, adaptive filtering algorithms, parallel algorithms, interconnection network, multiprocessor interconnection networks, multiprocessor system, data dependency, filtering theory, digital filters, ring network, prediction theory, FIR, computerised signal processing, scheduling method
38	Jang-Ping Sheu, Tsu-Huei Thai	Partitioning and Mapping Nested Loops on Multiprocessor Systems.	IEEE Trans. Parallel Distributed Syst.	1991	DBLP DOI BibTeX RDF	constant loop-carried dependencies, message-passing multiprocessor systems, interblock communication, execution ordering, time function, hyperplanemethod, fixed-size multiprocessor system, heuristic mapping algorithm, hypercubemachines, parallel algorithms, parallel programming, parallel, partitioning, mapping, iterations, data exchange, blocks, multiprogramming, communication overhead, nested loops
35	Nguyen Duc Thai	Real-Time Scheduling in Distributed Systems.	PARELEC	2002	DBLP DOI BibTeX RDF
35	Benjamin C. Lee, Jamison D. Collins, Hong Wang 0003, David M. Brooks	CPR: Composable performance regression for scalable multiprocessor models.	MICRO	2008	DBLP DOI BibTeX RDF
35	Yujia Jin, William Plishker, Kaushik Ravindran, Nadathur Satish, Kurt Keutzer	Soft multiprocessor systems for network applications (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
35	James H. Anderson, Sanjoy K. Baruah	Energy-Efficient Synthesis of Periodic Task Systems upon Identical Multiprocessor Platforms.	ICDCS	2004	DBLP DOI BibTeX RDF
34	Dilip Sarkar	Cost and Time-Cost Effectiveness of Multiprocessing.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	time-cost effectiveness, performance evaluation, performance, parallel algorithms, parallel algorithms, efficiency, multiprocessing systems, multiprocessor systems, cost effectiveness, pipelined computers
34	Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi	ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs.	ACM Trans. Reconfigurable Technol. Syst.	2009	DBLP DOI BibTeX RDF	simulator, FPGA, prototype, multiprocessor, multicore, emulator
34	Evgeny V. Shchepin, Nodari Vakhania	On the geometry, preemptions and complexity of multiprocessor and shop scheduling.	Ann. Oper. Res.	2008	DBLP DOI BibTeX RDF	Shop scheduling, Algorithm, Time complexity, Multiprocessor scheduling, Preemption
34	Muhammet Fikret Ercan	A performance comparison of PSO and GA in scheduling hybrid flow-shops with multiprocessor tasks.	SAC	2008	DBLP DOI BibTeX RDF	multiprocessor task scheduling, flow shops, hybrid particle swarm optimization
34	Lars Lundberg, Håkan Lennerstad	Guaranteeing Response Times for Aperiodic Tasks in Global Multiprocessor Scheduling.	Real Time Syst.	2007	DBLP DOI BibTeX RDF	Aperiodic, Dhalls effect, Optimal threshold, Synthetic utilization, Scheduling, Multiprocessor
34	Naser Sedaghati-Mokhtari, Mahdi Nazm Bojnordi, Sied Mehdi Fakhraie	MDST: Multiprocessor DSP Simulation Toolkit for Voice Processing Applications.	MASCOTS	2007	DBLP DOI BibTeX RDF	MDST, Multiprocessor DSP Simulation toolkit, Voice processing applications
34	Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, Shau-Yin Tseng	Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF	Fault Tolerance, Multiprocessor Systems, Real-Time Task Scheduling, Task Replication
34	Guolong Lin, Rajmohan Rajaraman	Approximation algorithms for multiprocessor scheduling under uncertainty.	SPAA	2007	DBLP DOI BibTeX RDF	approximation algorithms, multiprocessor scheduling
34	Dakai Zhu 0001, Rami G. Melhem, Bruce R. Childers	Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multiprocessor Real-Time Systems.	IEEE Trans. Parallel Distributed Syst.	2003	DBLP DOI BibTeX RDF	slack sharing, scheduling, Real-time systems, multiprocessor
34	Aleksei V. Fishkin, Klaus Jansen, Lorant Porkolab	On Minimizing Average Weighted Completion Time: A PTAS for Scheduling General Multiprocessor Tasks.	FCT	2001	DBLP DOI BibTeX RDF	scheduling, Parallel processing, multiprocessor tasks
34	Sivarama P. Dandamudi, Samir Ayachi	Performance of Hierarchical Processor Scheduling in Shared-Memory Multiprocessor Systems.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	performance evaluation, multiprocessor systems, processor scheduling, time-sharing, Hierarchical scheduling, space-sharing
34	Cosimo Antonio Prete, Gianpaolo Prina, Luigi M. Ricciardi	A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF	multiple cache consistency, performance analysis, multiprocessor, Cache memory, trace-driven simulation, coherence protocol
34	Edwin S. H. Hou, Nirwan Ansari, Hong Ren	A Genetic Algorithm for Multiprocessor Scheduling.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	robust stochastic search algorithms, random task graphs, robot inverse dynamics computational task graph, genetic algorithms, genetic algorithm, simulation, scheduling, performance evaluation, optimization, computational complexity, optimisation, multiprocessing systems, NP-hard, heuristic search, multiprocessor scheduling, list scheduling
34	Khaled M. F. Elsayed	Parallel algorithms for the orthogonal multiprocessor.	ACM Southeast Regional Conference	1992	DBLP DOI BibTeX RDF	Jacobi's method, Orthogonal multiprocessor, image component labeling, parallel algorithms
33	David Parry 0001	Scalability in computing for today and tomorrow.	ARVLSI	1997	DBLP DOI BibTeX RDF	synergistic combination, performance growth, current multiprocessor alternatives, scalable SMP, Silicon Graphics Origin multiprocessor, S/sup 2/MP memory architecture, core technologies, scalability, system architecture, shared-memory multiprocessors, shared memory systems
33	Chris J. Scheiman, Peter R. Cappello	A Processor-Time-Minimal Systolic Array for Transitive Closure.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	processor-time-minimal multiprocessor schedules, 2-D mesh, parallel algorithms, systolic array, systolic arrays, directed acyclic graph, multiprocessor schedule, transitive closure
33	X. Zhao, Nigel J. Martin 0001, Roger G. Johnson	PPS - A Parallel Partition Sort Algorithm for Multiprocessor Database Systems.	DEXA Workshops	2000	DBLP DOI BibTeX RDF	parallel partition sort algorithm, multiprocessor database systems, workload imbalance, partition imbalance, heterogeneous imbalance, shared-nothing multiprocessor database environment, range intervals, fast internal sorting method, dynamic mechanism, interval sizes, dynamic mathematical model approach, data distribution estimation, parallel algorithms, skew, PPS
33	Björn Andersson, Jan Jonsson	Fixed-priority preemptive multiprocessor scheduling: to partition or not to partition.	RTCSA	2000	DBLP DOI BibTeX RDF	fixed-priority preemptive multiprocessor scheduling, multiprocessor real-time scheduling, task set partitioning, uniprocessor scheduling, periodically arriving tasks, preemption costs, migration costs, real-time systems, processor scheduling, software performance evaluation, algorithm performance
33	John Heinlein, Kourosh Gharachorloo, Robert P. Bosch Jr., Mendel Rosenblum, Anoop Gupta	Coherent Block Data Transfer in the FLASH Multiprocessor.	IPPS	1997	DBLP DOI BibTeX RDF	FLASH multiprocessor, block data transfer, multiple communication protocols, embedded protocol processor, protocol, shared memory, prefetching, cache storage, FLASH, cache coherence protocol, multiprocessor architecture, MAGIC
33	Gyung-Leen Park, Behrooz A. Shirazi, Jeff Marquis	DFRN: A New Approach for Duplication Based Scheduling for Distributed Memory Multiprocessor Systems.	IPPS	1997	DBLP DOI BibTeX RDF	DFRN, duplication based scheduling, distributed memory multiprocessor systems, parallel execution time minimization, DBS algorithms, task duplication method, worst case behavior, tree structured input directed acyclic graph, time complexity, distributed memory systems, performance improvement, optimal schedule, boundary condition, multiprocessor scheduling problems
33	Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas	The Augmint multiprocessor simulation toolkit for Intel x86 architectures.	ICCD	1996	DBLP DOI BibTeX RDF	Augmint multiprocessor simulation toolkit, Intel x86 architectures, publicly available simulation tools, instruction mix, memory reference patterns, CISC architectures, execution driven multiprocessor simulation toolkit, m4 macro extended C, C++ applications, SPLASH-2 benchmark suites, thread based programming model, shared global address space, private stack space, simulator interface, MINT simulation toolkit, x8d based uniprocessor systems, multiprocessing systems, trace driven simulation, architecture simulators, uniprocessors
33	Tatsuhiro Tsuchiya, Yoshiaki Kakuda, Tohru Kikuno	A new fault-tolerant scheduling technique for real-time multiprocessor systems.	RTCSA	1995	DBLP DOI BibTeX RDF	real-time multiprocessor systems, task laxity, scheduling, fault-tolerant, fault-tolerance, real-time systems, fault tolerant computing, multiprocessing systems, multiprocessor systems, task scheduling, processor scheduling, aperiodic tasks
33	Stephen Lucci, Izidor Gertner, Anil Gupta, Uday Hegde	Reflective-memory multiprocessor.	HICSS (1)	1995	DBLP DOI BibTeX RDF	reflective-memory multiprocessor, hardware-supported data replication, multiple computers, memory semantics, reflective memory implementation, Encore Infinity, spinlocks, cache coherency problems, massive replication, recovery procedure, crashed nodes, reliability, fault tolerant computing, shared memory systems, distributed memory systems, system recovery, cache storage, cached architectures, distributed shared memory multiprocessor
33	Stefan Ronngren, Behrooz A. Shirazi	Static multiprocessor scheduling of periodic real-time tasks with precedence constraints and communication costs.	HICSS (2)	1995	DBLP DOI BibTeX RDF	static multiprocessor scheduling, periodic real-time tasks, large task sets, exclusion relation, heuristic scheduling algorithms, clustering, real-time systems, resource allocation, NP-complete, multiprocessing systems, communication complexity, mutual exclusion, processor scheduling, timing constraints, task allocation, communication costs, precedence constraints, multiprocessor architecture, precedence relations, scheduling methods
33	Sunggu Lee, Kang G. Shin	On Probabilistic Diagnosis of Multiprocessor Systems Using Multiple Syndromes.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	probabilistic diagnosis, multiple syndromes, distributedself-diagnosis, comparison testing, diagnostic accuracy, sparseinterconnection networks, interprocessor tests, low fault coverage, system-leveldiagnosis, performance evaluation, fault tolerant computing, probability, multiprocessor, multiprocessing systems, multiprocessor systems, multicomputer, self-test, intermittent fault, diagnosis algorithms, fault-tolerantcomputing
33	Chunming Qiao, Rami G. Melhem	Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	MIN's, multiprocessor communications, TDM-MIN's, N time slots, n-dimensional hypercubes, Markov analysis, partition of connection requests, partitioning, mappings, reconfiguration, multiprocessor interconnection networks, embedding, meshes, NP-hard, multistage interconnection networks, optical interconnects, rings, binary trees, shift registers, time division multiplexing, time division multiplexed, round-robin, cube-connected-cycles
33	Eva Ma, Dennis G. Shea	E-Kernel: An Embedding Kernel on the IBM Victor V256 Multiprocessor for Program Mapping and Network Reconfiguration.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	E-kernel, embedding kernel, IBM victor V256 multiprocessor, program mapping, message-passing partitionable multiprocessor, new network topology, 2D mesh network, task graph topologies, communication network topology, real-time systems, parallel programming, graph theory, message passing, multiprocessing systems, parallel system, task graph, program diagnostics, communication model, asymptotically optimal, reconfigured network, network reconfiguration
33	Rajiv Gupta 0001	Synchronization and Communication Costs of Loop Partitioning on Shared-Memory Multiprocessor Systems.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	static loop scheduling, staticloop decomposition, computer-assisted run-time scheduling, multidimensional loops, operation execution costs, synchronization costs, programexecution, synchronization instruction, Encore multiprocessor system, scheduling, parallel algorithms, parallel programming, program compilers, programming theory, communication costs, nested loops, self-scheduling, shared-memory multiprocessor systems, loop partitioning, program decomposition
33	Ben A. Blake, Karsten Schwan	Experimental Evaluation of a Real-Time Scheduler for a Multiprocessor System.	IEEE Trans. Software Eng.	1991	DBLP DOI BibTeX RDF	processor deadlines, process execution times, earliest possible start times, scheduling, real-time systems, real-time scheduler, multiprocessor system, multiprocessor scheduler, multiprogramming, assignment, robotics applications
30	Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere	Multi-processor system design with ESPAM.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	system-level design, Kahn process networks, heterogeneous MPSoCs
30	Shelby H. Funk, Sanjoy K. Baruah	Characteristics of EDF Schedulability on Uniform Multiprocessors.	ECRTS	2003	DBLP DOI BibTeX RDF
30	Manhee Lee, Minseon Ahn, Eun Jung Kim 0001	I2SEMS: Interconnects-Independent Security Enhanced Shared Memory Multiprocessor Systems.	PACT	2007	DBLP DOI BibTeX RDF
30	Benfano Soewito, Ning Weng	Methodology for Evaluating DNA Pattern Searching Algorithms on Multiprocessor.	BIBE	2007	DBLP DOI BibTeX RDF
30	Olivier Muller, Amer Baghdadi, Michel Jézéquel	ASIP-based multiprocessor SoC design for simple and double binary turbo decoding.	DATE	2006	DBLP DOI BibTeX RDF
30	Malcolm Mandviwalla, Nian-Feng Tzeng	Energy-Efficient Scheme for Multiprocessor-Based Router Linecards.	SAINT	2006	DBLP DOI BibTeX RDF	linecards, multiprocessors, Dynamic voltage scaling, energy consumption, routers
30	Byung-Joo Hong, Koon-Shik Cho, Seung-Hyun Kang, Suk-Yoon Lee, Jun Dong Cho	On the Configurable Multiprocessor SoC Platform with Crossbar Switch.	APCCAS	2006	DBLP DOI BibTeX RDF
30	Lars Lundberg, Håkan Lennerstad	Global Multiprocessor Scheduling of Aperiodic Tasks using Time-Independent Priorities.	IEEE Real Time Technology and Applications Symposium	2003	DBLP DOI BibTeX RDF
30	Sanjoy K. Baruah, Joël Goossens	Rate-monotonic scheduling on uniform multiprocessor.	ICDCS	2003	DBLP DOI BibTeX RDF	Uniform multiprocessors, periodic tasks, global scheduling, rate-monotonic algorithm, static priorities
30	Naraig Manjikian	Multiprocessor enhancements of the SimpleScalar tool set.	SIGARCH Comput. Archit. News	2001	DBLP DOI BibTeX RDF
30	Tei-Wei Kuo, Hsin-Chia Hsih	Concurrency control in a multiprocessor real-time database system.	ECRTS	2000	DBLP DOI BibTeX RDF
30	Pao-Ann Hsiung, Sao-Jie Chen, Tsung-Chien Hu, Shih-Chiang Wang	PSM: an object-oriented synthesis approach to multiprocessor system design.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF
30	Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki	A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor.	HPCA	1996	DBLP DOI BibTeX RDF
30	Xinmin Tian, Shashank S. Nemawarkar, Guang R. Gao, Herbert H. J. Hum	Data locality sensitivity of multithreaded computations on a distributed-memory multiprocessor.	CASCON	1996	DBLP BibTeX RDF
30	Gerardus Johannes Wichardus van Dijk, A. J. van der Wal	Partial Ordering of Synchronization Events for Distributed Debugging in Tightly-coupled Multiprocessor Systems.	EDMCC	1991	DBLP DOI BibTeX RDF
29	Amer Baghdadi	Exploration et conception systématique d'architectures multiprocesseurs monopuces dédiées à des applications spécifiques = methods and tools for multiprocessor systems on chip, hardware/software co-designExploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC. (Exploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC).		2002	RDF
29	Grant Martin	Multi-Processor SoC-Based Design Methodologies Using Configurable and Extensible Processors.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	MPSoC, programming models, dataflow, instruction-set extension, multiprocessor system-on-chip, configurable processor, electronic system-level design