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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 20 occurrences of 16 keywords
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Results
Found 23 publication records. Showing 23 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
101 | Mehrdad Reshadi, Daniel Gajski |
A cycle-accurate compilation algorithm for custom pipelined datapaths. |
CODES+ISSS |
2005 |
DBLP DOI BibTeX RDF |
NISC, cycle-accurate compiler, scheduling |
96 | Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski |
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
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80 | Chetan Murthy, Prabhat Mishra 0001 |
Bitmask-based control word compression for NISC architectures. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
no instruction set computer, compression |
72 | Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski |
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. |
ACM Trans. Reconfigurable Technol. Syst. |
2008 |
DBLP DOI BibTeX RDF |
Microcoded architectures, dictionary based compression, no-instruction-set computer, FPGA, memory optimization |
72 | Bita Gorjiara, Daniel Gajski |
FPGA-friendly code compression for horizontal microcoded custom IPs. |
FPGA |
2007 |
DBLP DOI BibTeX RDF |
dictionary-based compression, microcoded architectures, no-instruction-set computer, FPGA, memory optimization |
56 | Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski |
Designing a custom architecture for DCT using NISC technology. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
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56 | Bita Gorjiara, Daniel D. Gajski |
Custom Processor Design Using NISC: A Case-Study on DCT algorithm. |
ESTIMedia |
2005 |
DBLP DOI BibTeX RDF |
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31 | Fuchun Lin, Chaoping Xing, Yizhou Yao, Chen Yuan 0003 |
Amortized NISC over ℤ2k from RMFE. |
IACR Cryptol. ePrint Arch. |
2023 |
DBLP BibTeX RDF |
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31 | Yuval Ishai, Dakshita Khurana, Amit Sahai, Akshayaram Srinivasan |
Black-Box Reusable NISC with Random Oracles. |
IACR Cryptol. ePrint Arch. |
2023 |
DBLP BibTeX RDF |
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31 | Fuchun Lin, Chaoping Xing, Yizhou Yao, Chen Yuan 0003 |
Amortized NISC over $\mathbb {Z}_{2^k}$ from RMFE. |
ASIACRYPT (1) |
2023 |
DBLP DOI BibTeX RDF |
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31 | Yuval Ishai, Dakshita Khurana, Amit Sahai, Akshayaram Srinivasan |
Black-Box Reusable NISC with Random Oracles. |
EUROCRYPT (2) |
2023 |
DBLP DOI BibTeX RDF |
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31 | Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Youssef Atat, Yasser Mohanna |
NISC-Based MIMO MMSE Detector. |
J. Circuits Syst. Comput. |
2021 |
DBLP DOI BibTeX RDF |
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31 | Fabrice Benhamouda, Huijia Lin |
Mr NISC: Multiparty Reusable Non-Interactive Secure Computation. |
TCC (2) |
2020 |
DBLP DOI BibTeX RDF |
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31 | Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Ali Chamas Al Ghouwayel |
NISC Design Experience of Flexible Architectures for Digital Communication Applications. |
ICCA |
2018 |
DBLP DOI BibTeX RDF |
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31 | Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo |
ADMM hardware decoder for regular LDPC codes using a NISC-based architecture. |
WCNC |
2018 |
DBLP DOI BibTeX RDF |
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31 | Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat |
NISC-Based Soft-Input-Soft-Output Demapper. |
IEEE Trans. Circuits Syst. II Express Briefs |
2015 |
DBLP DOI BibTeX RDF |
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31 | Bertrand Le Gal, Christophe Jégo, Camille Leroux |
A Flexible NISC-Based LDPC Decoder. |
IEEE Trans. Signal Process. |
2014 |
DBLP DOI BibTeX RDF |
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31 | Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat |
Design and prototyping flow of NISC-based flexible MIMO turbo-equalizer. |
RSP |
2014 |
DBLP DOI BibTeX RDF |
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31 | Kanad Basu, Chetan Murthy, Prabhat Mishra 0001 |
Bitmask aware compression of NISC control words. |
Integr. |
2013 |
DBLP DOI BibTeX RDF |
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31 | Mohamed Wasfy Hassan, Ahmed A. Abouel Farag, Yasser Y. Hanafy |
NOA'S-Arc: NISC based, optimized array scalable architecture. |
MWSCAS |
2013 |
DBLP DOI BibTeX RDF |
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29 | Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski |
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). |
DAC |
2008 |
DBLP DOI BibTeX RDF |
C-based design flow, C-to-RTL, G729A, NISC, HLS, VoIP, ASIP |
29 | Bita Gorjiara, Daniel Gajski |
Automatic architecture refinement techniques for customizing processing elements. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
GNR, nanocoded architectures, no-instruction-set computer (NISC), refinement, high-level synthesis, power, ASIP, datapath, netlist |
29 | Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski |
Generic netlist representation for system and PE level design exploration. |
CODES+ISSS |
2006 |
DBLP DOI BibTeX RDF |
GNR, NISC, modeling, synthesis, system design, architecture description language, application-specific processor |
Displaying result #1 - #23 of 23 (100 per page; Change: )
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