Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
132 | Massimo Panella, Giuseppe Martinelli |
An RNS Architecture for Quasi-Chaotic Oscillators. |
J. VLSI Signal Process. |
2003 |
DBLP DOI BibTeX RDF |
RNS quasi-chaotic oscillators, RNS, secure communication, primitive polynomials |
104 | Luiz Maltar, Felipe M. G. França, Vladimir Castro Alves, Cláudio L. Amorim |
Implementation of RNS Addition and RNS Multiplication into FPGAs. |
FCCM |
1998 |
DBLP DOI BibTeX RDF |
|
100 | Gian Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re |
Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter. |
ISCAS (2) |
2005 |
DBLP DOI BibTeX RDF |
|
87 | Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano |
A Novel Error Detection and Correction Technique for RNS Based FIR Filters. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
87 | Leonel Sousa |
Efficient Method for Magnitude Comparison in RNS Based on Two Pairs of Conjugate Moduli. |
IEEE Symposium on Computer Arithmetic |
2007 |
DBLP DOI BibTeX RDF |
|
87 | Jean-Claude Bajard, Laurent Imbert |
A Full RNS Implementation of RSA. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
87 | Neil Burgess |
Scaling an RNS Number Using the Core Function. |
IEEE Symposium on Computer Arithmetic |
2003 |
DBLP DOI BibTeX RDF |
|
87 | Javier Ramírez 0001, Antonio García 0001, Pedro G. Fernández, Luis Parrilla 0001, Antonio Lloris-Ruíz |
Analysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform. |
FPL |
2000 |
DBLP DOI BibTeX RDF |
|
83 | Andreas Persson, Lars Bengtsson |
Forward and Reverse Converters and Moduli Set Selection in Signed-Digit Residue Number Systems. |
J. Signal Process. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Signed-digit, Moduli-selection, Residue number system, FIR filters, Converters |
83 | Shin-ichi Kawamura, Masanobu Koike, Fumihiko Sano, Atsushi Shimbo |
Cox-Rower Architecture for Fast Parallel Montgomery Multiplication. |
EUROCRYPT |
2000 |
DBLP DOI BibTeX RDF |
|
83 | Alexander Skavantzos, Thanos Stouraitis |
Grouped-moduli residue number systems for fast signal processing. |
ISCAS (3) |
1999 |
DBLP DOI BibTeX RDF |
|
82 | Shang Ma, Jianhao Hu, Lin Zhang, Xiang Ling 0002 |
An efficient RNS parity checker for moduli set {2 n - 1, 2 n + 1, 22 n + 1} and its applications. |
Sci. China Ser. F Inf. Sci. |
2008 |
DBLP DOI BibTeX RDF |
number comparison, sign determination, overflow detection, VLSI, RNS, parity check |
78 | Inseop Lee, W. Kenneth Jenkins |
The Design of Residue Number System Arithmetic Units for A VLSI Adaptive Equalizer. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
residue number, LMS, RNS |
73 | Shugang Wei |
Number conversions between RNS and mixed-radix number system based on Modulo (2p - 1) signed-digit arithmetic. |
SBCCI |
2005 |
DBLP DOI BibTeX RDF |
|
73 | Andrea Del Re, Alberto Nannarelli, Marco Re |
A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
73 | Wei Wang 0003, M. N. S. Swamy, M. Omair Ahmad |
RNS Application for Digital Image Processing. |
IWSOC |
2004 |
DBLP DOI BibTeX RDF |
|
73 | Javier Ramírez 0001, Antonio García 0001, Uwe Meyer-Bäse, Fred J. Taylor, Antonio Lloris-Ruíz |
Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic. |
J. VLSI Signal Process. |
2003 |
DBLP DOI BibTeX RDF |
field-programmable logic, digital signal processing, discrete wavelet transform, residue number system, distributed arithmetic |
73 | Peter R. Turner |
Fraction-Free RNS Algorithms for Solving Linear Systems. |
IEEE Symposium on Computer Arithmetic |
1997 |
DBLP DOI BibTeX RDF |
|
69 | Aaron So, Ben Liang 0001 |
A Lagrangian Approach for the Optimal Placement of Wireless Relay Nodes in Wireless Local Area Networks. |
Networking |
2006 |
DBLP DOI BibTeX RDF |
immobile relays, optimal placement, WLAN, throughput capacity |
69 | Chunsheng Liu, Krishnendu Chakrabarty |
Compact Dictionaries for Fault Diagnosis in Scan-BIST. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
69 | Matthias Nickles, Michael Rovatsos, Gerhard Weiß 0001 |
A Schema for Specifying Computational Autonomy. |
ESAW |
2002 |
DBLP DOI BibTeX RDF |
|
69 | W. Kenneth Jenkins, Bernard A. Schnaufer, Andrew J. Mansen |
Combined system-level redundancy and modular arithmetic for fault tolerant digital signal processing. |
IEEE Symposium on Computer Arithmetic |
1993 |
DBLP DOI BibTeX RDF |
|
68 | Javier Ramírez 0001, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García 0001, Antonio Lloris-Ruíz |
Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies. |
J. VLSI Signal Process. |
2003 |
DBLP DOI BibTeX RDF |
RNS arithmetic, custom integrated circuit, field-programmable logic devices, discrete wavelet transform |
68 | Uwe Meyer-Bäse, Antonio García 0001, Fred J. Taylor |
Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic. |
J. VLSI Signal Process. |
2001 |
DBLP DOI BibTeX RDF |
field-programmable logic (FPL), complex programmable logic devices (CPLD), zero-IF filter, field programmable gate array (FPGA), digital signal processing (DSP), residue number system (RNS), channelizer |
65 | Gerhard Weiß 0001, Michael Rovatsos, Matthias Nickles |
Capturing agent autonomy in roles and XML. |
AAMAS |
2003 |
DBLP DOI BibTeX RDF |
XRNS, computational autonomy, XML, specification, agent-oriented software engineering, RNS |
64 | M. N. Mahesh, Mahesh Mehendale |
Low Power Realization of Residue Number System Based FIR Filters. |
VLSI Design |
2000 |
DBLP DOI BibTeX RDF |
Low power implementation, DSP, Residue Number System(RNS), FIR filters |
64 | Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup |
An IWS Montgomery Modular Multiplication Algorithm. |
IEEE Symposium on Computer Arithmetic |
1997 |
DBLP DOI BibTeX RDF |
RNS Montgomery modular multiplication algorithm, very large operands, mixed radix, processor ring, redundant high-radix implementation, residue number systems, residue number system, computation time, table look-up |
59 | Pedro Miguens Matutino, Leonel Sousa |
An RNS based Specific Processor for Computing the Minimum Sum-of-Absolute-Differences. |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
59 | Uwe Meyer-Bäse, Thanos Stouraitis |
New power-of-2 RNS scaling scheme for cell-based IC design. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
59 | Haridimos T. Vergos, Dimitris Nikolos, Maciej Bellos, Costas Efstathiou |
Deterministic BIST for RNS Adders. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
deterministic and pseudorandom tests, formal test sets, Built-In Self-Test, Residue Number System |
59 | Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis |
A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
59 | Hanae Nozaki, Masahiko Motoyama, Atsushi Shimbo, Shin-ichi Kawamura |
Implementation of RSA Algorithm Based on RNS Montgomery Multiplication. |
CHES |
2001 |
DBLP DOI BibTeX RDF |
RSA cryptography, residue number systems, Montgomery multiplication, modular exponentiation |
55 | A. S. Madhukumar, Francois P. S. Chin |
Enhanced architecture for residue number system-based CDMA for high-rate data transmission. |
IEEE Trans. Wirel. Commun. |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Wu Woan Kim, Sang-Dong Jang |
Multiplier with Parallel CSA Using CRT's Specific Moduli (2k-1, 2k , 2k+1). |
ICCSA (2) |
2004 |
DBLP DOI BibTeX RDF |
|
55 | Ricardo Chaves, Leonel Sousa |
RDSP: A RISC DSP based on Residue Number System. |
DSD |
2003 |
DBLP DOI BibTeX RDF |
|
55 | Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup |
Modular Multiplication and Base Extensions in Residue Number Systems. |
IEEE Symposium on Computer Arithmetic |
2001 |
DBLP DOI BibTeX RDF |
|
50 | Jean-Claude Bajard, Laurent Imbert, Pierre-Yvan Liardet, Yannick Teglia |
Leak Resistant Arithmetic. |
CHES |
2004 |
DBLP DOI BibTeX RDF |
RNS Montgomery multiplication, Side channel attacks, residue number systems |
50 | Ansgar Drolshagen, Walter Anheier, C. Chandra Sekhar |
A Residue Number Arithmetic based Circuit for Pipelined Computation of Autocorrelation Coefficients of Speech Signal. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
modulo arithmetic circuits, RNS compiler, Autocorrelator circuit, Residue number systems |
45 | Ioannis Kouretas, Vassilis Paliouras |
Mixed Radix-2 and High-Radix RNS Bases for Low-Power Multiplication. |
PATMOS |
2008 |
DBLP DOI BibTeX RDF |
|
45 | Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi |
RNS Based Programmable Multi-Mode Decimation Filter for WCDMA and WiMAX. |
VTC Spring |
2008 |
DBLP DOI BibTeX RDF |
|
45 | Shahana Thottathikkulam Kassim, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi |
Dual-mode RNS based programmable decimation filter for WCDMA and WLANa. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
45 | G. L. Bernocchi, Gian Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re |
Low-power adaptive filter based on RNS components. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Dimitrios M. Schinianakis, Apostolos P. Fournaris, Athanasios Kakarountas, Thanos Stouraitis |
An RNS architecture of an Fp elliptic curve point multiplier. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Su-Hon Lin, Ming-Hwa Sheu, Jing-Shiun Lin, Wen-Tsai Sheu |
Efficient VLSI Design for RNS Reverse Converter Based on New Moduli Set (2n-1, 2n+1, 22n+1). |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Daniel González, Luis Parrilla 0001, Antonio García 0001, Encarnación Castillo, Antonio Lloris-Ruíz |
Efficient Clock Distribution Scheme for VLSI RNS-Enabled Controllers. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Ricardo Chaves, Leonel Sousa |
{2n+1, sn+k, sn-1}: A New RNS Moduli Set Extension. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Luis Parrilla 0001, Encarnación Castillo, Antonio García 0001, Antonio Lloris-Ruíz |
Intellectual Property Protection for RNS Circuits on FPGAs. |
FPL |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Javier Ramírez 0001, Uwe Meyer-Bäse, Antonio García 0001, Antonio Lloris-Ruíz |
Design and Implementation of RNS-Based Adaptive Filters. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
|
45 | Javier Ramírez 0001, Antonio García 0001 |
U. Meyer-Baese, A. Lloris: Fast RNS FPL-based Communications Receiver Design and Implementation. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
45 | Adimathara P. Preethy, Damu Radhakrishnan, Amos Omondi |
Fault-tolerance scheme for an RNS MAC: performance and cost analysis. |
ISCAS (2) |
2001 |
DBLP DOI BibTeX RDF |
|
45 | B. J. Kirsch, Peter R. Turner |
Adaptive beamforming using RNS arithmetic. |
IEEE Symposium on Computer Arithmetic |
1993 |
DBLP DOI BibTeX RDF |
|
41 | Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shrivastava, Stanislaw J. Piestrak |
Exploiting residue number system for power-efficient digital signal processing in embedded processors. |
CASES |
2009 |
DBLP DOI BibTeX RDF |
compiler, power, processor, residue number system, per- |
41 | Wenxuan Guo, Xinming Huang 0001, Wenjing Lou, Cao Liang |
On Relay Node Placement and Assignment for Two-tiered Wireless Networks. |
Mob. Networks Appl. |
2008 |
DBLP DOI BibTeX RDF |
two-tiered wireless network, optimal relayed path, packet reception rate, BIP, relay node placement |
41 | Andreas Lindahl, Lars Bengtsson |
A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Quanhong Wang, Glen Takahara, Hossam S. Hassanein, Kenan Xu |
On Relay Node Placement and Locally Optimal Traffic Allocation in Heterogeneous Wireless Sensor Networks. |
LCN |
2005 |
DBLP DOI BibTeX RDF |
Device Placement, Variable Transmission Range, Wireless Sensor Networks, Cost, Lifetime |
41 | Hyun-Sung Kim, Hee-Joo Park, Sung-Ho Hwang |
Parallel Modular Multiplication Algorithm in Residue Number System. |
PPAM |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Alberto Nannarelli, Marco Re, Gian Carlo Cardarilli |
Tradeoffs between residue number system and traditional FIR filters. |
ISCAS (2) |
2001 |
DBLP DOI BibTeX RDF |
|
41 | Xipeng Xiao, Lionel M. Ni |
Parallel Routing Table Computation for Scalable IP Routers. |
CANPC |
1998 |
DBLP DOI BibTeX RDF |
|
41 | Alexander Skavantzos |
An Efficient Residue to Weighted Converter for a New Residue Number System. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
|
41 | Jenn-Dong Sun, Hari Krishna, K.-Y. Lin |
A superfast algorithm for single-error correction in rrns and hardware implementation. |
J. VLSI Signal Process. |
1993 |
DBLP DOI BibTeX RDF |
|
40 | Antonio García 0001, Antonio Lloris-Ruíz |
A Look-Up Scheme for Scaling in the RNS. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
look-up table implementation, scaling, Residue number system (RNS) |
40 | Richard Conway 0001, John S. Nelson |
Fast Converter for 3 Moduli RNS Using New Property of CRT. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
Residue number system (RNS) converter, Chinese remainder theorem (CRT) |
36 | Javad Ahsan, Mohammad Esmaeildoust, Amer Kaabi, Vahid Zarei |
Efficient FPGA implementation of RNS Montgomery multiplication using balanced RNS bases. |
Integr. |
2022 |
DBLP DOI BibTeX RDF |
|
36 | Libey Djath |
RNS-Flexible hardware accelerators for high-security asymmetric cryptography. (Accélérateurs matériels RNS flexibles pour la cryptographie asymétrique à haute sécurité). |
|
2021 |
RDF |
|
36 | Jérôme Courtois |
Leak study of cryptosystem implementations in randomized RNS arithmetic. (Étude des fuites d'implémentations de cryptosystème en arithmétique RNS randomisée). |
|
2020 |
RDF |
|
36 | Eric B. Olsen |
RNS Hardware Matrix Multiplier for High Precision Neural Network Acceleration: "RNS TPU". |
ISCAS |
2018 |
DBLP DOI BibTeX RDF |
|
36 | Shiva Taghipour Eivazi, Mehdi Hosseinzadeh 0001, Ahmad Habibizad Navin |
Efficient RNS Converter via Two-Part RNS. |
J. Circuits Syst. Comput. |
2015 |
DBLP DOI BibTeX RDF |
|
36 | Julien Eynard |
Approche arithmétique RNS de la cryptographie asymétrique. (RNS arithmetic approach of asymmetric cryptography). |
|
2015 |
RDF |
|
36 | Stefan Bienert |
RNA Energetics And Sequence Design (Betrachtungen der Energie von RNS und RNS Sequenzgestaltung) |
|
2015 |
RDF |
|
32 | Riyaz A. Patel, Mohammed Benaissa, Said Boussakta |
Fast Modulo 2n - (2n-2+1) Addition: A New Class of Adder for RNS. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
modular adder, VLSI, Computer arithmetic, residue number system, parallel-prefix adder |
32 | Dimitris G. Nikolos, Dimitris Nikolos, Haridimos T. Vergos, Costas Efstathiou |
Efficient BIST schemes for RNS datapaths. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
32 | Wei Wang 0003, M. N. S. Swamy, M. Omair Ahmad |
Moduli selection in RNS for efficient VLSI implementation. |
ISCAS (4) |
2003 |
DBLP DOI BibTeX RDF |
|
32 | Ioannis Kouretas, Vassilis Paliouras |
High-radix redundant circuits for RNS modulo rn-1, rn, or rn+1. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
32 | Daniel González, Antonio García 0001, Graham A. Jullien, Javier Ramírez 0001, Luis Parrilla 0001, Antonio Lloris-Ruíz |
A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems. |
PATMOS |
2002 |
DBLP DOI BibTeX RDF |
|
32 | Marco Re, Alberto Nannarelli, Gian Carlo Cardarilli, Roberto Lojacono |
FPGA realization of RNS to binary signed conversion architecture. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
32 | D. J. Soudris, Minas Dasygenis, Spyridoula K. Vasilopoulou, Adonios Thanailakis |
A CAD tool for architecture level exploration and automatic generation of RNS converters. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
32 | Antonio García 0001, Uwe Meyer-Bäse, Antonio Lloris-Ruíz, Fred J. Taylor |
RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic. |
ISCAS (1) |
1999 |
DBLP DOI BibTeX RDF |
|
32 | Yuke Wang, Xiaoyu Song, El Mostapha Aboulhamid |
A New Algorithm for RNS Magnitude Comparison Based on New Chinese Remainder Theorem II. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
32 | Ahmad A. Hiasat, Hoda S. Abdel-Aty-Zohdy |
Design and Implementation of An RNS Division Algorithmm. |
IEEE Symposium on Computer Arithmetic |
1997 |
DBLP DOI BibTeX RDF |
|
28 | Anand Srinivas, Eytan H. Modiano |
Joint Node Placement and Assignment for Throughput Optimization in Mobile Backbone Networks. |
INFOCOM |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Zhang Zhang |
On the Application of Directional Antenna to Two Hop Relay System. |
VTC Spring |
2007 |
DBLP DOI BibTeX RDF |
|
28 | W. Kenneth Jenkins, Chandrasekhar Radhakrishnan, Siddharth Pal |
Fault Tolerant Signal Processing for Masking Transient Errors in VLSI Signal Processors. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Tuukka Toivonen, Janne Heikkilä |
Video filtering with Fermat number theoretic transforms using residue number system. |
IEEE Trans. Circuits Syst. Video Technol. |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Andreas Persson, Lars Bengtsson |
Reverse conversion architectures for signed-digit residue number systems. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Grace Y. Cho, Louis G. Johnson, Michael A. Soderstrand |
Residue number system implementations of complex heterodyne tunable filters. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan |
New efficient residue-to-binary converters for 4-moduli set {2n - 1, 2n, 2n + 1, 2n+1 - 1}. |
ISCAS (4) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Jimson Mathew, Elena Dubrova |
Self-Checking 1-out-of-n CMOS Current-Mode Checker. |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
28 | M. N. Mahesh, Mahesh Mehendale |
Improving performance of high precision signal processing algorithms on programmable DSPs. |
ISCAS (3) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller |
A New Euclidean Division Algorithm for Residue Number Systems. |
J. VLSI Signal Process. |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Neil Burgess |
Scaled and Unscaled Residue Number System to Binary Conversion Techniques using the Core Function. |
IEEE Symposium on Computer Arithmetic |
1997 |
DBLP DOI BibTeX RDF |
Scaled Conversion, Core Function, Conversion, Residue Number System |
28 | Vassilis Paliouras, Thanos Stouraitis |
Area-time performance of VLSI FIR filter architectures based on residue arithmetic. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
area-time performance optimization, VLSI FIR filter architectures, FIR processors, moduli bases, binary-to-residue conversion complexity, residue-to-binary conversion complexity, multiply-by-constant units, binary structures, performance models, Chinese remainder theorem, residue number system, FIR filters, residue arithmetic |
28 | Giuseppe Alia, Enrico Martinelli |
A VLSI structure forX(modm) operation. |
J. VLSI Signal Process. |
1990 |
DBLP DOI BibTeX RDF |
|
23 | Kooroush Manochehri, Saadat Pourmozafari, Babak Sadeghiyan |
Efficient Methods in Converting to Modulo 2^n+1 and 2^n-1. |
ITNG |
2006 |
DBLP DOI BibTeX RDF |
Diminished-1, RNS, Modular multiplication, CSA, Wallace tree |
23 | Reto Zimmermann |
Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication. |
IEEE Symposium on Computer Arithmetic |
1999 |
DBLP DOI BibTeX RDF |
Modulo (2^n=B11) adders and multipliers, end-around-carry parallel-prefix adders, IDEA cipher, cryptography, computer arithmetic, RNS, VLSI circuits |
23 | Chien-Chun Su, Hao-Yung Lo |
An Algorithm for Scaling and Single Residue Error Correction in Residue Number Systems. |
IEEE Trans. Computers |
1990 |
DBLP DOI BibTeX RDF |
single residue digit error correction, mixed radix conversion, redundant digits, scaling error, error-correction circuit with scaling, fault tolerant computing, digital signal processing, digital arithmetic, error correction, residue number systems, RNS, fault-tolerant systems, digital signal processing chips, number theory, lookup table |
22 | Shugang Wei, Kensuke Shimizu |
Error Detection of Arithmetic Circuits Using a Residue Checker with Signed-Digit Number System. |
DFT |
2001 |
DBLP DOI BibTeX RDF |
residue addition, residue multiplication, signed-digit(SD) number representation, SD adder, error detection, residue number system(RNS) |
22 | Ching Yu Hung, Behrooz Parhami |
Error Analysis of Approximate Chinese-Reminder-Theorem Decoding. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
residue numbers, RNS representation, scaled decoding, computer arithmetic, Computation errors |
22 | Jermy C. Smith, Fred J. Taylor |
A Fault-Tolerant GEQRNS Processing Element for Linear Systolic Array DSP Applications. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
Fault-tolerant, redundancy, DSP, systolic array, VLSI design, residue number system (RNS), yield enhancement |
22 | Ben-Dau Tseng, Graham A. Jullien, William C. Miller |
Implementation of FFT Structures Using the Residue Number System. |
IEEE Trans. Computers |
1979 |
DBLP DOI BibTeX RDF |
ROM arrays, FFT structures, high-speed filters, optimum hardware realization, Error analysis, residue number system (RNS) |
18 | Ravikumar Selvam, Akhilesh Tyagi |
Residue Number System (RNS) and Power Distribution Network Topology-Based Mitigation of Power Side-Channel Attacks. |
Cryptogr. |
2024 |
DBLP DOI BibTeX RDF |
|