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Searching for SEU with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1994-2001 (18) 2002 (16) 2003-2004 (27) 2005 (27) 2006 (28) 2007 (46) 2008 (26) 2009 (18) 2010-2011 (24) 2012 (24) 2013 (18) 2014 (21) 2015-2016 (32) 2017 (23) 2018 (16) 2019-2020 (26) 2021-2022 (23) 2023-2024 (11)
Publication types (Num. hits)
article(112) inproceedings(300) phdthesis(12)
Venues (Conferences, Journals, ...)
IOLTS(44) DFT(23) J. Electron. Test.(18) Microelectron. Reliab.(15) LATW(13) ISQED(11) IEICE Electron. Express(10) ISCAS(10) IGARSS(9) DAC(8) DATE(8) LATS(8) DSD(7) FPL(7) IEEE Trans. Very Large Scale I...(7) IOLTW(7) More (+10 of total 136)
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The graphs summarize 174 occurrences of 109 keywords

Results
Found 433 publication records. Showing 424 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
113Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew SEU-Mitigation Placement and Routing Algorithms and Their Impact in SRAM-Based FPGAs. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
108Rajesh Garg, Charu Nagpal, Sunil P. Khatri A fast, analytical estimator for the SEU-induced pulse width in combinational designs. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF single event upset (SEU), model, analysis
94Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Majid Sarrafzadeh Soft Error-Aware Power Optimization Using Gate Sizing. Search on Bibsonomy PATMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
81Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodrag Potkonjak, Majid Sarrafzadeh General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
73Rajesh Garg, Sunil P. Khatri Efficient analytical determination of the SEU-induced pulse shape. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
73Mahdi Fazeli, Ahmad Patooghy, Seyed Ghassem Miremadi, Alireza Ejlali Feedback Redundancy: A Power Efficient SEU-Tolerant Latch Design for Deep Sub-Micron Technologies. Search on Bibsonomy DSN The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
73Ying Huang, Chunyuan Zhang, Dong Liu 0022, Yi Li, Sheng-xin Weng The Design on SEU-Tolerant Information Processing System of the On-Board-Computer. Search on Bibsonomy APPT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Dual Fault-Tolerant, Triple Module Redundancy, Cost-Off-The-Shelf, Field Programmable Gate Array, Single-Event-Upsets
73Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew CAD-Directed SEU Susceptibility Reduction in FPGA Circuits Designs. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
73Liang Wang 0024, Suge Yue, Yuanfu Zhao, Long Fan An SEU-Tolerant Programmable Frequency Divider. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
73Wonjin Jang, Alain J. Martin SEU-Tolerant QDI Circuits. Search on Bibsonomy ASYNC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
73E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001, Narayanan Vijaykrishnan Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
68Ahmad Patooghy, Mahdi Fazeli, Seyed Ghassem Miremadi A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips. Search on Bibsonomy PRDC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF SEU-Tolerance, Power Consumption, NoC
67Thara Rejimon, Sanjukta Bhanja A Timing-Aware Probabilistic Model for Single-Event-Upset Analysis. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
59Rajesh Garg, Sunil P. Khatri A novel, highly SEU tolerant digital circuit design approach. Search on Bibsonomy ICCD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
59Makoto Sugihara SEU Vulnerability of Multiprocessor Systems and Task Scheduling for Heterogeneous Multiprocessor Systems. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Heterogeneous Multiprocessor Systems, Reliability, Task Scheduling, Soft Error, Single Event Upset
55Cristiana Bolchini, Davide Quarta, Marco D. Santambrogio SEU mitigation for sram-based fpgas through dynamic partial reconfiguration. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF fault detection, SEU, partial dynamic reconfiguration
54Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sarrafzadeh Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
49Rui Gong, Wei Chen 0009, Fang Liu 0002, Kui Dai, Zhiying Wang 0003 A New Approach to Single Event Effect Tolerance Based on Asynchronous Circuit Technique. Search on Bibsonomy J. Electron. Test. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF SEE tolerance, SEU tolerance, SET tolerance, Asynchronous circuit
46Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi SEU hardened clock regeneration circuits. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
46Roystein Oliveira, Aditya Jagirdar, Tapan J. Chakraborty A TMR Scheme for SEU Mitigation in Scan Flip-Flops. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
46Luca Schiano, Marco Ottavi, Fabrizio Lombardi Markov Models of Fault-Tolerant Memory Systems under SEU. Search on Bibsonomy MTDT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
46Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto Automated Synthesis of SEU Tolerant Architectures from OO Descriptions. Search on Bibsonomy IOLTW The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
42Emmanuel Touloupis, James A. Flint, Vassilios A. Chouliaras, David D. Ward Study of the Effects of SEU-Induced Faults on a Pipeline Protected Microprocessor. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2007 DBLP  DOI  BibTeX  RDF fault modeling and simulation, fault tolerance, fault injection, soft error, SEU, microprocessor test
41Laura Frigerio, Matteo Alan Radaelli, Fabio Salice Convolutional Coding for SEU mitigation. Search on Bibsonomy ETS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF SEU mitigation, convolutional coding
41Alireza Ejlali, Marcus T. Schmitz, Bashir M. Al-Hashimi, Seyed Ghassem Miremadi, Paul M. Rosinger Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF single event upset (SEU), dynamic voltage scaling (DVS), information redundancy
41Harry Hollander, Bradley S. Carlson, Toby D. Bennett Synthesis of SEU-tolerant ASICs using concurrent error correction. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF radiation hardening (electronics), SEU-tolerant ASIC synthesis, single error correction/double error detection Hamming code, delay overhead, memory element set partitioning, error correction codes, sequential circuits, sequential circuit, application specific integrated circuits, logic CAD, circuit layout CAD, single event upsets, logic partitioning, Hamming codes, fault tolerant design, area overhead, memory elements, design experiments, concurrent error correction
40Denis Bouyssou, Marc Pirlot On some ordinal models for decision making under uncertainty. Search on Bibsonomy Ann. Oper. Res. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Subjective expected utility, Conjoint measurement, Nontransitive preferences, Likely dominance model, Decision under uncertainty
40Eze Kamanu, Pratapa Reddy, Kenneth Hsu, Marcin Lukowiak A New Architecture for Single-Event Detection & Reconfiguration of SRAM-based FPGAs. Search on Bibsonomy HASE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation. Search on Bibsonomy ISVLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Haruhiko Kaneko, Eiji Fujiwara Reconstruction of Erasure Correcting Codes for Dependable Distributed Storage System without Spare Disks. Search on Bibsonomy DFT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Thara Rejimon, Sanjukta Bhanja Wide Limited Switch Dynamic Logic Circuit Implementations. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
40Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt Single event transients in combinatorial circuits. Search on Bibsonomy SBCCI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF soft errors, integrated circuits, single event transients
40Maya B. Gokhale, Paul S. Graham, Darrel Eric Johnson, Nathan Rollins, Michael J. Wirthlin Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
40Lörinc Antoni, Régis Leveugle, Béla Fehér Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. Search on Bibsonomy DFT The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
38Peng Li, Wei Guo, Zhenyu Zhao, Minxuan Zhang, Quan Deng SEU hardened layout design for SRAM cells based on SEU reversal. Search on Bibsonomy IEICE Electron. Express The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
38Cinzia Bernardeschi, Luca Cassano, Andrea Domenici SEU-X: A SEu un-excitability prover for SRAM-FPGAs. Search on Bibsonomy IOLTS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
38Riadul Islam A highly reliable SEU hardened latch and high performance SEU hardened flip-flop. Search on Bibsonomy ISQED The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
36Franz X. Ruckerbauer, Georg Georgakos Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena. Search on Bibsonomy IOLTS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF NSER, ASER, multi-bit upset, soft errors and radiation, CMOS, SRAM, SEU
35Erik Schüler, Marcelo Ienczczak Erigson, Luigi Carro Functionally Fault-tolerant DSP Microprocessor using Sigma-delta Modulated Signals. Search on Bibsonomy J. Electron. Test. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF error tolerant system, single event upset (SEU), Digital SignalProcessing (DSP), fault-tolerance, sigma-delta
34Maria Carmela Raguso, Marco Mastrogiuseppe, Roberto Seu Clutter Detection and Surface/Subsurface Slope Determination by Combination of Repeat-Pass Sounder Orbits Applied to SHARAD Data. Search on Bibsonomy IEEE Geosci. Remote. Sens. Lett. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
34Letizia Gambacorta, Maria Carmela Raguso, Marco Mastrogiuseppe, Roberto Seu UWB Processing Applied to Multifrequency Radar Sounders: The Case of MARSIS and Comparison With SHARAD. Search on Bibsonomy IEEE Trans. Geosci. Remote. Sens. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
34Cai Wang, Soo Yeon Kim, Yein Song, Sungho Kim, Minsik Choi, Donghoon Seu, Myung Hwan Yun Text Mining for Exploring UX Issues of Qualitative Think Aloud Data on EV Sound. Search on Bibsonomy IEEM The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
34Valerio Poggiali, Marco Mastrogiuseppe, Alexander Gerard Hayes, Roberto Seu, Joseph Peter Mullen, Samuel Patrick Dennis Birch, Maria Carmela Raguso High-Resolution Topography of Titan Adapting the Delay/Doppler Algorithm to the Cassini RADAR Altimeter Data. Search on Bibsonomy IEEE Trans. Geosci. Remote. Sens. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
34Sara Zaher, Davide Lonardoni, Fabio Boi, Giovanni Pietro Seu, Gian Nicola Angotzi, Paolo Meloni, Luca Berdondini A Closed-Loop System Processing High-Density Electrical Recordings and Visual Stimuli to Study Retinal Circuits Properties. Search on Bibsonomy NER The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
34Giovanni Pietro Seu Exploiting All-Programmable System on Chips for Closed-Loop Real-Time Neural Interfaces. Search on Bibsonomy 2019   RDF
34Giovanni Pietro Seu, Gian Nicola Angotzi, Fabio Boi, Luigi Raffo, Luca Berdondini, Paolo Meloni Exploiting All Programmable SoCs in Neural Signal Analysis: A Closed-Loop Control for Large-Scale CMOS Multielectrode Arrays. Search on Bibsonomy IEEE Trans. Biomed. Circuits Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
34Elvira Musico, Claudio Cesaroni, Luca Spogli, John Peter Merryman Boncori, Giorgiana De Franceschi, Roberto Seu The Total Electron Content From InSAR and GNSS: A Midlatitude Study. Search on Bibsonomy IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
34Maria Carmela Raguso, Lorenzo Piazzo, Marco Mastrogiuseppe, Roberto Seu, Roberto Orosei Resolution Enhancement and Interference Suppression for Planetary Radar Sounders. Search on Bibsonomy EUSIPCO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
34Kyung-Seu Cho, Jae-Moo Lee Influence of smartphone addiction proneness of young children on problematic behaviors and emotional intelligence: Mediating self-assessment effects of parents using smartphones. Search on Bibsonomy Comput. Hum. Behav. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
34Simona Ibba, Andrea Pinna 0002, Matteo Seu, Filippo Eros Pani CitySense: blockchain-oriented smart cities. Search on Bibsonomy XP Workshops The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
34Giovanni Pietro Seu, Gian Nicola Angotzi, Giuseppe Tuveri, Luigi Raffo, Luca Berdondini, Alessandro Maccione, Paolo Meloni On-FPGA Real-Time Processing of Biological Signals From High-Density MEAs: a Design Space Exploration. Search on Bibsonomy IPDPS Workshops The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
34Marco Restano, Roberto Seu, Giovanni Picardi A Phase-Gradient-Autofocus Algorithm for the Recovery of MARSIS Subsurface Data. Search on Bibsonomy IEEE Geosci. Remote. Sens. Lett. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Marco Mastrogiuseppe, Alexander Hayes 0002, Valerio Poggiali, Roberto Seu, Jonathan I. Lunine, J. D. Hofgartner Radar Sounding Using the Cassini Altimeter: Waveform Modeling and Monte Carlo Approach for Data Inversion of Observations of Titan's Seas. Search on Bibsonomy IEEE Trans. Geosci. Remote. Sens. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Giuseppe Tuveri, Paolo Meloni, Francesca Palumbo, Giovanni Pietro Seu, Igor Loi, Francesco Conti 0001, Luigi Raffo On-the-fly adaptivity for process networks over shared-memory platforms. Search on Bibsonomy Microprocess. Microsystems The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Lorenzo Piazzo, Maria Carmela Raguso, Luca Calzoletti, Roberto Seu, Bruno Altieri Least Squares Time-Series Synchronization in Image Acquisition Systems. Search on Bibsonomy IEEE Trans. Image Process. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
34Lorenzo Bruzzone, Jeffrey J. Plaut, Giovanni Alberti, Donald D. Blankenship, Francesca Bovolo, Bruce A. Campbell, Adamo Ferro, Yonggyu Gim, Wlodek Kofman, Goro Komatsu, William McKinnon, Giuseppe Mitri, Roberto Orosei, G. Wesley Patterson, Dirk Plettemeier, Roberto Seu RIME: Radar for Icy Moon Exploration. Search on Bibsonomy IGARSS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
34Valerio Poggiali, Marco Mastrogiuseppe, Mattia Callegari, Riccardo Martufi, Roberto Seu, Domenico Casarano, Luca Pasolli, Claudia Notarnicola Synergy of Cassini SAR and altimeter acquisitions for the retrieval of dune field characteristics on Titan. Search on Bibsonomy SAR The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
34Marco Restano, Marco Mastrogiuseppe, Arturo Masdea, Giovanni Picardi, Roberto Seu Shallow Radar (SHARAD) investigations over Sinus Meridiani. Search on Bibsonomy IGARSS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
34Renato Croci, Roberto Seu, Enrico Flamini, Enrico Russo The SHAllow RADar (SHARAD) Onboard the NASA MRO Mission. Search on Bibsonomy Proc. IEEE The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
34Seu Keow Cheng, Booi Hon Kam A conceptual framework for analysing risk in supply networks. Search on Bibsonomy J. Enterp. Inf. Manag. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
34Marco Iorio, Franco Fois, Riccardo Mecozzi, Roberto Seu, Giovanni Picardi GPR missions on mars. Search on Bibsonomy IGARSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Renato Croci, Franco Fois, Mauro Guelfi, Paolo Noschese, Riccardo Mecozzi, Roberto Seu Calibration of the SHARAD Instrument. Search on Bibsonomy IGARSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Franco Fois, Riccardo Mecozzi, Marco Iorio, Diego Calabrese, Ornella Bombaci, Clau Catallo, Anna Croce, Renato Croci, Mauro Guelfi, Enrico M. Zampolini, Domenico Ravasi, Massimo Molteni, Paolo Ruggeri, Antonella Ranieri, M. Ottavianelli, Enrico Flamini, Giovanni Picardi, Roberto Seu, Daniela Biccari, Roberto Orosei, Marci Cartacci, Andrea Cicchetti, Arturo Masdea, Emmanuele Giacomoni, Marco Cutigni, Marco Provenziani, Oreste Fuga, Giovanni Alberti, Stefania Mattei, Claudio Papa, Paolo Marras, Barbara Tattarletti, Danilo Vicari, Francesco Bonaventura, Tobia Paterno, Antonio Di Placido, Antonio Morlupi Comparison between MARSIS & SHARAD results. Search on Bibsonomy IGARSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Franco Fois, Renato Croci, Roberto Seu, Giovanni Picardi, Enrico Flamini Performance results of the SHARAD instrument. Search on Bibsonomy IGARSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Renato Croci, Franco Fois, Diego Calabrese, Enrico M. Zampolini, Roberto Seu, Giovanni Picardi, Enrico Flamini SHARAD design and operation. Search on Bibsonomy IGARSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Jai Hyun Seu, Byung-Keun Song, Heung Shik Kim Simulation of Artificial Life Model in Game Space. Search on Bibsonomy AIS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Daniela Biccari, Diego Calabrese, Donald A. Gurnett, Richard L. Huff, L. Marinangeli, Rolando L. Jordan, Erling Nielsen, G. G. Ori, Giovanni Picardi, Jeffrey J. Plaut, F. Provvedi, Roberto Seu, Enrico M. Zampolini VENUS Subsurface Ionosphere Radar Sounder: VENSIS. Search on Bibsonomy 3DPVT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
34Daniela Biccari, Giovanni Picardi, Roberto Seu Mars high resolution Shallow Radar (SHARAD) for the MRO 2005 mission. Search on Bibsonomy IGARSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Daniela Biccari, Donald A. Gurnett, William T. K. Johnson, Richard L. Huff, L. Marinangeli, Rolando L. Jordan, Erling Nielsen, G. G. Ori, Giovanni Picardi, Jeffrey J. Plaut, F. Provvedi, Roberto Seu, Enrico M. Zampolini Venus radar for subsurface and ionosphere sounding (VENSIS). Search on Bibsonomy IGARSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Roger Lundqvist, Leighton R. Barnden, Seu Som, Ewert Bengtsson, Lennart Thurfjell An Evaluative Study of Simulated Annealing Based MRI-SPECT Brain Scan Registration. Search on Bibsonomy VIIP The full citation details ... 2001 DBLP  BibTeX  RDF
34Tan Hock-Guan, Lua Seu-Kea Web-based Object Oriented Multimedia Assessment System. Search on Bibsonomy WebNet The full citation details ... 1999 DBLP  BibTeX  RDF
34Tan Hock-Guan, Lua Seu-Kea Innovative use of IT to support Competency Based Learning Paradigm - The Ngee Ann's Perspectives. Search on Bibsonomy WebNet The full citation details ... 1999 DBLP  BibTeX  RDF
32Cristiana Bolchini, Antonio Miele, Fabio Rebaudengo, Fabio Salice, Donatella Sciuto, Luca Sterpone, Massimo Violante Software and Hardware Techniques for SEU Detection in IP Processors. Search on Bibsonomy J. Electron. Test. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Hardware/software techniques, Single-event upset faults, Reliability, Fault injection
32Alireza Ejlali, Bashir M. Al-Hashimi SEU-Hardened Energy Recovery Pipelined Interconnects for On-Chip Networks. Search on Bibsonomy NOCS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
32Laura Frigerio, Matteo Alan Radaelli, Fabio Salice A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation. Search on Bibsonomy DFT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
32Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika F. Cota, Luigi Carro Crosstalk- and SEU-Aware Networks on Chips. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF fault tolerance. energy-aware systems, network on chip, crosstalk, single-event upset, hardware-software codesign
32Luca Sterpone, Massimo Violante Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs. Search on Bibsonomy ETS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
32Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors. Search on Bibsonomy IOLTS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
32Shahin Golshan, Elaheh Bozorgzadeh Single-Event-Upset (SEU) Awareness in FPGA Routing. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
32Alireza Ejlali, Bashir M. Al-Hashimi, Marcus T. Schmitz, Paul M. Rosinger, Seyed Ghassem Miremadi Combined time and information redundancy for SEU-tolerance in energy-efficient real-time systems. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Arthur Pereira Frantz, Luigi Carro, Érika F. Cota, Fernanda Lima Kastensmidt Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers. Search on Bibsonomy IOLTS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Sajid Baloch, Tughrul Arslan, Adrian Stoica Design of a Single Event Upset (SEU) Mitigation Technique for Programmable Devices. Search on Bibsonomy ISQED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil Fast Run-Time Reconfiguration for SEU Injection. Search on Bibsonomy EDCC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Nicolas Renaud How to Cope with SEU/SET at Chip Level? The Example of a Microprocessor Family. Search on Bibsonomy IOLTS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Raoul Velazco, R. Ecoffet, F. Faure How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight. Search on Bibsonomy IOLTS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Guillaume Hubert, Nadine Buard, Cécile Weulersse, Thierry Carrière, Marie-Catherine Palau, Jean-Marie Palau, Damien Lambert, Jacques Baggio, Frederic Wrobel, Frédéric Saigné, Rémi Gaillard A Review of DASIE Code Family: Contribution to SEU/MBU Understanding. Search on Bibsonomy IOLTS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Kartik Mohanram Closed-Form Simulation and Robustness Models for SEU-Tolerant Design. Search on Bibsonomy VTS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
32Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori Analyzing SEU Effects in SRAM-based FPGAs. Search on Bibsonomy IOLTS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
32Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. Search on Bibsonomy IOLTW The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
32Alfredo Benso, Stefano Martinetto, Paolo Prinetto, Riccardo Mariani An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications. Search on Bibsonomy ICCD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
27Luca Sterpone Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF fault tolerance, FPGA, Single Event Upset, Triple Modular Redundancy, Timing-driven Placement
27Marco Lanuzza, Paolo Zicari, Fabio Frustaci, Stefania Perri, Pasquale Corsonello An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF FPGA, Space, Reconfigurable System, Single Event Upsets, Avionics
27Rui Gong, Kui Dai, Zhiying Wang 0003 A Framework to Evaluate the Trade-off among AVF Performance and Area of Soft Error Tolerant Microprocessors. Search on Bibsonomy DFT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Jawar Singh, Jimson Mathew, Mohammad Hosseinabady, Dhiraj K. Pradhan Single Event Upset Detection and Correction. Search on Bibsonomy ICIT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew Soft Error Mitigation in Switch Modules of SRAM-based FPGAs. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi Error Tolerance of DNA Self-Healing Assemblies by Puncturing. Search on Bibsonomy DFT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Yanxia Wu, Guochang Gu, Shaobin Huang, Jun Ni Control Flow Checking Algorithm using Soft-based Intra-/Inter-block Assigned-Signature. Search on Bibsonomy IMSCCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Gilson I. Wirth, Ivandro Ribeiro, Michele G. Vieira, Fernanda Gusmão de Lima Kastensmidt Single event transients in dynamic logic. Search on Bibsonomy SBCCI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF integrated circuits, dynamic logic, single event transients
27Chong Zhao, Sujit Dey Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO). Search on Bibsonomy ISQED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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