Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
52 | Sridhar Tirumala, Yuri Mahotin, Xiao Lin, Victor Moroz, Lee Smith, S. Krishnamurthy, L. Bomholt, Dipu Pramanik |
Bringing Manufacturing into Design via Process-Dependent SPICE Models. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang |
A realistic fault model for flash memories. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
NAND circuits, faulty behavior classification, NAND-type flash memory, SPICE models, flash cell models, circuit-level faulty behavior simulation, testing, fault model, fault modeling, fault simulation, flash memories, flash memories, circuit analysis computing, SPICE, integrated memory circuits |
35 | Ning Lu |
Statistical Models and Frequency-Dependent Corner Models for Passive Devices. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
SPICE models, corner models, RF models, passive devices, statistical models |
31 | Ning Lu, Judy H. McCullen |
Enablement of Variation-Aware Timing: Treatment of Parasitic Resistance and Capacitance. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh |
Transistor Flaring in Deep Submicron-Design Considerations. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
Deep Submicron (DSM), pullback, photolithography, Subwavelength-lithography, Optical Proximity Correction (OPC), SPICE-models, standard-ce1l library, Design for Manufacturability (DFM) |
19 | Olga I. Gorbaneva |
Spice-Models with Independent Agents. |
Autom. Remote. Control. |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Ansgar Scheck, Gerhard Siemens, Tomas Schweigert, Vinay Nair |
The SAP Activate Method and Corresponding SPICE Models. |
EuroSPI |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Vazgen Sh. Melikyan, Meruzhan K. Martirosyan, Diana A. Virabyan, Hakob T. Kostanyan |
Development of Method for Automation of SPICE Models Generation. |
EWDTS |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Konstantin O. Petrosyants, N. I. Ryabov, E. I. Batarueva |
Compact SPICE Models of the Standard Layout Fragments in LSI Interconnections. |
EWDTS |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Igor A. Kharitonov |
Electro-thermo-rad SPICE models for SOI/SOS MOSFETs. |
EWDTS |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, A. E. Rassadin |
SPICE models of nonlinear capacitors for simulation of ferroelectric circuits. |
EWDTS |
2017 |
DBLP DOI BibTeX RDF |
|
19 | Xiang Gao, Zhengwei Du |
SPICE models of a multi-antenna system for transmitting and receiving. |
IET Circuits Devices Syst. |
2016 |
DBLP DOI BibTeX RDF |
|
19 | Navid Paydavosi, Sriramkumar Venugopalan, Yogesh Singh Chauhan, Juan Pablo Duarte, Srivatsava Jandhyala, Ali M. Niknejad, Chenming Hu |
BSIM - SPICE Models Enable FinFET and UTB IC Designs. |
IEEE Access |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Dalibor Biolek, Viera Biolková, Zdenek Kolka |
Spice models of memristive devices forming a model of Hodgkin-Huxley axon. |
DSP |
2013 |
DBLP DOI BibTeX RDF |
|
19 | Elissaveta Gadjeva, Marin Hristov |
Behavioral parameterized SPICE models of photovoltaic modules. |
MIXDES |
2013 |
DBLP BibTeX RDF |
|
19 | Jordi Albo-Canals, Giovanni Egidio Pazienza |
A brief analysis of the main SPICE models of the memristor. |
ICECS |
2012 |
DBLP DOI BibTeX RDF |
|
19 | Mohammad Javad Sharifi, Yasser Mohammadi Banadaki |
General SPICE Models for Memristor and Application to Circuit Simulation of Memristor-Based Synapses and Memory Cells. |
J. Circuits Syst. Comput. |
2010 |
DBLP DOI BibTeX RDF |
|
19 | Florin Constantinescu, Miruna Nitescu, Constantin Viorel Marin, Mihai Iordache, Lucia Dumitriu |
Implementation of 2D SPICE models for finding periodic steady state of strongly nonlinear RF-IC. |
ICECS |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Junlin Zhou, Mengzhang Cheng, Leonard Forbes |
SPICE models for flicker noise in p-MOSFETs in the saturationregion. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
19 | Dingming Xie, Mengzhang Cheng, Leonard Forbes |
SPICE models for flicker noise in n-MOSFETs from subthreshold tostrong inversion. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
19 | Scott Diamond, Bo Janko |
Extraction of Coupled SPICE Models for Packages and Interconnects. |
ITC |
1993 |
DBLP DOI BibTeX RDF |
|
17 | Manuel Sellier, Jean-Michel Portal, Bertrand Borot, Steve Colquhoun, Richard Ferrant, Frédéric Boeuf, Alexis Farcy |
Predictive Delay Evaluation on Emerging CMOS Technologies: A Simulation Framework. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Predictive SPICE Modeling, Interconnect Resistance, Buffer Insertion, Interconnect Delay |
17 | Adrian Maxim, Danielle Andreu, Marc Cousineau, Jacques Boucher |
A novel SPICE behavioral macromodel of operational amplifiers including a high accuracy description of frequency characteristics. |
ISCAS (6) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | E. Seebacher, Gerhard Rappitsch, H. Höller |
Process Characterization for Low VTH and Low Power Design. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
14 | David San Segundo Bello, Ronald J. W. T. Tangelder, Hans G. Kerkhoff |
Modeling a Verification Test System for Mixed-Signal Circuits. |
IEEE Des. Test Comput. |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Klaus Hofmann, Manfred Glesner, Nicu Sebe, Anca Manuela Manolescu, Santiago Marco, Josep Samitier, Jean-Michel Karam, Bernard Courtois |
Generation of the HDL-A-model of a micromembrane from its finite-element-description. |
ED&TC |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Masaki Kondo, Hidetoshi Onodera, Keikichi Tamaru |
Model-adaptable MOSFET parameter-extraction method using an intermediate model. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Bruno Apolloni, Simone Bassis, Cristian Mesiano, Salvatore Rinaudo, Angelo Ciccazzo, Angelo Marotta |
Statistical Parameter Identification of Analog Integrated Circuit Reverse Models. |
ICANN (1) |
2009 |
DBLP DOI BibTeX RDF |
|
9 | Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan |
A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory. |
J. Comput. Sci. Technol. |
2005 |
DBLP DOI BibTeX RDF |
sequential access buffer, media benchmark, flexible sequential and random access memory, on-chip memory |
9 | Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri |
A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
genetic algorithms, branch-and-bound, performance estimation, VHDL-AMS, Analog synthesis |
9 | Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan |
Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. |
Asia-Pacific Computer Systems Architecture Conference |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Dingming Xie, Leonard Forbes |
Phase noise on a 2-GHz CMOS LC oscillator. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
9 | S. Deuty, C. S. Mitter |
Transistor paradigm shift required to meet the power demands for microprocessors. |
IPCCC |
1999 |
DBLP DOI BibTeX RDF |
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