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Searching for phrase SUS-LOC (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1999 (1) 2000 (1) 2003 (1) 2008 (1)
Publication types (Num. hits)
inproceedings(4)
Venues (Conferences, Journals, ...)
ISMVL(3) KES (3)(1)
Authors
Edgar "Dan" Olson(2) Dan Olson(1) E. Kinvi-Boh(1) Emilia Sipos(1) Gabriel Oltean(1) K. Wayne Current(1) Lelia Festila(1) M. Aline(1) Olivier Sentieys(1)
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Found 4 publication records. Showing 4 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
114Dan Olson, K. Wayne Current Hardware Implementation of "Supplementary Symmetrical Logic Circuit Structure" Concepts. Search on Bibsonomy ISMVL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF MVL Hardware, Ternary Addition, MVL Structure, SUS-LOC
106E. Kinvi-Boh, M. Aline, Olivier Sentieys, Edgar "Dan" Olson MVL circuit design and characterization at the transistor level using SUS-LOC. Search on Bibsonomy ISMVL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
83Emilia Sipos, Lelia Festila, Gabriel Oltean Towards Reconfigurable Circuits Based on Ternary Controlled Analog Multiplexers/Demultiplexers. Search on Bibsonomy KES (3) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Analog multiplexer, reconfigurable circuit, transmission gate, CMOS transistors, SUS-LOC
61Edgar "Dan" Olson Supplementary Symmetrical Logic Circuit Structure. Search on Bibsonomy ISMVL The full citation details ... 1999 DBLP  DOI  BibTeX  RDF fully active, self sustaining
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