Search results for "Self-timing"

Found 17 publication records. Showing 17 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	R. S. Hogg, David W. Lloyd, W. I. Hughes	Self-Timed Communication Strategies for Massively Parallel Systolic Architectures.	CONPAR	1994	DBLP DOI BibTeX RDF	Scalable, Elastic, Massively-Parallel, Self-timing, Bit-serial
24	Ravichandran Ramachandran, Shih-Lien Lu	Efficient arithmetic using self-timing.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF
15	Hans M. Jacobson, Ganesh Gopalakrishnan	Asynchronous Microengines for Efficient High-level Control.	ARVLSI	1997	DBLP DOI BibTeX RDF	asynchronous circuits, microprogramming, self-timing
12	Saleh Abdel-Hafeez, Shadi M. Harb	A novel self-timing CMOS first-edge take-all circuit for on-chip communication systems.	IET Comput. Digit. Tech.	2023	DBLP DOI BibTeX RDF
12	Krashna Nand Mishra, Yogeshbhai Vallabhbhai Patel	Creating Fastest Self timing Reference Path for High Speed Memory Designs.	VLSID	2021	DBLP DOI BibTeX RDF
12	Roman Fragasse, Ramy Tantawy, Brian Dupaix, Trevor Dean, Daron Disabato, Matthew R. Belz, Dale Shane Smith, Jamin J. McCue, Waleed Khalil	Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing.	IEEE Trans. Circuits Syst. I Regul. Pap.	2019	DBLP DOI BibTeX RDF
12	Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu 0019, Jun Yang 0006	A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement.	NANOARCH	2019	DBLP DOI BibTeX RDF
12	Ivan E. Sutherland	Self-timing: a step beyond synchrony (tutorial talk).	FMCAD	2011	DBLP BibTeX RDF
12	U. Fat Chio, He Gong Wei, Yan Zhu 0001, Sai-Weng Sin, Seng-Pan U, Rui Paulo da Silva Martins	A self-timing switch-driving register by precharge-evaluate logic for high-speed SAR ADCs.	APCCAS	2008	DBLP DOI BibTeX RDF
12	Kenji Takao, Toru Yamamoto, Takao Hinamoto	Design of a memory-based self-timing PID controller.	CDC	2004	DBLP DOI BibTeX RDF
12	Eckhard Grass, Richard C. S. Morling, Izzet Kale	Activity-Monitoring Completion-Detection (AMCD): a new single rail approach to achieve self-timing.	ASYNC	1996	DBLP DOI BibTeX RDF
12	Kazuyuki Nakamura, Shigeru Kuhara, Tohru Kimura, Masahide Takada, Hisamitsu Suzuki, Hiroshi Yoshida, Tohru Yamazaki	A 220-MHz pipelined 16-Mb BiCMOS SRAM with PLL proportional self-timing generator.	IEEE J. Solid State Circuits	1994	DBLP DOI BibTeX RDF
12	Ted E. Williams, Mark A. Horowitz	A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
12	Scott B. Guthery	Self-Timing Programs and the Quantum Scheduler.	Commun. ACM	1988	DBLP DOI BibTeX RDF
8	Mathew A. Sacker, Andrew D. Brown, Peter R. Wilson, Andrew J. Rushton	A General Purpose Behavioural Asynchronous Synthesis System.	ASYNC	2004	DBLP DOI BibTeX RDF	Behavioural synthesis, asynchronous synthesis, cryptography
8	Jean-Philippe Martin, Lorenzo Alvisi, Michael Dahlin	Small Byzantine Quorum Systems.	DSN	2002	DBLP DOI BibTeX RDF
8	D. J. Kinniment	An evaluation of asynchronous addition.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF