|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 49 occurrences of 36 keywords
|
|
|
Results
Found 49 publication records. Showing 49 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
112 | Ghassan Shobaki, Kent D. Wilken |
Optimal Superblock Scheduling Using Enumeration. |
MICRO |
2004 |
DBLP DOI BibTeX RDF |
global instruction scheduling, compiler optimizations, enumeration, optimal scheduling, superblock |
106 | Tyrel Russell, Abid M. Malik, Michael Chase, Peter van Beek |
Learning Heuristics for the Superblock Instruction Scheduling Problem. |
IEEE Trans. Knowl. Data Eng. |
2009 |
DBLP DOI BibTeX RDF |
|
87 | Abid M. Malik, Michael Chase, Tyrel Russell, Peter van Beek |
An Application of Constraint Programming to Superblock Instruction Scheduling. |
CP |
2008 |
DBLP DOI BibTeX RDF |
|
87 | Mark Heffernan, Kent D. Wilken, Ghassan Shobaki |
Data-Dependency Graph Transformations for Superblock Scheduling. |
MICRO |
2006 |
DBLP DOI BibTeX RDF |
|
83 | Alexandre E. Eichenberger, Waleed Meleis |
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks. |
MICRO |
1999 |
DBLP DOI BibTeX RDF |
ILP compiler technique, weighted completion time, lower bound, scheduling heuristic, Superblock |
68 | Jeong-Uk Kang, Heeseung Jo, Jinsoo Kim 0001, Joonwon Lee |
A superblock-based flash translation layer for NAND flash memory. |
EMSOFT |
2006 |
DBLP DOI BibTeX RDF |
NAND flash memory, address translation, flash translation layer (FTL) |
64 | Waleed Meleis, Alexandre E. Eichenberger, Ivan D. Baev |
Scheduling Superblocks with Bound-Based Branch Trade-Offs. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
ILP compiler technique, lower bound, scheduling heuristic, Superblock |
58 | Dawoon Jung 0001, Jeong-Uk Kang, Heeseung Jo, Jinsoo Kim 0001, Joonwon Lee |
Superblock FTL: A superblock-based flash translation layer with a hybrid address translation scheme. |
ACM Trans. Embed. Comput. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
54 | Paul Lokuciejewski, Timon Kelter, Peter Marwedel |
Superblock-Based Source Code Optimizations for WCET Reduction. |
CIT |
2010 |
DBLP DOI BibTeX RDF |
Optimizations, Embedded Systems, Real-Time, Compiler, WCET, Superblock |
54 | Richard E. Hank, Scott A. Mahlke, Roger A. Bringmann, John C. Gyllenhaal, Wen-mei W. Hwu |
Superblock formation using static program analysis. |
MICRO |
1993 |
DBLP DOI BibTeX RDF |
optimization, VLIW, superscalar, static program analysis, superblock, code scheduling |
45 | Thomas M. Conte, Kishore N. Menezes, Mary Ann Hirsch |
Accurate and Practical Profile-driven Compilation Using the Profile Buffer. |
MICRO |
1996 |
DBLP DOI BibTeX RDF |
profile buffer, superblock scheduling, profiling, compiler optimization, instruction-level parallelism |
39 | Xianfeng Zhao |
Structural Optimization on Superscalar Processors. |
CSSE (3) |
2008 |
DBLP DOI BibTeX RDF |
|
39 | Daniel M. Lavery, Wen-mei W. Hwu |
Modulo Scheduling of Loops in Control-intensive Non-numeric Programs. |
MICRO |
1996 |
DBLP DOI BibTeX RDF |
control-intensive, modulo variable expansion, instruction-level parallelism, software pipelining, speculation, modulo scheduling |
29 | Ngoc An Nguyen, Joerg Schweizer, Federico Rupi, Sofia Palese, Leonardo Posati |
Superblock Design and Evaluation by a Microscopic Door-to-Door Simulation Approach. |
ISPRS Int. J. Geo Inf. |
2024 |
DBLP DOI BibTeX RDF |
|
29 | Weidong Zhang, Zhenxing Dong, Yan Zhu |
EddySuperblock: Improving NAND Flash Efficiency and Lifetime by Endurance-Driven Dynamic Superblock Management. |
IEEE Trans. Very Large Scale Integr. Syst. |
2022 |
DBLP DOI BibTeX RDF |
|
29 | Hao Cao, Shaozhong Guo, Jiangwei Hao, Yuanyuan Xia, Jinchen Xu |
Superblock-based performance optimization for Sunway Math Library on SW26010 many-core processor. |
J. Supercomput. |
2022 |
DBLP DOI BibTeX RDF |
|
29 | Davide Tebaldi |
PMSM Simulink Superblock and Matlab App for PMSM Parameters Estimation. |
|
2022 |
DOI RDF |
|
29 | Cyril Six, Léo Gourdin, Sylvain Boulmé, David Monniaux, Justus Fasse, Nicolas Nardino |
Formally verified superblock scheduling. |
CPP |
2022 |
DBLP DOI BibTeX RDF |
|
29 | Shunzhuo Wang, Fei Wu 0005, Chengmo Yang, Jiaona Zhou, Changsheng Xie, Jiguang Wan |
WAS: Wear Aware Superblock Management for Prolonging SSD Lifetime. |
DAC |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Junxue Zhang 0001, Fang Dong 0001, Dian Shen, Jiahui Jin, Junzhou Luo |
Superblock: An Application-Aware Dynamic Partition Strategy for Large-Scale Graph. |
CBD |
2015 |
DBLP DOI BibTeX RDF |
|
29 | John M. Ye, Hui Yan, Honglun Hou, Tianzhou Chen |
Potential thread-level-parallelism exploration with superblock reordering. |
Computing |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Xin Li 0002, Zhaoyan Shen, Lei Ju 0001, Zhiping Jia |
SRFTL: An Adaptive Superblock-Based Real-Time Flash Translation Layer for NAND Flash Memory. |
HPCC/CSS/ICESS |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Ning Lu, In-Sung Choi, Shin-Dug Kim |
A flash-aware write buffer scheme to enhance the performance of superblock-based NAND flash storage systems. |
Microprocess. Microsystems |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Marco Kaufmann, Rainer G. Spallek |
Superblock compilation and other optimization techniques for a Java-based DPT machine emulator. |
VEE |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Michael Chase, Abid M. Malik, Tyrel Russell, R. Wayne Oldford, Peter van Beek |
A computational study of heuristic and exact techniques for superblock instruction scheduling. |
J. Sched. |
2012 |
DBLP DOI BibTeX RDF |
|
29 | John M. Ye, Tianzhou Chen |
Exploring Potential Parallelism of Sequential Programs with Superblock Reordering. |
HPCC-ICESS |
2012 |
DBLP DOI BibTeX RDF |
|
29 | Timon Kelter |
Superblock-basierte Quellcodeoptimierungen zur WCET-Reduktion. |
Echtzeit |
2010 |
DBLP DOI BibTeX RDF |
|
29 | Sweta Verma, Ranjit Biswas, J. B. Singh |
Extension of Superblock Technique to Hyperblock Using Predicate Hierarchy Graph. |
IC3 (2) |
2010 |
DBLP DOI BibTeX RDF |
|
29 | Jung-Wook Park, Gi-Ho Park, Charles C. Weems, Shin-Dug Kim |
Sub-grouped superblock management for high-performance flash storages. |
IEICE Electron. Express |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Anthony M. Castaldo, R. Clint Whaley, Anthony T. Chronopoulos |
Reducing Floating Point Error in Dot Product Using the Superblock Family of Algorithms. |
SIAM J. Sci. Comput. |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Anjali Mahajan, M. Sadique Ali |
Superblock scheduling using genetic programming for embedded systems. |
IEEE ICCI |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Michael Hicks 0002, Colin Egan, Bruce Christianson, Patrick Quick |
Reducing the Branch Power Cost in Embedded Processors Through Static Scheduling, Profiling and SuperBlock Formation. |
Asia-Pacific Computer Systems Architecture Conference |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery |
The superblock: An effective technique for VLIW and superscalar compilation. |
J. Supercomput. |
1993 |
DBLP DOI BibTeX RDF |
|
25 | Spyridon Triantafyllis, Matthew J. Bridges, Easwaran Raman, Guilherme Ottoni, David I. August |
A framework for unrestricted whole-program optimization. |
PLDI |
2006 |
DBLP DOI BibTeX RDF |
interprocedural optimization, procedure unification, region encapsulation, region formation, whole-program analysis, whole-program optimization, specialization, interprocedural analysis, inlining, path-sensitive analysis, superblock, region-based compilation |
25 | Gang Chen, Michael D. Smith 0001 |
Reorganizing global schedules for register allocation. |
International Conference on Supercomputing |
1999 |
DBLP DOI BibTeX RDF |
superblock scheduling, instruction-level parallelism, register allocation |
25 | Cliff Young, Michael D. Smith 0001 |
Better Global Scheduling Using Path Profiles. |
MICRO |
1998 |
DBLP DOI BibTeX RDF |
global instruction scheduling, superblock scheduling, path profiling |
25 | Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu |
Three Architecutral Models for Compiler-Controlled Speculative Execution. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
static code scheduling, superpipelining, exception handling, speculative execution, superscalar, Conditional branches, superblock |
19 | Andreas Schranzhofer, Rodolfo Pellizzoni, Jian-Jia Chen, Lothar Thiele, Marco Caccamo |
Worst-case response time analysis of resource access models in multi-core systems. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
scheduling, TDMA, shared resources |
19 | Marvi Teixeira, Y. I. Rodroguez |
Parallel Cyclic Convolution Based on Recursive Formulations of Block Pseudocirculant Matrices. |
IEEE Trans. Signal Process. |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Haibing Guan, Bo Liu 0001, Tingtao Li, Alei Liang |
Multithreaded Optimizing Technique for Dynamic Binary Translator CrossBit. |
CSSE (5) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Shiliang Hu, James E. Smith 0001 |
Reducing Startup Time in Co-Designed Virtual Machines. |
ISCA |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Georgios Dimitriou, Constantine D. Polychronopoulos |
Hardware Support for Multithreaded Execution of Loops with Limited Parallelism. |
Panhellenic Conference on Informatics |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Huibin Shi, Chris Bailey 0002 |
Investigating Available Instruction Level Parallelism for Stack Based Machine Architectures. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Georgios Dimitriou, Constantine D. Polychronopoulos |
Loop Scheduling for Multithreaded Processors. |
PARELEC |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Jingren Zhou, Kenneth A. Ross |
A Multi-Resolution Block Storage Model for Database Design. |
IDEAS |
2003 |
DBLP DOI BibTeX RDF |
|
19 | R. Vinodh Kumar, B. Lakshmi Narayanan, R. Govindarajan |
Dynamic Path Profile Aided Recompilation in a JAVA Just-In-Time Compiler. |
HiPC |
2002 |
DBLP DOI BibTeX RDF |
|
19 | David Gregg |
Comparing Tail Duplication with Compensation Code in Single Path Global Instruction Scheduling. |
CC |
2001 |
DBLP DOI BibTeX RDF |
|
19 | Brian L. Deitrich, Wen-mei W. Hwu |
Speculative Hedge: Regulating Compile-time Speculation Against Profile Variations. |
MICRO |
1996 |
DBLP DOI BibTeX RDF |
|
19 | Kyunrak Chong, Sartaj Sahni |
Optimal realizations of floorplans [VLSI layout]. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1993 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #49 of 49 (100 per page; Change: )
|
|