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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 20 occurrences of 17 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
139 | Shiyi Xu |
High-Order Syndrome Testing for VLSI Circuits. |
PRDC |
2005 |
DBLP DOI BibTeX RDF |
Syndrome Testing Minterms, Syndrome, Exhaustive Testing |
69 | Sunil R. Das, Nishith Goel, Wen-Ben Jone, Amiya R. Nayak |
Syndrome signature in output compaction for VLSI BIST. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
syndrome signature, output compaction, VLSI BIST, input patterns, n-input combinational circuit, primary syndrome, subsyndromes, subfunctions, single-output circuit, multiple output, VLSI, logic testing, data compression, built-in self test, integrated circuit testing, combinational circuits, switching functions, exhaustive testing |
30 | Jacob Savir |
Syndrome-Testing of "Syndrome-Untestable" Combinational Circuits. |
IEEE Trans. Computers |
1981 |
DBLP DOI BibTeX RDF |
Inversion parity, reconvergent fan-out, unate function |
28 | Krishnendu Chakrabarty, John P. Hayes |
Balance testing and balance-testable design of logic circuits. |
J. Electron. Test. |
1996 |
DBLP DOI BibTeX RDF |
built-in self testing, design for testability, fault detection, fault coverage, testing methods |
22 | Zeev Barzilai, Jacob Savir, George Markowsky, Merlin G. Smith |
The Weighted Syndrome Sums Approach to VLSI Testing. |
IEEE Trans. Computers |
1981 |
DBLP DOI BibTeX RDF |
Syndrome-testing, syndrome-testable design, Partitioning, self-testing |
21 | Patrick Kam Lui, Jon C. Muzio |
Constrained parity testing. |
J. Electron. Test. |
1991 |
DBLP DOI BibTeX RDF |
compaction testing, parity testing, Built-in self-test, signature analysis |
Displaying result #1 - #6 of 6 (100 per page; Change: )
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