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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 10 occurrences of 8 keywords
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Results
Found 55 publication records. Showing 55 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
49 | Satoshi Fukuda, D. Kawazoe, Kenichi Okada, Kazuya Masu |
Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
intermodulation compensation, reconfigurable CMOS low noise amplifier, variable bias circuit, self compensation, power reduction |
35 | Takeshi Fukumoto, Hiroyuki Okada, Kazuyuki Nakamura |
Optimizing bias-circuit design of cascode operational amplifier for wide dynamic range operations. |
ISLPED |
2001 |
DBLP DOI BibTeX RDF |
bias-circuit, cascode, dynamic, CMOS, analog, low voltage |
33 | Nasser Talebbeydokhti, Pavan Kumar Hanumolu, Peter Kurahashi, Un-Ku Moon |
Constant transconductance bias circuit with an on-chip resistor. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Di Long, Xianlong Hong, Sheqin Dong |
Signal-path driven partition and placement for analog circuit. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
analog placement, device merging, layout automation, signal-path, symmetry constrain, circuit partition |
28 | Masako Fujii, Hiroaki Suzuki, Hiromi Notani, Hiroshi Makino, Hirofumi Shinohara |
On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect. |
ESSCIRC |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Pablo Aguirre, Fernando Silveira |
Bias circuit design for low-voltage cascode transistors. |
SBCCI |
2006 |
DBLP DOI BibTeX RDF |
CMOS, low voltage, analog design |
25 | Sean Nicolson, Khoman Phang |
Improvements in biasing and compensation of CMOS opamps. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Farzan Rezaei, Seyed Javad Azhari |
A Highly Linear Operational Transconductance Amplifier (OTA) with High Common Mode Rejection Ratio. |
ICSAP |
2010 |
DBLP DOI BibTeX RDF |
Operational Transconductance Amplifier (OTA), adaptive bias circuit, source degeneration, CMRR, linearity |
21 | Ryo Ishikawa, Junichi Kimura, Yukio Takahashi, Kazuhiko Honjo |
Distortion Compensation for Thermal Memory Effect on InGaP/GaAs HBT Amplifier by Inserting RC-Ladder Circuit in Base Bias Circuit. |
IEICE Trans. Electron. |
2010 |
DBLP DOI BibTeX RDF |
|
19 | D. Kawazoe, Hirotaka Sugawara, Tatsuya Ito, Kenichi Okada, Kazuya Masu |
Reconfigurable CMOS low noise amplifier for self compensation. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Ju-Pyo Hong, Kyung-Soo Ha, Lee-Sup Kim |
A 0.18µm CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Huiting Chen, Edward Lee, Randall L. Geiger |
A 2 GHz VCO with process and temperature compensation. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Gerd Vandersteen, Stephane Bronckers, Petr Dobrovolný, Yves Rolain |
Systematic stability-analysis method for analog circuits. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Junyong Lee, Gaim Jung, Seunghyun Kim, Minjae Lee |
An 8-bit 1.24 mW Sub-1ps DNL Sub-1V Supply Inverter-Based Phase Interpolator Using a PVT-Tracking Adaptive-Bias Circuit. |
IEEE Trans. Circuits Syst. II Express Briefs |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ravi Kumar 0006, Rajasekhar Nagulapalli, Santosh Kumar Vishvakarma |
A Novel Bias Circuit Technique to Reduce the PVT Variation of the Ring Oscillator Frequency. |
J. Circuits Syst. Comput. |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Tsuyoshi Sugiura, Toshihiko Yoshimasu |
Ka-Band Stacked-FET Power Amplifier IC with Adaptively Controlled Gate Capacitor and Two-Step Adaptive Bias Circuit in 45-nm SOI CMOS. |
IEICE Trans. Electron. |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Hojong Choi |
Harmonic-Reduced Bias Circuit for Ultrasound Transducers. |
Sensors |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Shichong Zhai, Wenchang Li, Jian Liu 0021, Tianyi Zhang |
A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit. |
ICTA |
2022 |
DBLP DOI BibTeX RDF |
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14 | Alpaslan Ersöz, Insoo Kim, Martin Han |
Maximizing Charge Injection Limits of Iridium Oxide Electrodes with a Programmable Anodic Bias Circuit. |
NER |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Burak Kelleci |
Replica bias circuit for common-source amplifier. |
Turkish J. Electr. Eng. Comput. Sci. |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Inchan Ju, Yunyi Gong, John D. Cressler |
Highly Linear High-Power 802.11ac/ax WLAN SiGe HBT Power Amplifiers With a Compact 2nd-Harmonic-Shorted Four-Way Transformer and a Thermally Compensating Dynamic Bias Circuit. |
IEEE J. Solid State Circuits |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Jongha Park, Jung-Hyun Park, Seong-Ook Jung |
Current Measurement Transducer Based on Current-To-Voltage-To-Frequency Converting Ring Oscillator with Cascade Bias Circuit. |
Sensors |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Souma Yamamoto, Kuswan Isam Ebisawa, Yudai Abe, Takashi Ida, Yukiko Shibasaki, Nobukazu Tsukiji, Anna Kuwana, Haruo Kobayashi 0001, Akira Suzuki, Yukichi Todoroki, Toshihiko Kakinoki, Nobuto Ono, Kazuhiro Miura |
Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit. |
ISOCC |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Sumalya Ghosh, Bishnu Prasad De, Rajib Kar, Ashis Kumar Mal |
Symbiotic organisms search algorithm for optimal design of CMOS two-stage op-amp with nulling resistor and robust bias circuit. |
IET Circuits Devices Syst. |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Hojong Choi |
Stacked Transistor Bias Circuit of Class-B Amplifier for Portable Ultrasound Systems. |
Sensors |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Himchan Park, Kyunghoon Kim, Changzhi Yu, Eugene Chong, Jinwook Burm, Byeonghwang Park |
Quenching bias circuit with current mirror for single photon detection. |
IEICE Electron. Express |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Zekun Zhou, Yunkun Wang, Yue Shi 0001 |
A Bandgap Reference Using a Novel Soft Self-start Bias Circuit. |
APCCAS |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Keun-Kwan Ryu, Yong-Hwan Kim, Sung-Chan Kim |
Low Noise and High Linearity GaAs LNA MMIC with Novel Active Bias Circuit for LTE Applications. |
J. Inform. and Commun. Convergence Engineering |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Teerachot Siriburanon, Wei Deng 0001, Kenichi Okada, Akira Matsuzawa |
A Constant-Current-Controlled Class-C Voltage-Controlled Oscillator using Self-Adjusting Replica Bias Circuit. |
IEICE Trans. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
14 | Xin Yang, Tsuyoshi Sugiura, Norihisa Otani, Tadamasa Murakami, Eiichiro Otobe, Toshihiko Yoshimasu |
A 5-GHz Band WLAN SiGe HBT Power Amplifier IC with Novel Adaptive-Linearizing CMOS Bias Circuit. |
IEICE Trans. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
14 | Hiroo Wakaumi |
A folded-cascode OP Amp with a dynamic switching bias circuit. |
APCCAS |
2014 |
DBLP DOI BibTeX RDF |
|
14 | Sang-Soo Lee, Edward Boling, Augustine Kuo, Robert Rogenmoser |
A slew-rate based process monitor and bi-directional body bias circuit for adaptive body biasing in SoC applications. |
CICC |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Shijie Deng, Alan P. Morrison |
Design of an adjustable bias circuit using a single-sided CMOS supply for avalanche photodiodes. |
NEWCAS |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Satoshi Matsumoto, Sumio Fukai, Akio Shimizu, Yohei Ishikawa |
Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter. |
APCCAS |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Shintaro Shinjo, Kazutomi Mori, Tomokazu Ogomi, Yoshihiro Tsukahara, Mitsuhiro Shimozawa |
On-Chip Temperature Compensation Active Bias Circuit Having Tunable Temperature Slope for GaAs FET MMIC PA. |
IEICE Trans. Electron. |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Chung-Yi Li, Yuan-Ho Chen, Tsin-Yuan Chang, Jyun-Neng Chen |
A Probabilistic Estimation Bias Circuit for Fixed-Width Booth Multiplier and Its DCT Applications. |
IEEE Trans. Circuits Syst. II Express Briefs |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Mesut Meterelliyoz, Ashish Goel, Jaydeep P. Kulkarni, Kaushik Roy 0001 |
Accurate characterization of random process variations using a robust low-voltage high-sensitivity sensor featuring replica-bias circuit. |
ISSCC |
2010 |
DBLP DOI BibTeX RDF |
|
14 | Jin-Ho Choi |
Temperature Stable Current Source Using Simple Self-Bias Circuit. |
J. Inform. and Commun. Convergence Engineering |
2009 |
DBLP BibTeX RDF |
|
14 | Toshifumi Nakatani, Koichi Ogawa |
A Low Distortion and Low Noise Differential Amplifier Suitable for 3G LTE Applications Using the Even- and Odd-Mode Impedance Differences of a Bias Circuit. |
IEICE Trans. Electron. |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Rezaul Haque, Kerry Tedrow, Balaji Srinivasan |
Design of a flash-based reference voltage generator for drain bias circuit. |
IET Circuits Devices Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Alexandre Valentian, Edith Beigné |
Gate bias circuit for an SCCMOS power switch achieving maximum leakage reduction. |
ESSCIRC |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Youn Sub Noh, Jong Heung Park, Chul Soon Park |
A Temperature and Supply Independent Bias Circuit and MMIC Power Amplifier Implementation for W-CDMA Applications. |
IEICE Trans. Electron. |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Ming-Dou Ker, Chia-Sheng Tsai |
Design of 2.5 V/5 V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Youn Sub Noh, Chul Soon Park |
PCS/W-CDMA dual-band MMIC power amplifier with a newly proposed linearizing bias circuit. |
IEEE J. Solid State Circuits |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Volney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider |
A high-swing MOS cascode bias circuit for operation at any current level. |
ISCAS |
2000 |
DBLP DOI BibTeX RDF |
|
14 | Thomas C. Banwell |
Simple precision bias circuit for medium-power amplifiers. |
IEEE J. Solid State Circuits |
1994 |
DBLP DOI BibTeX RDF |
|
14 | Saeed Saeedi, Saeid Mehrmanesh, Armin Tajalli, Seyed Mojtaba Atarodi |
A technique to suppress tail current flicker noise in CMOS LC VCOs. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Krishnakumar Sundaresan, Paul S. Ho, Siavash Pourkamali, Farrokh Ayazi |
A two-chip, 4-MHz, microelectromechanical reference oscillator. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Daniela De Venuto, Marija Blagojevic, Maher Kayal |
Microelectronic System for Hall Sensor Power Measurements. |
DELTA |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi |
Design of low error CSD fixed-width multiplier. |
ISCAS (1) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Shanthi Pavan |
A fixed transconductance bias technique for CMOS analog integrated circuits. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
11 | Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani |
Active self supplied AC-DC converter for piezoelectric energy scavenging systems with supply independent bias. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
11 | Hong-Jae Shin, Sun-Bo Woo, Seung-Jun Shin, Kae-Dal Kwack, Tae-Whan Kim |
A Novel High Gray Scale Data Driver for Passive Matrix OLED Displays. |
PDCAT |
2005 |
DBLP DOI BibTeX RDF |
|
8 | Chung-Yun Chou, Chung-Yu Wu |
The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications. |
APCCAS (1) |
2002 |
DBLP DOI BibTeX RDF |
|
8 | Dominique Python, Christian C. Enz |
An antialiasing filter using complementary MOS transconductors biased in the triode region. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
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