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Found 539 publication records. Showing 539 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 69 | Niraj K. Jha |
Fault Detection in CVS Parity Trees with Application to Strongly Self-Checking Parity and Two-Rail Checkers.  |
IEEE Trans. Computers  |
1993 |
DBLP DOI BibTeX RDF |
CVS parity trees, strongly self-checking parity, single stuck-at, stuck-open, stuck-on fault detection, cascode voltage switch, differential cascode voltage switch, EX-OR gates, single-ended cascode voltage switch, logic testing, fault location, logic gates, two-rail checkers |
| 68 | Mohammad Yavari, Omid Shoaei, Francesco Svelto |
Hybrid cascode compensation for two-stage CMOS operational amplifiers. |
ISCAS (2) |
2005 |
DBLP DOI BibTeX RDF |
|
| 66 | C. N. M. Marins, Luiz C. Kretly |
Minimizing the mismatch errors at the VCO and cascode buffer connections in front end of BiCMOS RFICs operating on S band. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
Gm LC configuration oscillator, SiGe BiCMOS .35?m technology, cascode configuration, VCO, front-ends |
| 56 | Mohammad Yavari, Omid Shoaei, Ángel Rodríguez-Vázquez |
Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 53 | Leila Koushaeian, Stan Skafidas |
A 65nm CMOS low-power, low-voltage bandgapreference with using self-biased composite cascode opamp. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
bandgap voltage reference, self-biased, self-cascode, temperature coefficient, voltage reference |
| 53 | Marcio Barbosa Lucks, Nobuo Oki |
RBF circuits based on folded cascode differential pairs. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
folded cascode topology, artificial neural networks, radial basis function |
| 53 | Pradip Mandal, V. Visvanathan |
Design of high performance two stage CMOS cascode op-amps with stable biasing. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
two stage CMOS cascode op-amps, stable biasing, mirror biasing, output voltage, bias variations, low frequency common mode rejection ratios, power supply rejection ratios, systematic offset, circuit analysis computing, performance metrics, integrated circuit design, circuit simulations, operational amplifiers, CMOS analogue integrated circuits, slew rate, circuit stability |
| 51 | Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz |
Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS. |
DDECS |
2009 |
DBLP DOI BibTeX RDF |
|
| 48 | Yarallah Koolivand, Omid Shoaei, Ali Fotowat-Ahmady, Ali Zahabi, Parviz Jabedar Maralani |
Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
CMOS LNA, cascode, inductively source degenerated (ISD), intermodulation (IM), second order interception point (IIP2), third order interception point (IIP3), volterra kernels, volterra series, linearity, distortion |
| 48 | Mohammad Yavari, Omid Shoaei |
Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
cascode compensation, class AB, switched-capacitor circuits, operational transconductance amplifiers |
| 43 | Cheng-Ta Chan, Oscal T.-C. Chen |
Inductor-less 10Gb/s CMOS transimpedance amplifier using source-follower regulated cascode and double three-order active feedback. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 43 | Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei |
A pseudo-class-AB telescopic-cascode operational amplifier. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
| 43 | Uroschanit Yodprasit, Krisada Sirivathanani |
VHF current-mode filter based on intrinsic biquad of the regulated cascode topology. |
ISCAS (1) |
2001 |
DBLP DOI BibTeX RDF |
|
| 43 | Thomas Burger, Qiuting Huang |
On the optimum design of regulated cascode operational transconductance amplifiers. |
ISLPED |
1998 |
DBLP DOI BibTeX RDF |
|
| 43 | Pradip Mandal, V. Visvanathan |
A Self-Biased High Performance Folded Cascode CMOS Op-Amp. |
VLSI Design |
1997 |
DBLP DOI BibTeX RDF |
|
| 41 | Takeshi Fukumoto, Hiroyuki Okada, Kazuyuki Nakamura |
Optimizing bias-circuit design of cascode operational amplifier for wide dynamic range operations. |
ISLPED |
2001 |
DBLP DOI BibTeX RDF |
bias-circuit, cascode, dynamic, CMOS, analog, low voltage |
| 38 | Wei Guo, Daquan Huang |
Noise and linearity analysis for a 1.9 GHz CMOS LNA. |
APCCAS (2) |
2002 |
DBLP DOI BibTeX RDF |
|
| 36 | Dongmyeong Kim, Donggu Im |
A 2.4 GHz Reconfigurable Cascode/Folded-Cascode Inductive Source Degenerated LNA With Enhanced OP1dB and OIP3 Over Gain Reduction. |
IEEE Trans. Circuits Syst. II Express Briefs |
2023 |
DBLP DOI BibTeX RDF |
|
| 36 | V. H. Arzate Palma, F. Sandoval-Ibarra |
Slew-rate Comparison of single-ended amplifiers-the Folded Cascode and the Recycling Folded Cascode. |
CCE |
2023 |
DBLP DOI BibTeX RDF |
|
| 36 | Boran Wen, Qisheng Zhang, Xiao Zhao, Xiaolong Lv, Yongqing Wang |
Trade-offs among power consumption and other design parameters of two-stage recycling folded cascode OTA that using embedded cascode current buffer compensation technology. |
Integr. |
2019 |
DBLP DOI BibTeX RDF |
|
| 36 | Ghader Yosefi |
The high recycling folded cascode (HRFC): A general enhancement of the recycling folded cascode operational amplifier. |
Microelectron. J. |
2019 |
DBLP DOI BibTeX RDF |
|
| 36 | Rida S. Assaad, José Silva-Martínez |
The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier. |
IEEE J. Solid State Circuits |
2009 |
DBLP DOI BibTeX RDF |
|
| 36 | Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun |
Design for Self-Checking and Self-Timed Datapath. |
VTS |
2003 |
DBLP DOI BibTeX RDF |
asynchronous datapath, differential cascode voltage switch logic, Self-checking, dynamic circuits |
| 36 | Basilis Gidas |
A Renormalization Group Approach to Image Processing Problems. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1989 |
DBLP DOI BibTeX RDF |
renormalization group, coarse-to-fine analysis, multilevel cascode, optimisation, global-optimization, Markov processes, computerised picture processing, computerised picture processing, image restoration, texture analysis, Monte Carlo methods, digital image processing, Monte Carlo algorithms, Markov random-field modeling |
| 30 | Miguel A. Martins, Jorge R. Fernandes, Manuel Medeiros Silva |
Techniques for Dual-Band LNA Design using Cascode Switching and Inductor Magnetic Coupling. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 30 | You Zheng, Carlos E. Saavedra |
A Microwave OTA Using a Feedforward-Regulated Cascode Topology. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 30 | Pablo Aguirre, Fernando Silveira |
Bias circuit design for low-voltage cascode transistors. |
SBCCI |
2006 |
DBLP DOI BibTeX RDF |
CMOS, low voltage, analog design |
| 30 | Jaime Ramírez-Angulo, Milind S. Sawant, Ramón González Carvajal, Antonio J. López-Martín |
New compact and power efficient dynamically biased cascode mirrors and telescopic op-amps. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 30 | Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra |
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
| 30 | Yanjie Wang, Rabin Raut |
A 2.4 GHz 82 dB-Omega fully differential CMOS transimpedance amplifier for optical receiver based on wide-swing cascode topology. |
ISCAS (2) |
2005 |
DBLP DOI BibTeX RDF |
|
| 30 | Jozef Adut, José Silva-Martínez |
Cascode transconductance amplifiers for HF switched-capacitor applications. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
| 25 | Nicole M. Nelson, Pamela Abshire |
Chopper Modulation Improves OTA Information Transmission. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 25 | S. Alireza Zabihian, Reza Lotfi |
Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 25 | Trung-Kien Nguyen, Sang-Gug Lee 0001 |
A sub-mA, high-gain CMOS low-noise amplifier for 2.4 GHz applications. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 25 | Ruey-Lue Wang, Shih-Chih Chen, Hsiang-Chen Kuo, Chien-Hsuan Liu |
A 0.18-µm CMOS UWB Low Noise Amplifier for Full-Band (3.1-10.6GHz) Application. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 25 | Yasutaka Haga, Hashem Zare-Hoseini, Laurence Berkovi, Izzet Kale |
Design of a 0.8 Volt fully differential CMOS OTA using the bulk-driven technique. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
| 25 | Vishal Gupta 0003, Gabriel A. Rincón-Mora |
Predicting and Designing for the Impact of Process Variations and Mismatch on the Trim Range and Yield of Bandgap References. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 25 | Preetam Tadeparthy |
An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
| 25 | Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman |
High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. |
ISQED |
2004 |
DBLP DOI BibTeX RDF |
|
| 25 | Kwang-Jin Koh, Yong-Sik Youn, Hyun-Kyu Yu |
A gain boosting method at RF frequency using active feedback and its application to RF variable gain amplifier (VGA). |
ISCAS (3) |
2002 |
DBLP DOI BibTeX RDF |
|
| 25 | Atit Tamtrakarn, N. Wongkomet |
A 2.5-V 10-bit 40-MS/S double sampling pipeline A/D converter. |
APCCAS (2) |
2002 |
DBLP DOI BibTeX RDF |
|
| 25 | Chien-Cheng Yu, Weiping Wang, Bin-Da Liu |
A new level converter for low-power applications. |
ISCAS (1) |
2001 |
DBLP DOI BibTeX RDF |
|
| 23 | Wenxiao Feng, Tiejun Lu, Zongmin Wang |
Analysis and Design of Fully Differential Gain-Boosted Op-amp for 14bit 100MS/s Pipelined Analog-to-Digital Converter. |
NCM |
2009 |
DBLP DOI BibTeX RDF |
fully differential op-amp, folded cascode, boosting amplifier, pipelined ADC |
| 23 | Shambhu J. Upadhyaya, Nandakumar P. Venugopal, Nihal Shastry, Srinivasan Gopalakrishnan, Bharath V. Kuppuswamy, Rana Bhowmick, Prerna Mayor |
Design Considerations for High Performance RF Cores Based on Process Variation Study. |
J. Electron. Test. |
2008 |
DBLP DOI BibTeX RDF |
Cascode LNA, Corner analysis, Differential CMOS LNA, Phase frequency detector (PFD), Reuse topology, Process variation, Jitter, Phase noise, Noise figure, S-parameters, Monte Carlo analysis |
| 23 | Udo Sobe, Karl-Heinz Rooch, Andreas Ripp, Michael Pronath |
Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Design Centering, Safe Operating Area, Self-Biasing Cascode, WiCKeD, Constraint Matrix, Reliability, Automotive, OTA |
| 23 | Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider |
An ultra-low-power self-biased current reference. |
SBCCI |
2004 |
DBLP DOI BibTeX RDF |
inversion level, self-cascode MOSFET, design methodology, low-voltage, ultra-low-power, current reference |
| 23 | Nick Kanopoulos, Dimitris Pantzartzis, Frederick R. Bartram |
Design of Self-Checking Circuits Using DCVS Logic: A Case Study. |
IEEE Trans. Computers |
1992 |
DBLP DOI BibTeX RDF |
DCVS logic, differential cascode voltage switch, low hardware-overhead costs, fault tolerance, fault tolerant computing, logic design, error detection, error correction, logic circuits, self-checking circuits |
| 18 | Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang 0001, Runsheng Wang, Ru Huang |
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM. |
IEEE J. Solid State Circuits |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Yang Yuan, Bin Yuan, Jiaxuan Li, Zijian Wang, Jialong Zeng, Zhongjun Yu |
A Broadband Cascode Low-Noise Amplifier Using Transformer Feedback and Darlington Techniques. |
IEEE Trans. Circuits Syst. II Express Briefs |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Cong Tao, Jiangli Huang, Liangbo Lei, Yumei Huang, Zhiliang Hong, Xiaoyang Zeng |
A Compact 0.1-1.95 GHz, 1.5 dB NF LNTA Based on Cascode Inverters. |
IEEE Trans. Circuits Syst. II Express Briefs |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Kai Yu 0008, Jiyang Chen, Sizhen Li, Mo Huang |
A 0.011%/V LS and -76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror. |
IEEE Trans. Circuits Syst. II Express Briefs |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Taehun Kim, Hayeon Jeong, Seong-Jin Jang, Jaeyong Lee 0005, Changkun Park |
Ka-Band CMOS Power Amplifier Using Stacked Structure With Cascode-Like Operation. |
IEEE Trans. Circuits Syst. II Express Briefs |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Zhuoyi Chen, Linxiao Shen, Siyuan Ye, Jihang Gao, Jie Li, Jiajia Cui, Xinhang Xu, Yaohui Luan, Hao Zhang, Le Ye, Ru Huang |
9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion Technique. |
ISSCC |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Indrajit Das, Hari Kishore Kakara, Vasudeva Reddy, Venkata Vanukuru |
A 7.1 GHz +23.7 dBm OIP3 1-dB NF Cascode LNA for next-generation Wi-Fi using a 130 nm SOI CMOS Technology. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 18 | Cong Tao, Liangbo Lei, Zhipeng Chen, Yumei Huang, Zhiliang Hong |
A 29.5 dBm OOB IIP3 TIA Based on a Two-Stage Pseudo-Differential OTA With R-C Compensation and Cascode Negative Resistance. |
IEEE Access |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Robert Smolarz, Kamil Staszek, Slawomir Gruszczynski, Krzysztof Wincza |
Broadband Monolithic GaN Balanced Amplifier Composed of Mixed Cascade-Tandem Directional Couplers and Cascode Stages. |
IEEE Access |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Hamed Aminzadeh, Andrea Ballo, Alfio Dario Grasso, Mohammad Mahdi Valinezhad, Mohammad Jamali |
Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of CL. |
IEEE Trans. Very Large Scale Integr. Syst. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Ranran Zhou, Haozhe Wang, Peng Wang, Peter Poechmueller, Yong Wang 0006 |
A 55-nm Three-Stage Operational Transconductance Amplifier With Single Cascode Miller Compensation for Large Capacitive Loads. |
IEEE Trans. Very Large Scale Integr. Syst. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Komala Krishna, Nandakumar Nambath |
Cascode Cross-Coupled Stage High-Speed Dynamic Comparator in 65 nm CMOS. |
IEEE Trans. Very Large Scale Integr. Syst. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Adson Alves Fernandes, Eliana Silva dos Santos, Mateus Moura Costa Simões, Lucas Costa D'Eça, Maicon Deivid Pereira, Ana Isabela Araújo Cunha |
Improving Output Voltage Swing in Cascode Current Mirrors. |
Circuits Syst. Signal Process. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Yaolong Hu, Taiyun Chi |
A Systematic Approach to Designing Broadband Millimeter-Wave Cascode Common-Source With Inductive Degeneration Low Noise Amplifiers. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Enis Kobal, Teerachot Siriburanon, Robert Bogdan Staszewski, Anding Zhu |
A Compact, Low-Power, Low-NF, Millimeter-Wave Cascode LNA With Magnetic Coupling Feedback in 22-nm FD-SOI CMOS for 5G Applications. |
IEEE Trans. Circuits Syst. II Express Briefs |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Rajesh Kumar, Sachin Kumar 0003, Binod Kumar Kanaujia |
An efficient wideband cascode class FF-1 Doherty power amplifier with control harmonic impedance inverter for X-band applications. |
Int. J. Circuit Theory Appl. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Zhongchen Xu, Menghu Ni, Qian Xie, Zheng Wang 0050 |
Collaborative gain and noise optimization: a design of 150-173-GHz cascode LNA with 22.3 dB gain and 6.92 dB NF based on the gain-noise plane. |
Sci. China Inf. Sci. |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Moinul Shahidul Haque, Md Moniruzzaman, Seungdeog Choi, Sangshin Kwak, Ahmed H. Okilly, Jeihoon Baek |
A Fast Loss Model for Cascode GaN-FETs and Real-Time Degradation-Sensitive Control of Solid-State Transformers. |
Sensors |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Raphael Behrle, Martien I. Den Hertog, Alois Lugstein, Walter M. Weber, Masiar Sistani |
Bias Spectroscopy of Negative Differential Resistance in Ge Nanowire Cascode Circuits. |
ESSDERC |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Vipin Joshi, Sayak Dutta Gupta, Rajarshi Roy Chaudhuri, Mayank Shrivastava |
Unique Dependence of the Breakdown Behavior of Normally-OFF Cascode AlGaN/GaN HEMTs on Carrier Transport Through the Carbon-Doped GaN Buffer. |
IRPS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Zhiyu Zhou |
Design of capacitor feedback amplifier for amplifying ECG signal using a folded-cascode amplifier. |
ICISCAE |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Jorge Luis González Rios, Diego Vázquez, Robson Luiz Moreno, Juan Carlos Merlano Duncan, Ole K. Jensen, Symeon Chatzinotas, Björn E. Ottersten |
Stacked-Cascode Current Steering Architecture for Gallium Nitride Variable-Gain LNAs. |
LASCAS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | David J. Niven, Simon J. Mahon, Andrew J. Jones, Melissa C. Gorman |
Transient Field-Plate Thermometry in Cascode FET Power Amplifiers. |
BCICTS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Anthony Romano, Timothy Sonnenberg, Zoya Popovic |
46-102 GHz GaN Balanced Cascode Amplifier-Isolator. |
BCICTS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Hiroshi Uemura, Taichi Misawa, Naoki Itabashi, Munetaka Kurokawa, Yoshiyuki Sugimoto, Seiji Kumagai, Masaru Takechi, Keiji Tanaka |
A 19-dB Peaking at 72-GHz and 4.1-Vppd Output Swing SiGe BiCMOS Linear Driver with Dynamic Cascode Output Buffer. |
BCICTS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Ausiàs Garrigós, David Marroqui, José M. Blanes, Cristian Torres, Carlos Orts, Pablo Casado |
SiC JFET/P-MOSFET cascode for SSCB and inrush current limiter in 300V DC power systems. |
ISIE |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Chung-Geun Jang, Ki-Jin Kim, Kwang-Ho Ahn, Soo-Chang Chae |
A Design of 80 GHz Cascode LNA for W-Band Level Sensing System. |
ICTC |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Behnam Abdollahi, Horst Zimmermann |
A Low-Power Current-Reuse Self-Biased Regulated-Cascode TIA in 130nm SiGe BiCMOS for Low-Noise and High Data Rate Applications. |
NorCAS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Haoyang Jia, Yanjie Wang, Anding Zhu |
A 52-67GHz Ultra-Compact Bi-directional Gate-switching Cascode Amplifier with Tri-coil Broadband Matching in 40-nm CMOS. |
CICC |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Federica Benedini, Luca Sant, Richard Gaggl, Andrea Baschirotto |
A 55nm Cascode Flipped Voltage Follower for MEMS Microphone Interfaces. |
ISCAS |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Vasiliki Gogolou, Thomas Noulis, J. Dingfelder |
CMOS Folded-Cascode versus Inverter-based CSA towards Noise Performance and Speed. |
MOCAST |
2023 |
DBLP DOI BibTeX RDF |
|
| 18 | Cheng Zhao, Laili Wang, Xu Yang 0012, Fan Zhang 0064, Yongmei Gan |
Comparative Investigation on Paralleling Suitability for SiC MOSFETs and SiC/Si Cascode Devices. |
IEEE Trans. Ind. Electron. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Jiahui Sun, Kailun Zhong, Zheyang Zheng, Gang Lyu, Kevin J. Chen |
Short-Circuit Failure Mechanisms of 650-V GaN/SiC Cascode Devices in Comparison With SiC MOSFETs. |
IEEE Trans. Ind. Electron. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Gang Lyu, Jiahui Sun, Yuru Wang, Kevin J. Chen |
Short-Circuit Characteristics and High-Current Induced Oscillations in a 1200-V/80-mΩ Normally-Off SiC/GaN Cascode Device. |
IEEE Trans. Ind. Electron. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Kailun Zhong, Yuru Wang, Gang Lyu, Jin Wei, Jiahui Sun, Kevin J. Chen |
650-V Normally-OFF GaN/SiC Cascode Device for Power Switching Applications. |
IEEE Trans. Ind. Electron. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Mohamed B. Elamien, Brent J. Maundy, Ahmed S. Elwakil, Leonid Belostotski |
Second-order cascode-based filters. |
Integr. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Pournamy Sukumaran, Maran Ponnambalam |
A two stage cascode LNA using modified derivative superposition technique in 0.13μm HBT with an IIP3 of 2 dBm and NF of 4.8 dB for IEEE 802.11ad standard. |
Integr. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Hamed Aminzadeh, Mohammad Mahdi Valinezhad |
Picowatt 0.3-V MOS-only voltage reference based on a picoamp cascode current generator. |
Integr. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Mihika Mahendra, Shweta Kumari, Maneesha Gupta |
Low voltage fully differential OTA using DTMOS based self cascode transistor with slew-rate enhancement and its filter application. |
Integr. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Cheng Cao, Yubing Li, Zhe Wang, Zemeng Huang, Tao Tan, Deyang Chen, Xiuping Li |
CMOS X-band pole-converging triple-cascode LNA with low-noise and wideband performance. |
IET Circuits Devices Syst. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Yaowen Tu, Min Tan 0004 |
A Three-Stage Amplifier With Cascode Miller Compensation and Buffered Asymmetric Dual Path for Driving Large Capacitive Loads. |
IEEE Trans. Circuits Syst. II Express Briefs |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Chuanchuan Wan, Hao Zhang, Yuan Zhao, Ming Zeng, Jiayu Dong, Ling Li, Keping Wang |
A Broadband SiGe HBT Cascode Power Amplifier Achieving Watt-Level Peak Output Power With 38.6% PAE and 90.9% Large-Signal Fractional Bandwidth. |
IEEE Trans. Circuits Syst. II Express Briefs |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Xu Yan, Haorui Luo, Jingyuan Zhang, Hao Zhang 0076, Yongxin Guo |
Design and Analysis of a Cascode Distributed LNA With Gain and Noise Improvement in 0.15-μm GaAs pHEMT Technology. |
IEEE Trans. Circuits Syst. II Express Briefs |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Roowz Saini, Kulbhushan Sharma, Rajnish Sharma |
A Low-Noise High-Gain Recycling Folded Cascode Operational Transconductance Amplifier Based on Gate Driven and Quasi-Floating Bulk Technique. |
J. Circuits Syst. Comput. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | César W. V. Casañas, Gabriel Antonio Fanelli de Souza, Osamu Saotome, Robson L. Moreno |
Low power current comparator circuit using a cascode transistor structure for bias generation. |
Microelectron. J. |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Jihoon Kim |
A Wideband and Low-Power Distributed Cascode Mixer Using Inductive Feedback. |
Sensors |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Chengxian Pan, Chunqi Shi, Guoliang Zhao, Boxiao Liu, Leilei Huang, Runxi Zhang |
A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. |
IEICE Electron. Express |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Eunji Song, Jeonghyu Yang, Seungwook Hong, Jaeduk Han |
A 32-Gb/s High-Swing PAM-4 Current-Mode Driver with Current-Bleeding Cascode Technique and Capacitive-Coupled Pre-drivers in 40-nm CMOS for Short-Reach Wireline Communications. |
MWSCAS |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Cong Tao, Liangbo Lei, Zhipeng Chen, Zhiliang Hong, Yumei Huang |
A 50MHz Bandwidth TIA Based on Two Stage Pseudo-Differential OTA with Cascode Negative Resistance and R-C Compensation Technique. |
MWSCAS |
2022 |
DBLP DOI BibTeX RDF |
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| 18 | Suvarna Mujumdar, Sajad A. Loan, Nelofer Afzal |
CNTFET based 2-bit Unary weighted Current Steering Digital to Analog Converter using Cascode Current Mirror Technique. |
ICM |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | L. Fursin, P. Losee, Akin Akturk |
Investigation of Terrestrial Neutron Induced Failure Rates in Silicon Carbide JFET Based Cascode FETs. |
IRPS |
2022 |
DBLP DOI BibTeX RDF |
|
| 18 | Hyuk Jin Choi, Woo Hee Lim, Han Lim Lee |
28GHz High gain CMOS differential cascode Power Amplifier with 16.5dBm output power. |
ICEIC |
2022 |
DBLP DOI BibTeX RDF |
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| 18 | Cristian Stancu, Dragos Dobrescu, Lidia Dobrescu |
Offset Voltage Reduction Methods for a Two-Stage Folded Cascode Operational Amplifier. |
ECAI |
2022 |
DBLP DOI BibTeX RDF |
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