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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 6132 publication records. Showing 6131 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
85 | Ching-Hwa Cheng, Shih-Chieh Chang, Jinn-Shyan Wang, Wen-Ben Jone |
Charge Sharing Fault Detection for CMOS Domino Logic Circuits. |
DFT |
1999 |
DBLP DOI BibTeX RDF |
charge sharing, cs-vulnerability, pseudo gate, ATPG, domino circuit |
76 | Man-ho Kim, Chong-koo An, Byung-su Park |
Determination of Charge Handling Capability of a Deep Depletion Charge Coupled Device for Astronomic Applications. |
ICIC (3) |
2007 |
DBLP DOI BibTeX RDF |
Buried-channel CCD, 3-D numerical device simulation, Full-well capacity, Charge transfer efficiency |
72 | S. H. Chasen |
Economic principles for interactive graphic applications. |
AFIPS National Computer Conference |
1975 |
DBLP DOI BibTeX RDF |
|
59 | Shah M. Jahinuzzaman, Mohammad Sharifkhani, Manoj Sachdev |
Investigation of Process Impact on Soft Error Susceptibility of Nanometric SRAMs Using a Compact Critical Charge Model. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
critical charge, process variation, Soft error, SRAM |
59 | Luigi Dilillo, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits. |
J. Electron. Test. |
2007 |
DBLP DOI BibTeX RDF |
Resistive-open defects, Pre-charge circuits, Memory testing, Dynamic faults |
59 | Jaehong Ko, Wookwan Lee, Soo-Won Kim |
2.5GHz PLL with current matching charge-pump for 10Gbps transmitter design. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
jitter, PLL, output buffer, charge-pump |
59 | Vineela Manne, Akhilesh Tyagi |
An Adiabatic Charge Pump Based Charge Recycling Design Style. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Ching-Hwa Cheng |
Adaptable Voltage Scan Testing of Charge-Sharing Faults for Domino Circuits. |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
56 | Won Hyo Lee, Jun Dong Cho, Sung Dae Lee |
A High Speed and Low Power Phase-Frequency Detector and Charge - pump. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
56 | Haluk Konuk, F. Joel Ferguson, Tracy Larrabee |
Charge-based fault simulation for CMOS network breaks. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
53 | Dan Li, Tingcun Wei, Wei Wu |
A novel charge recycler for TFT-LCD source driver IC. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
dot-inversion, source driver, space correlation, time correlation, TFT-LCD, charge recycler |
53 | Bartomeu Alorda, Vicent Canals, Ivan de Paúl, Jaume Segura 0001 |
A BIST-based Charge Analysis for Embedded Memories. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
Current based testing, charge based testing, Embedded memories test, built-in current monitors |
52 | Cameron T. Charles, David J. Allstot |
A buffered charge pump with zero charge sharing. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
49 | Farhad Alibeygi Parsan, Ahmad Ayatollahi |
A comparator-based switched-capacitor integrator using a new charge control circuit. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
|
49 | Jin He 0003, Xuemei Xi, Mansun Chan, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu |
A Non-Charge-Sheet Based Analytical Model of Undoped Symmetric Double-Gate MOSFETs Using SPP Approach. |
ISQED |
2004 |
DBLP DOI BibTeX RDF |
|
49 | Kuo-Hsing Cheng, Chung-Yu Chang, Chia-Hung Wei |
A CMOS charge pump for sub-2.0 V operation. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
49 | Ching-Hwa Cheng, Jinn-Shyan Wang, Shih-Chieh Chang, Wen-Ben Jone |
Low-Speed Scan Testing of Charge-Sharing Faults for CMOS Domino Circuits. |
DFT |
2000 |
DBLP DOI BibTeX RDF |
|
49 | Anirudh Devgan |
Transient simulation of integrated circuits in the charge-voltage plane. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
49 | Anirudh Devgan |
Efficient and accurate transient simulation in charge-voltage plane. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
|
47 | Janusz Rzeszut, Bozena Kaminska, Yvon Savaria |
A new method for testing mixed analog and digital circuits. |
Asian Test Symposium |
1995 |
DBLP DOI BibTeX RDF |
charge-coupled device circuits, mixed analog and digital circuits, analog test points, simultaneous observation, analog multiplexer, signal path, analog shift register, input voltage, integrated circuit testing, shift registers, mixed analogue-digital integrated circuits, charge coupled device, analogue processing circuits |
46 | Gail S. Blaustein, Frederick D. Lewis, Alexander L. Burin, Rajesh Shrestha |
The Kinetics of Charge Recombination in DNA Hairpins Controlled by Counterions. |
ICCS (2) |
2009 |
DBLP DOI BibTeX RDF |
DNA hairpin, charge transfer, counterions |
46 | Kimish Patel, Wonbok Lee, Massoud Pedram |
In-order pulsed charge recycling in off-chip data buses. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
data buses, power, charge recycling |
46 | Fred W. Glover |
Parametric Ghost Image Processes for Fixed-Charge Problems: A Study of Transportation Networks. |
J. Heuristics |
2005 |
DBLP DOI BibTeX RDF |
fixed-charge problems, ghost image processes, networks, tabu search, generalized networks |
46 | Ching-Hwa Cheng, Wen-Ben Jone, Jinn-Shyan Wang, Shih-Chieh Chang |
Charge sharing fault analysis and testing for CMOS domino logic circuits. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
charge sharing fault analysis, CMOS domino logic circuits, domino logic design, sensitivity measurement, domino gate, fault diagnosis, logic testing, delays, delay, automatic testing, CMOS logic circuits, logic gates, test vectors |
43 | Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Krishnan Sivasubramanian, Eric Rotenberg |
ZettaRAM: A Power-Scalable DRAM Alternative through Charge-Voltage Decoupling. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
memory technology, dynamic voltage scaling, DRAM, molecular electronics, molecular memory, low-power memory |
43 | Xiang Fang, Jack Wills, John J. Granacki, Jeff LaCoss, Artak Arakelian, James D. Weiland |
Novel Charge-Metering Stimulus Amplifier for Biomimetic Implantable Prosthesis. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
43 | Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar |
A CMOS Low Voltage Charge Pump. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
43 | Ka-Ming Keung, Akhilesh Tyagi |
SRAM CP: A Charge Recycling Design Schema for SRAM. |
PATMOS |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Alessandro Cabrini, Laura Gobbi, Guido Torelli |
Theoretical and experimental analysis of Dickson charge pump output resistance. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Miguel Ángel Cristín Valdez, Jaime Adrián Orozco Valera, María Jojutla Olimpia Pacheco Arteaga |
Estimating Soc in Lead-Acid Batteries Using Neural Networks in a Microcontroller-Based Charge-Controller. |
IJCNN |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Keerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton |
Test vector generation for charge sharing failures in dynamic logic. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
43 | Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton |
Testing of Dynamic Logic Circuits Based on Charge Sharing. |
VTS |
2001 |
DBLP DOI BibTeX RDF |
|
43 | Bing J. Sheu, Wen-Jay Hsu, P. K. Ko |
An MOS transistor charge model for VLSI design. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1988 |
DBLP DOI BibTeX RDF |
|
40 | Haluk Konuk, F. Joel Ferguson |
An unexpected factor in testing for CMOS opens: the die surface. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
surface phenomena, electric charge, CMOS opens, die surface, RC interconnect, HSPICE simulations, trapped charge, floating gates, VLSI, integrated circuit testing, CMOS integrated circuits, integrated circuit modelling, circuit model |
40 | Robert A. Boie, Ingemar J. Cox |
An Analysis of Camera Noise. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1992 |
DBLP DOI BibTeX RDF |
camera noise, ionization sensors, vidicon cameras, direction-dependent stationary electronic noise sources, computer vision, computer vision, noise, cameras, adaptive signal processing, charge-coupled device, charge-coupled devices |
40 | Steffen Rebennack, Artyom G. Nahapetyan, Panos M. Pardalos |
Bilinear modeling solution approach for fixed charge network flow problems. |
Optim. Lett. |
2009 |
DBLP DOI BibTeX RDF |
Fixed charge network flow problem, Exact formulation, Bilinear modeling, Concave minimization |
40 | André Mansano, Jader A. De Lima, Jacobus W. Swart |
A compact fast-response charge-pump gate driver. |
SBCCI |
2009 |
DBLP DOI BibTeX RDF |
gate driver, switched-capacitor converters, charge-pump |
40 | Tian Xia, Stephen Wyatt |
High Output Resistance and Wide Swing Voltage Charge Pump Circuit. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Wide Swing, output resistance, current match, charge pump |
40 | Chen-Wei Lin, Jiun-Lang Huang |
A Built-In TFT Array Charge-Sensing Technique for System-on-Panel Displays. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
TFT array, charge sensing, system-on-panel, built-in self-test, LTPS |
40 | Chi-Hao Wu 0001 |
Multi-Phase Charge Pump Generating Positive and Negative High Voltages for TFT-LCD Gate Driving. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
regulated charge pump, TFT-LCD gate driver |
40 | Wen Chang Huang, Jin Chang Cheng, Po Chih Liou |
A Charge Pump Circuit - Cascading High-Voltage Clock Generator. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
voltage doubler, Charge pump |
40 | Chun Yu Cheng, Ka Nang Leung, Yi Ki Sun, Pui Ying Or |
Design of a Low-Voltage CMOS Charge Pump. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
efficiency, Charge pump |
40 | Keejong Kim, Hamid Mahmoodi, Kaushik Roy 0001 |
A low-power SRAM using bit-line charge-recycling technique. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
write margin, write power, low power, process variation, SRAM, charge-recycling |
40 | Zhiyu Liu, Volkan Kursun |
Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
Multi-threshold voltage CMOS, gated power, gated ground, sleep switch, subthreshold leakage, charge recycling |
40 | Cathy O'Bryan |
Online and instructor-led technical training: a charge-back model that works! |
SIGUCCS |
2005 |
DBLP DOI BibTeX RDF |
charge back, charters, cost recovery, customer relations, online professional development, project charters, technical training, training courses, training sessions, workforce training, project management, online learning, customer service, professional development |
40 | Thomas Popp, Stefan Mangard |
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints. |
CHES |
2005 |
DBLP DOI BibTeX RDF |
Hardware Countermeasures, MDPL, Masking Logic, Dual-Rail Pre-Charge Logic, DPA, Side-Channel Analysis |
40 | Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda |
A Charge Correction Cell for FGMOS-Based Circuits. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
FGMOS analog circuits, Floating gate charge correction |
39 | Ka-Ming Keung, Vineela Manne, Akhilesh Tyagi |
A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Wing-Hung Ki, Feng Su, Chi-Ying Tsui |
Charge redistribution loss consideration in optimal charge pump design. |
ISCAS (2) |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Antonio Fernández-Caballero 0001, José Mira, Ana E. Delgado, Miguel Angel Fernández, María T. López |
Lateral Interaction in Accumulative Computation: Motion-Based Grouping Method. |
BVAI |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Andrew T. Yang, Yu Liu, Jack T. Yao |
An efficient nonquasi-static diode model for circuit simulation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1994 |
DBLP DOI BibTeX RDF |
|
36 | Mustafa Keskin, Nurcan Keskin |
A Tuning Technique for Switched-Capacitor Circuits. |
AHS |
2006 |
DBLP DOI BibTeX RDF |
Switched capacitor, settling, on-resistance, switch, transfer function, tuning, charge |
36 | Zhimin Chen, Yujie Zhou |
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage. |
CHES |
2006 |
DBLP DOI BibTeX RDF |
Gate Level Masking, DRSL, Dual-Rail, Pre-charge, Side Channel Attacks, DPA |
36 | Zhenyu Yang, Zhangwen Tang, Hao Min |
A fully differential charge pump with accurate current matching and rail-to-rail common-mode feedback circuit. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Jun Tomisawa, Kazuyasu Nishikawa, Satoshi Yamakawa |
Low-current consumption CMOS comparator using charge-storage amplifier for A/D converters. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Linzhong Liu, Xinfeng Yang, Haibo Mu, Yonglan Jiao |
The Fuzzy Fixed Charge Transportation Problem and Genetic Algorithm. |
FSKD (5) |
2008 |
DBLP DOI BibTeX RDF |
|
36 | Maurits Ortmanns |
Charge Balancing in Functional Electrical Stimulators: A Comparative Study. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
36 | Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi |
A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
36 | Hui Shao, Chi-Ying Tsui, Wing-Hung Ki |
A charge based computation system and control strategy for energy harvesting applications. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Laura Gobbi, Alessandro Cabrini, Guido Torelli |
Impact of parasitic elements on CMOS charge pumps: a numerical analysis. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Kyung-Soo Ha, Lee-Sup Kim |
Charge-pump reducing current mismatch in DLLs and PLLs. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
36 | Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou |
Charge-Recovery Computing on Silicon. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Energy-recovering circuits, resonant systems, energy efficient computing, voltage scaling, reversible logic, adiabatic computing |
36 | R. Iris Bahar, Hui-Yuan Song, Kundan Nepal, Joel Grodstein |
Symbolic failure analysis of complex CMOS circuits due to excessive leakage current and charge sharing. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
36 | David Elata, Vitaly Leus |
Switching time, impact velocity and release response, of voltage and charge driven electrostatic switches. |
ICMENS |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Mohammad R. Hoque, T. Ahmad, Todd R. McNutt, H. Alan Mantooth, Mohammad M. Mojarradi |
Design technique of an on-chip, high-voltage charge pump in SOI. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Yuan Yao, Yin Shi, Foster F. Dai |
A novel low-power input-independent MOS AC/DC charge pump. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Mark Hooper, Matt Kucic, Paul E. Hasler |
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits. |
ISCAS (1) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Mohammad M. Ahmadi, Graham A. Jullien |
A new CMOS charge pump for low voltage applications. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Jin He 0003, Jane Xi, Mansun Chan, Hui Wan 0003, Mohan V. Dunga, Babak Heydari, Ali M. Niknejad, Chenming Hu |
Charge-Based Core and the Model Architecture of BSIM5. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Keejong Kim, Chris H. Kim, Kaushik Roy 0001 |
TFT-LCD Application Specific Low Power SRAM Using Charge-Recycling Technique. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
36 | Maria C. Velez, Marilyn Tremaine, Aleksandra Sarcevic, Bogdan Dorohonceanu, Allan Meng Krebs, Ivan Marsic |
"Who's in charge here?" communicating across unequal computer platforms. |
ACM Trans. Comput. Hum. Interact. |
2004 |
DBLP DOI BibTeX RDF |
Collaboration differences, mobile computing, heterogeneous computing, media effects |
36 | Byung-Do Yang, Lee-Sup Kim |
A low-power charge-recycling ROM architecture. |
IEEE Trans. Very Large Scale Integr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Shih-Chieh Chang, Ching-Hwa Cheng, Wen-Ben Jone, Shin-De Lee, Jinn-Shyan Wang |
Charge-sharing alleviation and detection for CMOS domino circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
36 | Ryan Perigny, Un-Ku Moon, Gabor C. Temes |
Area efficient CMOS charge pump circuits. |
ISCAS (1) |
2001 |
DBLP DOI BibTeX RDF |
|
36 | W. Rhee |
Design of high-performance CMOS charge pumps in phase-locked loops. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
36 | Shankar Pennathur, Harry H. L. Kwok |
Simulation of charge transfer in GaAs Cermet-Gate CCDs. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
|
36 | Karem A. Sakallah, Yao-Tsung Yen, Steve S. Greenberg |
A first-order charge conserving MOS capacitance model. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1990 |
DBLP DOI BibTeX RDF |
|
36 | Hiroo Masuda, Yukio Aoki, Jun'ichi Mano, Osamu Yamashiro |
MOSTSM: a physically based charge conservative MOSFET model. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1988 |
DBLP DOI BibTeX RDF |
|
36 | Mark B. Johnson |
You cannot lead a horse to water: taking charge of microcomputer support. |
SIGUCCS |
1987 |
DBLP DOI BibTeX RDF |
|
34 | Parthasarathy P. Tirumalai, Jon T. Butler |
Minimization Algorithms for Multiple-Valued Programmable Logic Arrays. |
IEEE Trans. Computers |
1991 |
DBLP DOI BibTeX RDF |
minimisation algorithms, multiple-valued programmable logic arrays, sum-of products, MIN operation, random-symmetric functions, constrained implicant sets, charge-coupled device circuits, performance, CMOS, heuristic algorithms, many-valued logics, minimisation, CMOS integrated circuits, backtracking, logic arrays, tree search, multiple-valued functions, charge-coupled device |
34 | Mostafa I. H. Abd-El-Barr, Zvonko G. Vranesic |
Cost Reduction in the CCD Realization of MVMT Function. |
IEEE Trans. Computers |
1990 |
DBLP DOI BibTeX RDF |
multivalue multithreshold functions, CCD realization, overflow circuit, truncated difference operation, metal line, charge replication, charge-coupled device circuits, many-valued logics, cost effectiveness |
33 | Sumanth Amarchinta, Dhireesha Kudithipudi |
Performance enhancement of subthreshold circuits using substrate biasing and charge-boosting buffers. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
charge-boosters, subthreshold design, biasing |
33 | Bingjun Xiao, Yiyu Shi 0001, Lei He 0001 |
A universal state-of-charge algorithm for batteries. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
state of charge, modeling, battery, circuit analysis |
33 | Min Huang 0001, Hongyu Dong, Xingwei Wang 0001, Bing-lin Zheng, W. H. Ip |
Guided variable neighborhood harmony search for integrated charge planning in primary steelmaking processes. |
GEC Summit |
2009 |
DBLP DOI BibTeX RDF |
integrated charge planning, combinatorial optimization, variable neighborhood search, harmony search |
33 | Christian Behrens, Ole Bischoff, Steffen Paul, Rainer Laur |
An effective method for state-of-charge estimation in wireless sensor networks. |
SenSys |
2007 |
DBLP DOI BibTeX RDF |
cluster topology, state-of-charge, wireless sensor network, load balancing, implementation, battery modeling |
33 | Linga Reddy Cenkeramaddi, Tajeshwar Singh, Trond Ytterdal |
Self-biased charge sampling amplifier in 90nm CMOS for medical ultrasound imaging. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
CMUT-CMOS, analog front-end for CMUTs, charge sampling, sampling, CSA |
33 | Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram |
Charge recycling in MTCMOS circuits: concept and analysis. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
low power design, MTCMOS, charge recycling |
33 | Fred W. Glover, Hanif D. Sherali |
Some Classes of Valid Inequalities and Convex Hull Characterizations for Dynamic Fixed-Charge Problems under Nested Constraints. |
Ann. Oper. Res. |
2005 |
DBLP DOI BibTeX RDF |
dynamic fixed-charge problems, capacitated lot-sizing, convex hull, valid inequalities, reformulation-linearization technique |
33 | Aaron A. Klammer, Christine C. Wu, Michael J. MacCoss, William Stafford Noble |
Peptide Charge State Determination for Low-Resolution Tandem Mass Spectra. |
CSB |
2005 |
DBLP DOI BibTeX RDF |
charge state, machine learning, support vector machine, proteomics, mass spectrometry |
33 | Teodor Gabriel Crainic, Bernard Gendron, Geneviève Hernu |
A Slope Scaling/Lagrangean Perturbation Heuristic with Long-Term Memory for Multicommodity Capacitated Fixed-Charge Network Design. |
J. Heuristics |
2004 |
DBLP DOI BibTeX RDF |
slope scaling, Lagrangean heuristic, multicommodity capacitated fixed-charge network design, long-term memory |
33 | Takahiro Hanyu, Hiromitsu Kimura, Michitaka Kameyama |
DRAM-Cell-Based Multiple-Valued Logic-in-Memory VLSI with Charge Addition and Charge Storage. |
ISMVL |
2000 |
DBLP DOI BibTeX RDF |
logic-in-memory, communication bottleneck, threshold operation, functional pass gate, DRAM, multiple-valued logic |
33 | Yajie Chen, Liam McDaid, Steve Hall, Peter M. Kelly |
A programmable facilitating synapse device. |
IJCNN |
2008 |
DBLP DOI BibTeX RDF |
|
32 | Manel Rebhi, Kais Hassan, Kosai Raoof, Pascal Chargé |
Deep Learning for a Fair Distance-based SCMA Detector. |
WCNC |
2022 |
DBLP DOI BibTeX RDF |
|
32 | Zhe Fu, Pascal Chargé, Yide Wang |
Rearranged coprime array to increase degrees of freedom and reduce mutual coupling. |
Signal Process. |
2021 |
DBLP DOI BibTeX RDF |
|
32 | Manel Rebhi, Kais Hassan, Kosai Raoof, Pascal Chargé |
Sparse Code Multiple Access: Potentials and Challenges. |
IEEE Open J. Commun. Soc. |
2021 |
DBLP DOI BibTeX RDF |
|
32 | Xiao Yang 0007, Yide Wang, Pascal Chargé |
Improved Coprime Linear Array Configuration for Moving Platform in DOA Estimation. |
IEEE Commun. Lett. |
2021 |
DBLP DOI BibTeX RDF |
|
32 | Xiao Yang 0007, Yide Wang, Pascal Chargé |
Hole Locations and a Filling Method for Coprime Planar Arrays for DOA Estimation. |
IEEE Commun. Lett. |
2021 |
DBLP DOI BibTeX RDF |
|
32 | Jie Li 0039, Fangjiong Chen, Yide Wang, Pascal Chargé, Fei Ji, Hua Yu 0001 |
Spatial Spectrum Estimation of Incoherently Distributed Sources Based on Low-Rank Matrix Recovery. |
IEEE Trans. Veh. Technol. |
2020 |
DBLP DOI BibTeX RDF |
|
32 | Zhe Fu, Pascal Chargé, Yide Wang |
Multi-rate coprime sampling for frequency estimation with increased degrees of freedom. |
Signal Process. |
2020 |
DBLP DOI BibTeX RDF |
|
32 | Zhe Fu, Pascal Chargé, Yide Wang |
A Virtual Nested MIMO Array Exploiting Fourth Order Difference Coarray. |
IEEE Signal Process. Lett. |
2020 |
DBLP DOI BibTeX RDF |
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