Search results for "complexity-effective"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
35	Angshuman Parashar, Sudhanva Gurumurthi, Anand Sivasubramaniam	A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy.	ISCA	2004	DBLP DOI BibTeX RDF	Complexity-effective design, Temporal Redundancy, Instruction Reuse
30	Carmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero	A Complexity-Effective Simultaneous Multithreading Architecture.	ICPP	2005	DBLP DOI BibTeX RDF	Complexity-Effective, Heterogeneity-Awareness, Mapping Policies, Clustering, CMP, SMT
20	Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero	Branch predictor guided instruction decoding.	PACT	2006	DBLP DOI BibTeX RDF	complexity-effective, instruction decoding, branch predictor
20	Rajesh Vivekanandham, Bharadwaj S. Amrutur, R. Govindarajan	A scalable low power issue queue for large instruction window processors.	ICS	2006	DBLP DOI BibTeX RDF	complexity-effective architecture, wakeup logic, low-power architecture, issue logic
20	Ravi Bhargava, Lizy Kurian John	Latency and energy aware value prediction for high-frequency processors.	ICS	2002	DBLP DOI BibTeX RDF	complexity-effective design, trace cache processors, low power, data speculation
20	Dan Ernst, Todd M. Austin	Efficient Dynamic Scheduling Through Tag Elimination.	ISCA	2002	DBLP DOI BibTeX RDF	complexity-effective architecture, last-tag prediction, dynamic scheduling, low-power architecture
20	Ramon Canal, Antonio González 0001	Reducing the complexity of the issue logic.	ICS	2001	DBLP DOI BibTeX RDF	complexity-effective design, instruction issue logic, wide-issue superscalar, out-of-order issue
15	Yu-Ting Kuo, Tay-Jyi Lin, Wei-Han Chang, Yueh-Tai Li, Chih-Wei Liu, Shuenn-Tsong Young	Complexity-effective auditory compensation for digital hearing aids.	ISCAS	2008	DBLP DOI BibTeX RDF
15	Michael Sung, Ronny Krashinsky, Krste Asanovic	Multithreading decoupled architectures for complexity-effective general purpose computing.	SIGARCH Comput. Archit. News	2001	DBLP DOI BibTeX RDF
13	George L. Yuan, Ali Bakhoda, Tor M. Aamodt	Complexity effective memory access scheduling for many-core accelerator architectures.	MICRO	2009	DBLP DOI BibTeX RDF	graphics processors, on-chip interconnection networks, memory controller
10	Kirandeep Chahal, Tillal Eldabi	Applicability of hybrid simulation to different modes of governance in UK healthcare.	WSC	2008	DBLP DOI BibTeX RDF
10	Tongwei Zhang, Guangjie Han, Lei Yan, Yan Peng 0001	Low-Complexity Effective Sound Velocity Algorithm for Acoustic Ranging of Small Underwater Mobile Vehicles in Deep-Sea Internet of Underwater Things.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
10	Reoma Matsuo, Toru Koizumi 0001, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya	TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA.	DATE	2023	DBLP DOI BibTeX RDF
10	Amund Bergland Kvalsvik, Pavlos Aimoniotis, Stefanos Kaxiras, Magnus Själander	Doppelganger Loads: A Safe, Complexity-Effective Optimization for Secure Speculation Schemes.	ISCA	2023	DBLP DOI BibTeX RDF
10	Young-Hwan You, Yong-An Jung, Sung-Chan Choi, Intae Hwang	Complexity-Effective Sequential Detection of Synchronization Signal for Cellular Narrowband IoT Communication Systems.	IEEE Internet Things J.	2021	DBLP DOI BibTeX RDF
10	Young-Hwan You, Jong-Hong Park, Il-Yeup Ahn	Complexity Effective Sequential Detection of Secondary Synchronization Signal for 5G New Radio Communication Systems.	IEEE Syst. J.	2021	DBLP DOI BibTeX RDF
10	Yong-An Jung, Young-Hwan You	Complexity Effective Sampling Frequency Offset Estimation Method for OFDM-Based HomePlug Green PHY Systems.	Symmetry	2018	DBLP DOI BibTeX RDF
10	Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, Zhiru Zhang	ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests.	ICCAD	2015	DBLP DOI BibTeX RDF
10	Mohammad Khavari Tavana, Divya Pathak, Mohammad Hossein Hajkazemi, Maria Malik, Ioannis Savidis, Houman Homayoun	Realizing complexity-effective on-chip power delivery for many-core platforms by exploiting optimized mapping.	ICCD	2015	DBLP DOI BibTeX RDF
10	Seung-Hun Kim, Dongmin Choi, Won Woo Ro, Jean-Luc Gaudiot	Complexity-Effective Contention Management with Dynamic Backoff for Transactional Memory Systems.	IEEE Trans. Computers	2014	DBLP DOI BibTeX RDF
10	Won-Jae Shin, Hyun Yang, Seongjoo Lee, Young-Hwan You	Complexity Effective Integer Frequency Offset and Sector Cell Detection Scheme for LTE Downlink System.	Wirel. Pers. Commun.	2014	DBLP DOI BibTeX RDF
10	Kuo-Chiang Chang, Ching-Hao Lin, Chih-Wei Liu	Complexity-effective implementation of programmable FIR filters using simplified canonic signed digit multiplier.	VLSI-DAT	2014	DBLP DOI BibTeX RDF
10	Zichao Xie, Dong Tong 0001, Mingkai Huang, Qinqing Shi, Xu Cheng 0001	SWIP Prediction: Complexity-Effective Indirect-Branch Prediction Using Pointers.	J. Comput. Sci. Technol.	2012	DBLP DOI BibTeX RDF
10	Alberto Ros 0001, Stefanos Kaxiras	Complexity-effective multicore coherence.	PACT	2012	DBLP DOI BibTeX RDF
10	Shyang-Chyun Chen, Chao-Chuan Chen, Wen-Chi Guo, Tay-Jyi Lin, Ching-Wei Yeh	Complexity-effective Hilbert-Huang transform (HHT) IP for embedded real-time applications.	ASP-DAC	2012	DBLP DOI BibTeX RDF
10	Ya-Ting Chang, Kuo-Chiang Chang, Yu-Ting Kuo, Chih-Wei Liu	Complexity-effective auditory compensation with a controllable filter for digital hearing aids.	ASP-DAC	2012	DBLP DOI BibTeX RDF
10	Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iris Bahar, Maurice Herlihy	Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems.	J. Parallel Distributed Comput.	2010	DBLP DOI BibTeX RDF
10	Görkem Asilioglu, Emine Merve Kaya, Oguz Ergin	Complexity-Effective Rename Table Design for Rapid Speculation Recovery.	ARCS	2010	DBLP DOI BibTeX RDF
10	Kuo-Chiang Chang, Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu	Complexity-effective dynamic range compression for digital hearing aids.	ISCAS	2010	DBLP DOI BibTeX RDF
10	Aneesh Aggarwal	Complexity Effective Bypass Networks.	Trans. High Perform. Embed. Archit. Compil.	2009	DBLP DOI BibTeX RDF
10	Salvador Petit Marti, Julio Sahuquillo Borrás, Pedro Juan López Rodríguez, Rafael Ubal Tena, José Duato Marín	A Complexity-Effective Out-of-Order Retirement Microarchitecture.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
10	Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero	DIA: A Complexity-Effective Decoding Architecture.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
10	Won Woo Ro, Jean-Luc Gaudiot	A complexity-effective microprocessor design with decoupled dispatch queues and prefetching.	Parallel Comput.	2009	DBLP DOI BibTeX RDF
10	Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao	Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	register organization, VLIW, digital signal processor, micro-architecture, instruction encoding
10	Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai	A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	simulator, FPGA, prototype, multiprocessor, multicore, emulator
10	Ian Michael Caulfield	Complexity-effective superscalar embedded processors using instruction-level distributed processing.		2007	RDF
10	Olivier Rochecouste, Gilles Pokam, André Seznec	A case for a complexity-effective, width-partitioned microarchitecture.	ACM Trans. Archit. Code Optim.	2006	DBLP DOI BibTeX RDF	Power analysis
10	Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe	Reunion: Complexity-Effective Multicore Redundancy.	MICRO	2006	DBLP DOI BibTeX RDF
10	Jessica H. Tseng	Banked microarchitectures for complexity-effective superscalar microprocessors.		2006	RDF
10	Gurhan Kucuk, Dmitry Ponomarev 0001, Oguz Ergin, Kanad Ghose	Complexity-Effective Reorder Buffer Designs for Superscalar Processors.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
10	Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas Moshovos	Accurate and Complexity-Effective Spatial Pattern Prediction.	HPCA	2004	DBLP DOI BibTeX RDF
10	Pradeep Rao, S. K. Nandy 0001, M. N. V. Satya Kiran	Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures.	Asia-Pacific Computer Systems Architecture Conference	2003	DBLP DOI BibTeX RDF
10	M. N. V. Satya Kiran, M. N. Jayram, Pradeep Rao, S. K. Nandy 0001	A complexity effective communication model for behavioral modeling of signal processing applications.	DAC	2003	DBLP DOI BibTeX RDF
10	André Seznec, Eric Toullec, Olivier Rochecouste	Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors.	MICRO	2002	DBLP DOI BibTeX RDF
10	Subbarao Palacharla, Norman P. Jouppi, James E. Smith 0001	Complexity-Effective Superscalar Processors.	ISCA	1997	DBLP DOI BibTeX RDF
7	Rajeev Balasubramonian	Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures.	ICS	2004	DBLP DOI BibTeX RDF	communication-bound processors, effective address and memory dependence prediction, processor, data prefetch, distributed caches, clustered microarchitectures
6	Yi Ma, Hongliang Gao, Martin Dimitrov, Huiyang Zhou	Optimizing Dual-Core Execution for Power Efficiency and Transient-Fault Recovery.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Multiple data stream architectures, fault tolerance, low-power design
4	Pedro Chaparro, José González 0002, Grigorios Magklis, Qiong Cai, Antonio González 0001	Understanding the Thermal Implications of Multi-Core Architectures.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management
4	María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas	Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors.	ACM Trans. Archit. Code Optim.	2005	DBLP DOI BibTeX RDF	Caching and buffering support, memory hierarchies, shared-memory multiprocessors, thread-level speculation, coherence protocol
4	María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas	Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors.	HPCA	2003	DBLP DOI BibTeX RDF
4	Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors.	HiPC	2003	DBLP DOI BibTeX RDF
3	Arrvindh Shriraman, Sandhya Dwarkadas	Sentry: light-weight auxiliary memory access control.	ISCA	2010	DBLP DOI BibTeX RDF	sentry, access control, multiprocessors, safety, cache coherence, memory protection, protection domains
3	Hui Wang, Rama Sangireddy, Sandeep Baldawa	Optimizing Instruction Scheduling through Combined In-Order and O-O-O Execution in SMT Processors.	IEEE Trans. Parallel Distributed Syst.	2009	DBLP DOI BibTeX RDF
3	Ronny Krashinsky, Christopher Batten, Krste Asanovic	Implementing the scale vector-thread processor.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	hybrid C++/Verilog simulation, iterative VLSI design flow, procedural datapath pre-placement, vector-thread processors, multithreaded processors, Vector processors
3	Alejandro García, Oliverio J. Santana, Enrique Fernández, Pedro Medina, Mateo Valero	LPA: A First Approach to the Loop Processor Architecture.	HiPEAC	2008	DBLP DOI BibTeX RDF
3	Grzegorz M. Wójcik, Wieslaw A. Kaminski, Piotr Matejanka	Self-organised Criticality in a Model of the Rat Somatosensory Cortex.	PaCT	2007	DBLP DOI BibTeX RDF
3	Yi Ma, Hongliang Gao, Huiyang Zhou	Using Indexing Functions to Reduce Conflict Aliasing in Branch Prediction Tables.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Processor architectures
3	Dennis Abts, Steve Scott, David J. Lilja	So Many States, So Little Time: Verifying Memory Coherence in the Cray X1.	IPDPS	2003	DBLP DOI BibTeX RDF