Search results for "coprocessing"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
48	John Patrick McGregor, Ruby B. Lee	Protecting cryptographic keys and computations via virtual secure coprocessing.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
47	Chen Huang 0005, Frank Vahid	Server-side coprocessor updating for mobile devices with FPGAs.	FPGA	2010	DBLP DOI BibTeX RDF	coprocessing, fpgas, dynamic optimization, acceleration
47	Richard E. Smith	Cost profile of a highly assured, secure operating system.	ACM Trans. Inf. Syst. Secur.	2001	DBLP DOI BibTeX RDF	LOCK (Logical Coprocessing Kernel), security kernels
39	Hankook Jang, Sang-Hwa Chung, Soo-Cheol Oh	Implementation of a Hybrid TCP/IP Offload Engine Prototype.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF
39	Shan Jiang, Sean W. Smith, Kazuhiro Minami	Securing Web Servers against Insider Attack .	ACSAC	2001	DBLP DOI BibTeX RDF
39	Steve Guccione	Run-Time Reconfiguration at Xilinx.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF
29	Teodora Ivanova Petrova, Zhivo Bozhidarov Petrov	Linear Images Coprocessing in Environmental Monitoring.	CompSysTech	2022	DBLP DOI BibTeX RDF
29	Brian M. Sutton, Rafatul Faria, Lakshmi Anirudh Ghantasala, Risi Jaiswal, Kerem Yunus Camsari, Supriyo Datta	Autonomous Probabilistic Coprocessing With Petaflips per Second.	IEEE Access	2020	DBLP DOI BibTeX RDF
29	Brian M. Sutton, Rafatul Faria, Lakshmi Anirudh Ghantasala, Kerem Yunus Camsari, Supriyo Datta	Autonomous Probabilistic Coprocessing with Petaflips per Second.	CoRR	2019	DBLP BibTeX RDF
29	Susumu Mashimo, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi	Zyndroid: An Android platform for software/hardware coprocessing.	FPT	2014	DBLP DOI BibTeX RDF
29	Sebastian Breß	Why it is time for a HyPE: A Hybrid Query Processing Engine for Efficient GPU Coprocessing in DBMS. (PDF / PS)	Proc. VLDB Endow.	2013	DBLP DOI BibTeX RDF
29	Sebastian Breß, Stefan Kiltz, Martin Schäler	Forensics on GPU Coprocessing in Databases - Research Challenges, First Experiments, and Countermeasures.	BTW Workshops	2013	DBLP BibTeX RDF
29	Sebastian Breß, Norbert Siegmund, Ladjel Bellatreche, Gunter Saake	An Operator-Stream-Based Scheduling Engine for Effective GPU Coprocessing.	ADBIS	2013	DBLP DOI BibTeX RDF
29	Guodong Han, Chenggang Zhang, King Tin Lam, Cho-Li Wang	Java with Auto-parallelization on Graphics Coprocessing Architecture.	ICPP	2013	DBLP DOI BibTeX RDF
29	Mark M. Seeger, Stephen D. Wolthusen	Towards Concurrent Data Sampling Using GPU Coprocessing.	ARES	2012	DBLP DOI BibTeX RDF
29	Lothar Stolz, Matthias Ihmig, Walter Stechele	An evaluation on using GPU coprocessing for software radios on a low-cost platform.	DASIP	2012	DBLP BibTeX RDF
29	Carlo Sau, Danilo Pani, Francesca Palumbo, Luigi Raffo	A nature-inspired adaptive floating-point coprocessing system.	DASIP	2012	DBLP BibTeX RDF
29	Sebastian Breß, Felix Beier, Hannes Rauhe, Eike Schallehn, Kai-Uwe Sattler, Gunter Saake	Automatic Selection of Processing Units for Coprocessing in Databases.	ADBIS	2012	DBLP DOI BibTeX RDF
29	Devi Yalamarthy, Joel Coburn, Rajesh Gupta 0001, Glen Edwards, Mark Kelly	Computational Mass Spectrometry in a Reconfigurable Coherent Coprocessing Architecture.	IEEE Des. Test Comput.	2011	DBLP DOI BibTeX RDF
29	Nathan Fabian, Kenneth Moreland, David C. Thompson 0001, Andrew C. Bauer, Patrick Marion, Berk Geveci, Michel E. Rasquin, Kenneth E. Jansen	The ParaView Coprocessing Library: A scalable, general purpose in situ visualization library.	LDAV	2011	DBLP DOI BibTeX RDF
29	François Philipp, Manfred Glesner	A Multi-level Reconfigurable Architecture for a Wireless Sensor Node Coprocessing Unit.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
29	Stephen J. J. Ong, Zahid Abdul Halim	Coprocessing Architecture in System-on-Programmable-Chip for Walk on the Boundary Method to Calculate Capacitance.	DASC	2011	DBLP DOI BibTeX RDF
29	Hankook Jang, Sang-Hwa Chung, Dae-Hyun Yoo	Design and implementation of a protocol offload engine for TCP/IP and remote direct memory access based on hardware/software coprocessing.	Microprocess. Microsystems	2009	DBLP DOI BibTeX RDF
29	Bingsheng He, Mian Lu, Ke Yang, Rui Fang, Naga K. Govindaraju, Qiong Luo 0001, Pedro V. Sander	Relational query coprocessing on graphics processors.	ACM Trans. Database Syst.	2009	DBLP DOI BibTeX RDF
29	Zhoukun Wang, Omar Hammami	C-based hardware-accelerator coprocessing for SOC an quantitative area-performance evaluation.	ICECS	2008	DBLP DOI BibTeX RDF
29	Valery L. Mironov, Tumen N. Chimitdorzhiev, Pavel N. Dagurov, Aleksey V. Dmitriev	Coprocessing of radar coherence and spectral optical data.	IGARSS	2005	DBLP DOI BibTeX RDF
29	Huakai Zhang, Jason Fritts	EBCOT coprocessing architecture for JPEG2000.	VCIP	2004	DBLP DOI BibTeX RDF
29	Art Lew	Nondeterministic dynamic programming on a parallel coprocessing system.	Appl. Math. Comput.	2001	DBLP DOI BibTeX RDF
29	Alex R. Bugeja, W. Yang	A reconfigurable VLSI coprocessing system for the block matching algorithm.	IEEE Trans. Very Large Scale Integr. Syst.	1997	DBLP DOI BibTeX RDF
29	David Greenfield, Caleb Crome, Martin S. Won, Doug Amos	Enhancing fixed point DSP processor performance by adding CPLDs as coprocessing elements.	FPL	1997	DBLP DOI BibTeX RDF
29	Eddy H. Debaere, Jan M. Van Campenhout	Interpretation and instruction path coprocessing.		1990	RDF
29	Eddy H. Debaere	Instruction-path coprocessing to solve some RISC problems.	SIGARCH Comput. Archit. News	1989	DBLP DOI BibTeX RDF
27	John Nickolls, William J. Dally	The GPU Computing Era.	IEEE Micro	2010	DBLP DOI BibTeX RDF	scalable parallel computing, heterogeneous CPU+GPU coprocessing, Tesla GPU architecture, Fermi GPU architecture, NVIDIA, CUDA, GPU computing
27	Chen Huang 0005, Frank Vahid	Transmuting coprocessors: dynamic loading of FPGA coprocessors.	DAC	2009	DBLP DOI BibTeX RDF	coprocessing, FPGAs, online algorithms, dynamic optimization, acceleration, runtime configuration
27	Chen Huang 0005, Frank Vahid	Dynamic coprocessor management for FPGA-enhanced compute platforms.	CASES	2008	DBLP DOI BibTeX RDF	coprocessing, online algorithms., FPGAs, dynamic optimization, acceleration, runtime configuration
27	Paul D. Stachour, Bhavani Thuraisingham	Design of LDV: A Multilevel Secure Relational Database Management System.	IEEE Trans. Knowl. Data Eng.	1990	DBLP DOI BibTeX RDF	classification level, polyinstantiation, type enforcement, multilevel secure relational database management system, secure database system, LDV, Lock Data Views, LOgical Coprocessing Kernel, assured pipelines, query processor, update processor, relational databases, operating system, aggregation, security policy, inference, security of data, LOCK, metadata management, Trusted Computing Base
19	Silvia Franchini, Antonio Gentile, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile	An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra.	DSD	2008	DBLP DOI BibTeX RDF
19	Sergio Barrachina 0001, Maribel Castillo, Francisco D. Igual, Rafael Mayo 0002, Enrique S. Quintana-Ortí	Evaluation and tuning of the Level 3 CUBLAS for graphics processors.	IPDPS	2008	DBLP DOI BibTeX RDF
19	Hankook Jang, Sang-Hwa Chung, Dae-Hyun Yoo	Implementation of an efficient RDMA mechanism tightly coupled with a TCP/IP offload engine.	SIES	2008	DBLP DOI BibTeX RDF
19	Francisco D. Igual, Rafael Mayo 0002, Enrique S. Quintana-Ortí	Attaining High Performance in General-Purpose Computations on Current Graphics Processors.	VECPAR	2008	DBLP DOI BibTeX RDF	general purpose computing on GPU, image processing, high performance, linear algebra, Graphics processors (GPUs)
19	Jer-Min Jou, Yun-Lung Lee, Chen-Yen Lin, Chien-Ming Sun	A Novel Reconfigurable Computation Unit for DSP Applications.	ISVLSI	2007	DBLP DOI BibTeX RDF
19	David A. Bader, Virat Agarwal, Kamesh Madduri	On the Design and Analysis of Irregular Algorithms on the Cell Processor: A Case Study of List Ranking.	IPDPS	2007	DBLP DOI BibTeX RDF
19	Nikolaos G. Bartzoudis, Klaus D. McDonald-Maier	Online monitoring of FPGA-based co-processing engines embedded in dependable workstations.	IOLTS	2007	DBLP DOI BibTeX RDF	FPGAs, error detection, dependable systems, online monitoring
19	Nikolaos G. Bartzoudis, Klaus D. McDonald-Maier	An embedded sensor validation system for adaptive condition monitoring of a wind farms.	AHS	2007	DBLP DOI BibTeX RDF	Sensor validation, FPGAs, embedded systems, adaptive systems, condition monitoring
19	Rajesh Gupta 0001	Programming models and languages for SoC-implemented architectures.	MEMOCODE	2006	DBLP DOI BibTeX RDF
19	Antonio Gentile, Salvatore Segreto, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile, Vincenzo Vullo	CliffoSor: A Parallel Embedded Architecture for Geometric Algebra and Computer Graphics.	CAMP	2005	DBLP DOI BibTeX RDF
19	Tay-Jyi Lin, Chein-Wei Jen	CASCADE - configurable and scalable DSP environment.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
19	Alexandre R. S. Romariz, P. U. A. Ferreira, J. V. Campêlo Jr., Marcio L. Graciano Jr., José C. da Costa	Design of a Hybrid Digital-Analog Neural Co-Processor for Signal Processing.	EUROMICRO	1996	DBLP DOI BibTeX RDF	hybrid digital-analog neural co-processor, digitally-controlled multiplexing, CMOS analog circuits, VLSI, signal processing, VLSI design, multilayer perceptrons, VLSI implementation, hybrid architecture, capacitors, analog multipliers
19	Bradly K. Fawcett, J. Watson	Reconfigurable Processing With Field Programmable Gate Arrays.	ASAP	1996	DBLP DOI BibTeX RDF	reconfigurable processing, internal architecture, computationally-intensive tasks, programmable solution, XC6200 FPGA architecture, SRAM control store, on-chip memory capability, field programmable gate arrays, interconnections, reconfigurable architectures, processors, coprocessors, coprocessors, SRAM chips, SRAM-based field programmable gate arrays
19	Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Naohisa Ohta	Reconfigurable real-time signal transport system using custom FPGAs.	FCCM	1995	DBLP DOI BibTeX RDF
19	Karlheinz Hafner, Hartmut C. Ritter, Thomas M. Schwair, Stefan Wallstab, Michael Deppermann, Jürgen Gessner, Stefan Koesters, Wolf-Dietrich Moeller, Gerd Sandweg	Design and Test of an Integrated Cryptochip.	IEEE Des. Test Comput.	1991	DBLP DOI BibTeX RDF
19	John F. Palmer	The INTEL® 8087 numeric data processor.	AFIPS National Computer Conference	1980	DBLP DOI BibTeX RDF