Search results for "crosstalk"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
126	Mingjing Chen, Alex Orailoglu	Deflecting crosstalk by routing reconsideration through refined signal correlation estimation.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	signal correlation, routing, crosstalk
112	Prashant Saxena, C. L. Liu 0001	A postprocessing algorithm for crosstalk-driven wire perturbation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
110	Zheng Rong Yang	Crosstalk and Signalling Pathway Complexity - A Case Study on Synthetic Models.	HAIS	2008	DBLP DOI BibTeX RDF	signalling pathways, gene expression order, Crosstalk, differential equations, transcription, degradation, steady-state analysis
110	Xiaoliang Bai, Sujit Dey	High-level Crosstalk Defect Simulation for System-on-Chip Interconnects.	VTS	2001	DBLP DOI BibTeX RDF	System-on-Chip, Crosstalk, Interconnect test, Defect simulation, High level
108	Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier	Modeling of Crosstalk Fault in Defective Interconnects.	PATMOS	2006	DBLP DOI BibTeX RDF	defect-based-crosstalk fault model, signal integrity losses, aggres-sor-victim, ABCD-model, crosstalk-hazards
103	Iris Hui-Ru Jiang, Song-Ra Pan, Yao-Wen Chang, Jing-Yang Jou	Reliable crosstalk-driven interconnect optimization.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	post-layout optimization, VLSI, interconnect, lagrangian relaxation
103	Tianxiong Xue, Ernest S. Kuh, Dongsheng Wang 0012	Post global routing crosstalk synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
102	Shahin Nazarian, Massoud Pedram, Emre Tuncer	An empirical study of crosstalk in VDSM technologies.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	automatic test pattern generation (ATPG) tool, crosstalk induced slowdown and speedup, transition time, static timing analysis (STA), skew
95	Yi Zhao, Sujit Dey	Fault-coverage analysis techniques of crosstalk in chip interconnects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
93	Narender Hanchate, Nagarajan Ranganathan	A game-theoretic framework for multimetric optimization of interconnect delay, power, and crosstalk noise during wire sizing.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	Game theory, transmission lines, crosstalk noise, interconnect models, wire sizing, interconnect delay
87	Xiaoliang Bai, Sujit Dey	High-level crosstalk defect Simulation methodology for system-on-chip interconnects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
87	Tzyy-Kuen Tien, Shih-Chieh Chang, Tong-Kai Tsai	Crosstalk alleviation for dynamic PLAs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
85	Sachin Shrivastava, Harindranath Parameswaran	Statistical Crosstalk Noise Analysis Using First Order Parameterized Approach for Aggressor Grouping.	ISQED	2008	DBLP DOI BibTeX RDF	statistical crosstalk, aggressor grouping
85	Narender Hanchate, Nagarajan Ranganathan	Simultaneous Interconnect Delay and Crosstalk Noise Optimization through Gate Sizing Using Game Theory.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Game theory, gate sizing, transmission lines, crosstalk noise, interconnect models, interconnect delay
81	Jiaxing Sun, Yun Zheng, Qing Ye, Tianchun Ye 0001	Worst-Case Crosstalk Noise Analysis Based on Dual-Exponential Noise Metrics.	VLSI Design	2005	DBLP DOI BibTeX RDF	crosstalk noise metrics, peak noise window, worst-case crosstalk noise, crosstalk noise
79	Ferdi A. Smit, Robert van Liere, Bernd Froehlich 0001	Non-Uniform Crosstalk Reduction for Dynamic Scenes.	VR	2007	DBLP DOI BibTeX RDF
79	Michele Favalli, Cecilia Metra	TMR voting in the presence of crosstalk faults at the voter inputs.	IEEE Trans. Reliab.	2004	DBLP DOI BibTeX RDF
79	Jinjun Xiong, Lei He 0001	Full-chip routing optimization with RLC crosstalk budgeting.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
79	Tilmann Stöhr, Markus Alt, Asmus Hetzel, Jürgen Koehl	Analysis, reduction and avoidance of crosstalk on VLSI chips.	ISPD	1998	DBLP DOI BibTeX RDF
77	Yiyuan Xie, Mahdi Nikdast, Jiang Xu 0001, Wei Zhang 0012, Qi Li 0013, Xiaowen Wu, Yaoyao Ye, Xuan Wang 0001, Weichen Liu	Crosstalk noise and bit error rate analysis for optical network-on-chip.	DAC	2010	DBLP DOI BibTeX RDF	optical network-on-chip, crosstalk, BER, SNR
77	Peng-Yang Hung, Ying-Shu Lou, Yih-Lang Li	Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing.	ISQED	2008	DBLP DOI BibTeX RDF	Shield insertion, track routing, crosstalk optimization, global routing
77	Chen Yu, Yasushi Inoguchi, Susumu Horiguchi	Overall Blocking Behavior Analysis on Banyan-Based Optical Switching Networks Under Crosstalk Constraint.	NPC	2007	DBLP DOI BibTeX RDF	vertical stacking optical banyan, degree of crosstalk, blocking probability, banyan networks, Optical switching networks
77	Yici Cai, Bin Liu 0007, Yan Xiong, Qiang Zhou 0001, Xianlong Hong	Priority-Based Routing Resource Assignment Considering Crosstalk.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	track reservation, routing, VLSI, crosstalk, resource assignment
77	Natasha Young, Zheng Rong Yang	Multivariate Crosstalk Models.	IDEAL	2006	DBLP DOI BibTeX RDF	Multivariate models, crosstalk, systems biology
77	Paul Winward, David E. Goldberg	Fluctuating crosstalk, deterministic noise, and GA scalability.	GECCO	2006	DBLP DOI BibTeX RDF	deterministic noise, fluctuating crosstalk, genetic algorithm, scalability, problem difficulty
77	Hailong Yao, Yici Cai, Qiang Zhou 0001, Xianlong Hong	Crosstalk-Aware Routing Resource Assignment.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	track/layer assignment, routing, VLSI, interconnect, physical design, crosstalk
77	Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera	Capturing crosstalk-induced waveform for accurate static timing analysis.	ISPD	2003	DBLP DOI BibTeX RDF	capacitive coupling noise, delay calculation, slope propagation, static timing analysis, crosstalk noise
77	Yajun Ran, Malgorzata Marek-Sadowska	Crosstalk noise in FPGAs.	DAC	2003	DBLP DOI BibTeX RDF	FPGAs, noise, crosstalk, switch box
77	Masanori Hashimoto, Masao Takahashi, Hidetoshi Onodera	Crosstalk noise optimization by post-layout transistor sizing.	ISPD	2002	DBLP DOI BibTeX RDF	capacitive coupling noise, post-layout optimization, gate sizing, transistor sizing, crosstalk noise
70	Waleed K. Al-Assadi, Sindhu Kakarla	A BIST Technique for Crosstalk Noise Detection in FPGAs.	DFT	2008	DBLP DOI BibTeX RDF
70	Mini Nanua, David T. Blaauw	Investigating Crosstalk in Sub-Threshold Circuits.	ISQED	2007	DBLP DOI BibTeX RDF
70	Raid Ayoub, Alex Orailoglu	A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise & delay on processor buses.	ASP-DAC	2005	DBLP DOI BibTeX RDF
70	Aniket, Ravishankar Arunachalam	Novel Algorithm for Testing Crosstalk Induced Delay Faults in VLSI Circuits.	VLSI Design	2005	DBLP DOI BibTeX RDF
70	Chunjie Duan, Sunil P. Khatri	Exploiting Crosstalk to Speed up On-Chip Buse.	DATE	2004	DBLP DOI BibTeX RDF
70	Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang	Crosstalk Alleviation for Dynamic PLAs.	DATE	2002	DBLP DOI BibTeX RDF
70	Xiaohong Jiang 0001, Hong Shen 0001, Md. Mamun-ur-Rashid Khandker, Susumu Horiguchi	A New Scheme to Realize Crosstalk-free Permutations in Optical MINs with Vertical Stacking.	ISPAN	2002	DBLP DOI BibTeX RDF
69	Murthy Palla, Jens Bargfrede, Klaus Koch, Walter Anheier, Rolf Drechsler	Adaptive Branch and Bound Using SAT to Estimate False Crosstalk.	ISQED	2008	DBLP DOI BibTeX RDF	Crosstalk Analysis, False Noise, STA, SAT Solver
69	Ying Zhang 0040, Huawei Li 0001, Xiaowei Li 0001, Yu Hu 0001	Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects.	VTS	2008	DBLP DOI BibTeX RDF	Codeword Selection, Crosstalk Avoidance, Reliable Bus
69	Huawei Li 0001, Xiaowei Li 0001	Selection of Crosstalk-Induced Faults in Enhanced Delay Test.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	automatic test pattern generation (ATPG), crosstalk, delay test, critical paths
69	Li Chen, Xiaoliang Bai, Sujit Dey	Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	interconnect, crosstalk, processor, self-test
69	Paul B. Morton, Wayne Wei-Ming Dai	Crosstalk noise estimation for noise management.	DAC	2002	DBLP DOI BibTeX RDF	noise management, optimal spacing, noise, estimation, crosstalk, local approximation
69	Steven J. E. Wilton	A crosstalk-aware timing-driven router for FPGAs.	FPGA	2001	DBLP DOI BibTeX RDF	field-programmable gate arrays, routing algorithms, crosstalk
69	José Antonio Sainz, R. Muñoz, J. A. Maiz, L. A. Aguado, Miquel Roca 0001	A Crosstalk Sensor Implementation for Measuring Interferences in Digital CMOS VLSI Circuits.	IOLTW	2000	DBLP DOI BibTeX RDF	VLSI, Sensor, CMOS, Crosstalk, Digital
69	Dongsheng Wang 0012, Ernest S. Kuh	A Performance-Driven MCM Router with Special Consideration of Crosstalk Reduction.	DATE	1998	DBLP DOI BibTeX RDF	MCM routing, crosstalk reduction
67	Partha Pratim Pande, Haibo Zhu, Amlan Ganguly, Cristian Grecu	Energy Reduction through Crosstalk Avoidance Coding in NoC Paradigm.	DSD	2006	DBLP DOI BibTeX RDF	crosstalk avoidance codes, interconnect energy, networks on chip, crosstalk, wormhole switching
67	Ajoy Kumar Palit, Lei Wu, Kishore K. Duganapalli, Walter Anheier, Jürgen Schlöffel	A New, Flexible and Very Accurate Crosstalk Fault Model to Analyze the Effects of Coupling Noise between the Interconnects on Signal Integrity Losses in Deep Submicron Chips.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF	crosstalk model, aggressor-victim, ABCD-model, crosstalk-hazards, signal integrity
67	Jens Lienig	Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach.	VLSI Design	1997	DBLP DOI BibTeX RDF	minimized crosstalk, interconnection routing, interconnection crosstalk, VLSI channel routing, VLSI switchbox routing, distributed workstation network, VLSI, VLSI design, parallel genetic algorithm
66	Wu-An Kuo, Yi-Ling Chiang, TingTing Hwang, Allen C.-H. Wu	Performance-Driven Crosstalk Elimination at Postcompiler Level-The Case of Low-Crosstalk Op-Code Assignment.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
62	Alodeep Sanyal, Abhisek Pan, Sandip Kundu	A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	capacitive cross-coupling, dynamic simulation., static analysis
62	Mini Nanua, David T. Blaauw	Crosstalk Waveform Modeling Using Wave Fitting.	PATMOS	2007	DBLP DOI BibTeX RDF
62	Mini Nanua, David T. Blaauw	Receiver Modeling for Static Functional Crosstalk Analysis.	PATMOS	2006	DBLP DOI BibTeX RDF
62	Andrew B. Kahng, Bao Liu 0001, Xu Xu 0001	Statistical crosstalk aggressor alignment aware interconnect delay calculation.	SLIP	2006	DBLP DOI BibTeX RDF
62	Kan Takeuchi, Kazumasa Yanagisawa, Takashi Sato, Kazuko Sakamoto, Saburo Hojo	Probabilistic crosstalk delay estimation for ASICs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
62	Wing-Kin Ma, Pak-Chung Ching, Ba-Ngu Vo	Crosstalk resilient interference cancellation in microphone arrays using Capon beamforming.	IEEE Trans. Speech Audio Process.	2004	DBLP DOI BibTeX RDF
62	Lin Li 0002, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin	A Crosstalk Aware Interconnect with Variable Cycle Transmission.	DATE	2004	DBLP DOI BibTeX RDF
62	Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang	Crosstalk Minimization in Logic Synthesis for PLA.	DATE	2004	DBLP DOI BibTeX RDF
62	Shahdad Irajpour, Sandeep K. Gupta 0001, Melvin A. Breuer	Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models.	ITC	2004	DBLP DOI BibTeX RDF
62	Madhu Mutyam	Preventing Crosstalk Delay using Fibonacci Representation.	VLSI Design	2004	DBLP DOI BibTeX RDF
62	Shih-Hsu Huang, Yi-Siang Hsu	A timing driven approach for crosstalk minimization in gridded channel routing.	APCCAS (1)	2002	DBLP DOI BibTeX RDF
62	Janusz Konrad, Bertrand Lacotte, Eric Dubois 0002	Cancellation of image crosstalk in time-sequential displays of stereoscopic video.	IEEE Trans. Image Process.	2000	DBLP DOI BibTeX RDF
62	Bruno Franzini, Cristiano Forzan, Davide Pandini, Primo Scandolara, Alessandro Dal Fabbro	Crosstalk Aware Static Timing Analysis: A Two Step Approach.	ISQED	2000	DBLP DOI BibTeX RDF
62	Ki-Wook Kim, Unni Narayanan, Sung-Mo Kang	Domino logic synthesis minimizing crosstalk.	DAC	2000	DBLP DOI BibTeX RDF
62	Xiaoliang Bai, Sujit Dey, Janusz Rajski	Self-test methodology for at-speed test of crosstalk in chip interconnects.	DAC	2000	DBLP DOI BibTeX RDF
60	Yu-Ning Chang, Yih-Lang Li, Wei-Tin Lin, Wen-Nai Cheng	Non-slicing floorplanning-based crosstalk reduction on gridless track assignment for a gridless routing system with fast pseudo-tile extraction.	ISPD	2008	DBLP DOI BibTeX RDF	crosstalk reduction, full-chip routing, gridless routing, implicit connection graph-based router, non-slicing floorplanning, detailed routing
60	Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud	Investigating the Impact of Fill Metal on Crosstalk-Induced Delay and Noise.	ISQED	2008	DBLP DOI BibTeX RDF	fill generation, crosstalk, Design for manufacturability, dummy fill
60	C. R. Venugopal, Prasanth Soraiyur, Jagannath Rao	Evaluation of the PTSI Crosstalk Noise Analysis Tool and Development of an Automated Spice Correlation Suite to Enable Accuracy Validation.	ISQED	2008	DBLP DOI BibTeX RDF	Noise Propagation, Noise Immunity Curve, Crosstalk
60	Jae-Seok Yang, Andrew R. Neureuther	Crosstalk Noise Variation Assessment and Analysis for the Worst Process Corner.	ISQED	2008	DBLP DOI BibTeX RDF	worst corner, noise, crosstalk, variation, signal integrity
60	Youming Li, Amir Leshem, Liming Fang	Computationally efficient approximated matrix inversion with application to crosstalk precoding in downstream VDSL.	IWCMC	2007	DBLP DOI BibTeX RDF	crosstalk cancellation, matrix splitting, vectoring, digital subscriber line
60	Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang	Crosstalk minimization in logic synthesis for PLAs.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	synthesis, Crosstalk, PLA, domino logic
60	Shahin Nazarian, Ali Iranli, Massoud Pedram	Crosstalk analysis in nanometer technologies.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	crosstalk-aware delay, correlation, process variations, variance, mean, statistical static timing analysis
60	Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier	Influence of Resistive Bridging Fault on Crosstalk Coupling Effects in On-Chip Aggressor-Victim Interconnects.	DFT	2006	DBLP DOI BibTeX RDF	defective interconnects, defect’s severity, fault model, crosstalk, bridging fault
60	Melvin A. Breuer, Sandeep K. Gupta 0001, Shahin Nazarian	Efficient Identification of Crosstalk Induced Slowdown Targets.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF	required time, slow-down effect, filters, Crosstalk, static timing analysis, extractors
60	Jihong Ren, Mark R. Greenstreet	Synthesizing optimal filters for crosstalk-cancellation for high-speed buses.	DAC	2003	DBLP DOI BibTeX RDF	equalizing filters, optimal synthesis, crosstalk, buses
60	Hai Zhou 0001, D. F. Wong 0001	Optimal river routing with crosstalk constraints.	ACM Trans. Design Autom. Electr. Syst.	1998	DBLP DOI BibTeX RDF	river routing, crosstalk
60	Zhan Chen, Israel Koren	Crosstalk Minimization in Three-Layer HVH Channel Routing.	DFT	1997	DBLP DOI BibTeX RDF	design for reliability, routing, crosstalk
60	Hai Zhou 0001, D. F. Wong 0001	An optimal algorithm for river routing with crosstalk constraints.	ICCAD	1996	DBLP DOI BibTeX RDF	river routing, physical design, crosstalk, detailed routing
58	Abby A. Ilumoka	Efficient prediction of interconnect crosstalk using neural networks.	ICTAI	2000	DBLP DOI BibTeX RDF	interconnect crosstalk prediction, deep submicron downscaling, wirecells, modular artificial neural networks, multiparadigm prototyping system, equicoupling contours, isocouples, transconductance amplifier, neural networks, delays, delay, finite element method, neural nets, crosstalk, experimental results, circuit CAD, finite element analysis, circuit simulation, circuit simulator, integrated circuit interconnections, wafer-scale integration, wafer scale integration
58	Narender Hanchate, Nagarajan Ranganathan	Integrated Gate and Wire Sizing at Post Layout Level.	ISVLSI	2007	DBLP DOI BibTeX RDF
58	Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen	Minimizing Inter-Clock Coupling Jitter.	ISQED	2003	DBLP DOI BibTeX RDF
56	Krishna Sekar, Sujit Dey	LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	LI-BIST, crosstalk test, BIST, SoC test, low-power test
54	Hariharan Sankaran, Srinivas Katkoori	On-chip dynamic worst-case crosstalk pattern detection and elimination for bus-based macro-cell designs.	ISQED	2009	DBLP DOI BibTeX RDF
54	Arash Mehdizadeh, Morteza Saheb Zamani	Proposing an efficient method to estimate and reduce crosstalk after placement in VLSI circuits.	AICCSA	2008	DBLP DOI BibTeX RDF
54	Truong Quang Vinh, Young-Chul Kim 0001	A low power crosstalk-free bus encoding using genetic algorithm.	AICCSA	2008	DBLP DOI BibTeX RDF
54	Yi-Yu Liu, TingTing Hwang	Crosstalk-Aware Domino-Logic Synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
54	Kunal P. Ganeshpure, Sandip Kundu	Interactive presentation: Automatic test pattern generation for maximal circuit noise in multiple aggressor crosstalk faults.	DATE	2007	DBLP DOI BibTeX RDF
54	Syed Rafay Hasan, Yvon Savaria	Crosstalk Effects in Event-Driven Self-Timed Circuits Designed With 90nm CMOS Technology.	ISCAS	2007	DBLP DOI BibTeX RDF
54	Nahmsuk Oh, Alireza Kasnavi, Peivand F. Tehrani	Fast Crosstalk Repair by Quick Timing Change Estimation.	ISQED	2007	DBLP DOI BibTeX RDF
54	Amit Kumar 0004, Krishnendu Chakrabarty, Chunduri Rama Mohan	An ECO Technique for Removing Crosstalk Violations in Clock Networks.	VLSI Design	2007	DBLP DOI BibTeX RDF
54	Yang Shi 0001, Feng Ding 0001, Tongwen Chen	Multirate Crosstalk Identification in xDSL Systems.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
54	Yi-Yu Liu, TingTing Hwang	Crosstalk-aware domino logic synthesis.	DATE	2006	DBLP DOI BibTeX RDF
54	Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta 0001, Melvin A. Breuer	STAX: statistical crosstalk target set compaction.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF	compaction degree, fault-producing target, pruning power, safe target, statistical static timing analyzer, ATPG
54	Wu-An Kuo, Yi-Ling Chiang, TingTing Hwang, Allen C.-H. Wu	Performance-driven crosstalk elimination at post-compiler level.	ISCAS	2006	DBLP DOI BibTeX RDF
54	Chia-Chun Tsai, Jan-Ou Wu, Chien-Wen Kao, Trong-Yen Lee, Rong-Shue Hsiao	Coupling aware RLC-based clock routings for crosstalk minimization.	ISCAS	2006	DBLP DOI BibTeX RDF
54	Hiroshi Takahashi, Keith J. Keller, Kim T. Le, Kewal K. Saluja, Yuzo Takamatsu	A method for reducing the target fault list of crosstalk faults in synchronous sequential circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
54	Chin-Hui Wang, Yung-Ching Chen, Tsai-Ming Hsieh, Chih-Hung Lee, Hsin-Hsiung Huang	A new congestion and crosstalk aware router.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
54	Sachin Shrivastava, Sreeram Chandrasekar	Crosstalk Noise Analysis at Multiple Frequencies.	VLSI Design	2005	DBLP DOI BibTeX RDF
54	Suvodeep Gupta, Srinivas Katkoori, Hariharan Sankaran	Floorplan-Based Crosstalk Estimation for Macrocell-Based Designs.	VLSI Design	2005	DBLP DOI BibTeX RDF
54	Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel	ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips.	VLSI Design	2005	DBLP DOI BibTeX RDF
54	V. Saminadan, Meenakshi Murugappan	In-Band Crosstalk Performance of WDM Optical Networks Under Different Routing and Wavelength Assignment Algorithms.	IWDC	2005	DBLP DOI BibTeX RDF
54	Di Wu 0017, Jiang Hu, Rabi N. Mahapatra, Min Zhao 0001	Layer assignment for crosstalk risk minimization.	ASP-DAC	2004	DBLP DOI BibTeX RDF