Search results for "crypto-coprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
125	Howon Kim 0001, Mun-Kyu Lee, Dong Kyue Kim, Sang-Kyoon Chung, Kyoil Chung	Design and Implementation of Crypto Co-processor and Its Application to Security Systems.	CIS (2)	2005	DBLP DOI BibTeX RDF	Crypto Algorithm, Power Consumption, Crypto Coprocessor
72	Wieland Fischer, Jean-Pierre Seifert	Increasing the Bitlength of a Crypto-Coprocessor.	CHES	2002	DBLP DOI BibTeX RDF	Arithmetical coprocessor, Hardware/Software codesign, Modular multiplication, Hardware architecture
69	Masayuki Yoshino, Katsuyuki Okeya, Camille Vuillaume	Unbridle the Bit-Length of a Crypto-coprocessor with Montgomery Multiplication.	Selected Areas in Cryptography	2006	DBLP DOI BibTeX RDF	RSA, smartcard, Montgomery multiplication, crypto-coprocessor
60	Nick Howgrave-Graham, Joan G. Dyer, Rosario Gennaro	Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor.	CHES	2001	DBLP DOI BibTeX RDF
58	Johann Großschädl	A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m).	CHES	2001	DBLP DOI BibTeX RDF	iterative modulo multiplication, polynomial basis representation, bit-serial multiplier architecture, smart card crypto-coprocessor, Elliptic curve cryptography, finite field arithmetic
50	Xue-mi Zhao, Zhiying Wang 0003, Hongyi Lu, Kui Dai	A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
40	Alireza Hodjat, Patrick Schaumont, Ingrid Verbauwhede	Architectural Design Features of a Programmable High Throughput AES Coprocessor.	ITCC (2)	2004	DBLP DOI BibTeX RDF
38	Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang	NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem.	IIH-MSP	2008	DBLP DOI BibTeX RDF	multiple cipher, scheduling algorithm, Cryptosystem, operation mode, crypto-coprocessor
38	Masayuki Yoshino, Katsuyuki Okeya, Camille Vuillaume	Double-Size Bipartite Modular Multiplication.	ACISP	2007	DBLP DOI BibTeX RDF	bipartite modular multiplication, double-size technique, RSA, smartcard, crypto-coprocessor
30	Dur-e-Shahwar Kundi, Ayesha Khalid, Arshad Aziz, Chenghua Wang, Máire O'Neill, Weiqiang Liu 0001	Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3.	IEEE Trans. Circuits Syst.	2020	DBLP DOI BibTeX RDF
30	Cheng-Rung Tsai, Ming-Chun Hsiao, Wen-Chung Shen, An-Yeu Andy Wu, Chen-Mou Cheng	A 1.96mm2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols.	ISCAS	2015	DBLP DOI BibTeX RDF
30	Shi-Ce Ni, Yong Dou, Kai Chen 0020, Jie Zhou 0007	Design and Implement of High Performance Crypto Coprocessor.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2014	DBLP DOI BibTeX RDF
30	Shi-Ce Ni, Yong Dou, Kai Chen 0020, Lin Deng	A Novel Design of Flexible Crypto Coprocessor and Its Application.	ACA	2014	DBLP DOI BibTeX RDF
30	Shi-Ce Ni, Yong Dou, Kai Chen 0020, Lin Deng	Design and Implementation of Novel Flexible Crypto Coprocessor and Its Application in Security Protocol.	NCCET	2013	DBLP DOI BibTeX RDF
30	Mostafa I. Soliman, Ghada Y. Abozaid	FPGA implementation and performance evaluation of a high throughput crypto coprocessor.	J. Parallel Distributed Comput.	2011	DBLP DOI BibTeX RDF
30	Alireza Hodjat, David Hwang 0001, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede	A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	crypto-processor, security, FPGA, VLSI, cryptography, advanced encryption standard (AES), ASIC, hardware architectures
30	Antonio Valverde Garcia, Jean-Pierre Seifert	On the Implementation of the Advanced Encryption Standard on a Public-key Crypto-Coprocessor.	CARDIS	2002	DBLP BibTeX RDF
20	Min Wu, Xiaoyang Zeng, Jun Han 0003, Yongyi Wu, Yibo Fan	A high-performance platform-based SoC for information security.	ASP-DAC	2006	DBLP DOI BibTeX RDF
20	Chenghuai Lu, André L. M. dos Santos, Francisco R. Pimentel	Implementation of fast RSA key generation on smart cards.	SAC	2002	DBLP DOI BibTeX RDF	RSA key generation, prime finding, smart card, coprocessor