Search results for "debug"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
118	Bart Vermeulen, Kees Goossens, Siddharth Umrani	Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip.	NOCS	2008	DBLP DOI BibTeX RDF	communication-centric debug, debug, network-on-chip, design for debug
99	Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller	A reconfigurable design-for-debug infrastructure for SoCs.	DAC	2006	DBLP DOI BibTeX RDF	assertion-based debug, at-speed debug, what-if experiments, silicon debug
95	Shan Tang, Qiang Xu 0001	A multi-core debug platform for NoC-based systems.	DATE	2007	DBLP DOI BibTeX RDF
91	Sandeep Kumar Goel, Bart Vermeulen	Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	scan-based debug, Design-for-Debug (DfD), clock gating, silicon debug, multiple-clock domains
86	Kees Goossens, Bart Vermeulen, Remco van Steeden, Martijn T. Bennebroek	Transaction-Based Communication-Centric Debug.	NOCS	2007	DBLP DOI BibTeX RDF
83	Harald P. E. Vranken	Debug Facilities in the TriMedia CPU64 Architecture.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	application debug, VLIW processor, design-for-debug
82	Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan	Online cache state dumping for processor debug.	DAC	2009	DBLP DOI BibTeX RDF	cache compression, processor debug, silicon debug, design for debug, post-silicon validation
78	Bart Vermeulen, Neal Stollon, Rolf Kühnis, Gary Swoboda, Jeff Rearick	Overview of Debug Standardization Activities.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
78	Shan Tang, Qiang Xu 0001	In-band Cross-Trigger Event Transmission for Transaction-Based Debug.	DATE	2008	DBLP DOI BibTeX RDF
78	Bart Vermeulen, Tom Waayers, Sjaak Bakker	EEE 1149.1-Compliant Access Architecture for Multiple Core Debug on Digital System Chips.	ITC	2002	DBLP DOI BibTeX RDF
77	Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya	Debugging HW/SW interface for MPSoC: video encoder system design case study.	DAC	2004	DBLP DOI BibTeX RDF	hardware-dependant software, hardware-software interface, debug, multiprocessor system-on-chip
76	Ehab Anis, Nicola Nicolici	Interactive presentation: Low cost debug architecture using lossy compression for silicon debug.	DATE	2007	DBLP DOI BibTeX RDF
76	Desta Tadesse, R. Iris Bahar, Joel Grodstein	Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation.	VTS	2008	DBLP DOI BibTeX RDF	Microprocessor Diagnosis, Pass/Fail Region, Maximum Likelihood Estimation, Silicon Debug
75	Doug Josephson	The good, the bad, and the ugly of silicon debug.	DAC	2006	DBLP DOI BibTeX RDF	design for test and debug, debug, validation, characterization
69	Todd J. Foster, Dennis L. Lastor, Padmaraj Singh	First Silicon Functional Validation and Debug of Multicore Microprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
69	Klaus D. Maier 0001	On-chip debug support for embedded Systems-on-Chip.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
69	Mustafa M. Tikir, Jeffrey K. Hollingsworth, Guei-Yuan Lueh	Recompilation for debugging support in a JIT-compiler.	PASTE	2002	DBLP DOI BibTeX RDF	Java virtual machine debugger interface, debug information, dynamic recompilation, field access watch, Java, just-in-time compilation
67	Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai Chang	Visibility enhancement for silicon debug.	DAC	2006	DBLP DOI BibTeX RDF	silicon validation, functional verification, silicon debug
67	Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers	Design-For-Debug in Hardware/Software Co-Design.	CODES	1997	DBLP DOI BibTeX RDF	system integration and test, hardware/software co-design, design validation, design-for-debug
67	Ruo Ando, Yoshiyasu Takefuji	Self Debugging Mode for Patch-Independent Nullification of Unknown Remote Process Infection.	CANS	2005	DBLP DOI BibTeX RDF	self-debugging mode, real-time nullification, debug register, improved debug exception handler, branchIP recorder
60	Ho Fai Ko, Nicola Nicolici	Algorithms for State Restoration and Trace-Signal Selection for Data Acquisition in Silicon Debug.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
60	Rob Aitken, Erik Jan Marinissen	Guest Editors' Introduction: Addressing the Challenges of Debug and Diagnosis.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
60	Bart Vermeulen	Functional Debug Techniques for Embedded Systems.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
60	Andrew B. T. Hopkins, Klaus D. McDonald-Maier	Debug Support for Hybrid SoCs.	AHS	2007	DBLP DOI BibTeX RDF
60	Andrew B. T. Hopkins, Klaus D. McDonald-Maier	Debug Support Strategy for Systems-on-Chips with Multiple Processor Cores.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	multiprocessor systems, System architectures, real-time and embedded systems, debugging aids, integration and modeling
60	Jianmin Zhang, Ming Yan 0003, Sikun Li	Debug Support for Scalable System-on-Chip.	MTV	2006	DBLP DOI BibTeX RDF
59	Lian Yu, Changzhu Kong, Lei Xu, Jingtao Zhao, HuiHui Zhang	Mining Bug Classifier and Debug Strategy Association Rules for Web-Based Applications.	ADMA	2008	DBLP DOI BibTeX RDF	bug mining, bug classification, debug strategy, Chi-square algorithm, SVM, association rule
59	Zheng Liang, Juha Plosila, Lu Yan, Kaisa Sere	On-chip Debug for an Asynchronous Java Accelerator.	PDCAT	2005	DBLP DOI BibTeX RDF	Java, Debug, Embedded, Asynchronous, Co-design
59	Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham	On-chip delay measurement for silicon debug.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	design for testability, delay fault testing, silicon debug
57	Ming-Chang Hsieh, Chih-Tsun Huang	An embedded infrastructure of debug and trace interface for the DSP platform.	DAC	2008	DBLP DOI BibTeX RDF	embedded debug and trace, compression, embedded processors, digital signal processors, design for debug
57	Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel	Automatic generation of breakpoint hardware for silicon debug.	DAC	2004	DBLP DOI BibTeX RDF	hardware-breakpoints, design-flow, silicon-debug, design-for-debug
51	Kwang-Ting (Tim) Cheng	Effective silicon debug is key for time to money.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
51	Shan Tang, Qiang Xu 0001	A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems.	ASP-DAC	2008	DBLP DOI BibTeX RDF
51	Joon-Sung Yang, Nur A. Touba	Enhancing Silicon Debug via Periodic Monitoring.	DFT	2008	DBLP DOI BibTeX RDF
51	Andrew B. T. Hopkins, Klaus D. McDonald-Maier	Debug support for embedded processor reuse.	ISCAS	2006	DBLP DOI BibTeX RDF
51	Xiao Hu, Pengyong Ma, Shuming Chen, Yang Guo, Xing Fang	TraceDo: An On-Chip Trace System for Real-Time Debug and Optimization in Multiprocessor SoC.	ISPA	2006	DBLP DOI BibTeX RDF
51	Hari Balachandran, Kenneth M. Butler, Neil Simpson	Facilitating Rapid First Silicon Debug.	ITC	2002	DBLP DOI BibTeX RDF
51	Carol Pyron, Rekha Bangalore, Dawit Belete, Jason Goertz, Ashutosh Razdan, Denise Younger	Silicon Symptoms to Solutions: Applying Design for Debug Techniques.	ITC	2002	DBLP DOI BibTeX RDF
51	Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar	System level design and debug of high-performance embedded media systems (tutorial).	ICCAD	1999	DBLP BibTeX RDF
50	Joon-Sung Yang, Nur A. Touba	Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture.	VTS	2008	DBLP DOI BibTeX RDF	Trace Buffer Observation Window, Two-Dimensional (2-D) Compaction, Cycling Register, Silicon Debug, MISR
50	Stefan Holst, Hans-Joachim Wunderlich	Adaptive Debug and Diagnosis without Fault Dictionaries.	ETS	2007	DBLP DOI BibTeX RDF	VLSI, Test, Debug, Diagnosis
42	Yibin Chen, Sean Safarpour, Andreas G. Veneris, João Marques-Silva 0001	Spatial and temporal design debug using partial MaxSAT.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	maximum satisfiability, design debugging
42	Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin	Design, Debug, Deploy: The Creation of Configurable Computing Applications.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	CAD for configurable computing, FPGA, design environments, configurable computing
42	Tzi-cker Chiueh	Fast Bounds Checking Using Debug Register.	HiPEAC	2008	DBLP DOI BibTeX RDF
42	Marc Boule, Jean-Samuel Chenard, Zeljko Zilic	Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis.	ISQED	2007	DBLP DOI BibTeX RDF
42	Mario García-Valderas, Eduardo de la Torre, F. Ariza, Teresa Riesgo	Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion.	FPL	2004	DBLP DOI BibTeX RDF
42	Bart Vermeulen, Tom Waayers, Sandeep Kumar Goel	Core-Based Scan Architecture for Silicon Debug.	ITC	2002	DBLP DOI BibTeX RDF
42	Don Douglas Josephson	The Manic Depression of Microprocessor Debug.	ITC	2002	DBLP DOI BibTeX RDF
42	Sandeep Kumar Goel, Bart Vermeulen	Hierarchical Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips.	ITC	2002	DBLP DOI BibTeX RDF
42	Bulent I. Dervisoglu	Application of scan hardware and software for debug and diagnostics in a workstation environment.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
42	Narasimhaiah Gorla, Alan C. Benander, Barbara A. Benander	Debugging Effort Estimation Using Software Metrics.	IEEE Trans. Software Eng.	1990	DBLP DOI BibTeX RDF	debugging effort estimation, quadratic regressions, style characteristics, V(g), VARS, PARS, Cobol programs, program analyzer, statistical procedures, SAS, statistical analysis system, GOTO usage, IF-ELSE construct, level 88 item usage, paragraph invocation pattern, data name length, debug times, DEST, software metrics, statistical analysis, program testing, program debugging, linear regressions, multiple regressions, LOC
41	Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu	A General Failure Candidate Ranking Framework for Silicon Debug.	VTS	2008	DBLP DOI BibTeX RDF	Silicon Debug
41	Matthew W. Heath, Wayne P. Burleson, Ian G. Harris	Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	test, debug, SoC, nondeterminism, GALS, globally asynchronous locally synchronous
41	Sung-Boem Park, Subhasish Mitra	IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors.	DAC	2008	DBLP DOI BibTeX RDF	verification, debug, validation, design for debug
41	Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu	Diagnosing Silicon Failures Based on Functional Test Patterns.	MTV	2006	DBLP DOI BibTeX RDF	fault diagnosis, Silicon debug, design for debug
35	Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara	Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
35	Borislav Nikolik	Convergence debugging.	AADEBUG	2005	DBLP DOI BibTeX RDF	convergence hypothesis, test dispersion, test diversity, testing, debugging, convergence
35	Yukio Okuda	Panel Synopsis - Diagnosis Meets Physical Failure Analysis: How Long Can We Succeed?	ITC	2004	DBLP DOI BibTeX RDF
35	Glenn Ammons, David Mandelin, Rastislav Bodík, James R. Larus	Debugging temporal specifications with concept analysis.	PLDI	2003	DBLP DOI BibTeX RDF	specification debuggers, hierarchical clustering, concept analysis, temporal specifications
35	Phyllis G. Frankl, Richard G. Hamlet, Bev Littlewood, Lorenzo Strigini	Evaluating Testing Methods by Delivered Reliability.	IEEE Trans. Software Eng.	1998	DBLP DOI BibTeX RDF	statistical testing theory, Reliability, software testing, debugging
35	Mansur H. Samadzadeh, Winai Wichaipanitch	An Interactive Debugging Tool for C Based on Dynamic Slicing and Dicing.	ACM Conference on Computer Science	1993	DBLP DOI BibTeX RDF	C
34	Miron Abramovici	In-System Silicon Validation and Debug.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
34	Daniel Stein, Marcus Vetter, Ivo Wolf, Hans-Peter Meinzer	Konzept und Realisierung eines Zustandsmaschinen-Editors für Interaktionen medizinischer Bildverarbeitung mit Debug-Funktionalität.	Bildverarbeitung für die Medizin	2008	DBLP DOI BibTeX RDF
34	Atanu Chattopadhyay, Zeljko Zilic	Built-in Clock Skew System for On-line Debug and Repair.	DATE	2008	DBLP DOI BibTeX RDF
34	Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steven J. E. Wilton, Jin Yang 0006	BackSpace: Formal Analysis for Post-Silicon Debug.	FMCAD	2008	DBLP DOI BibTeX RDF
34	K. Schultz, Ketan Paranjape	SOC Debug Challenges and Tools.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
34	Dmitry Akselrod, Asaf Ashkenazi, Yossi Amon	Platform independent debug port controller architecture with security protection for multi-processor system-on-chip ICs.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
34	Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda	Exploiting an I-IP for both Test and Silicon Debug of Microprocessor Cores.	MTV	2005	DBLP DOI BibTeX RDF
34	Albrecht Mayer, Harry Siebert, Klaus D. McDonald-Maier	Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs.	DATE	2005	DBLP DOI BibTeX RDF
34	Baodong Yu, Xuecheng Zou	The Software/Hardware Co-Debug Environment with Emulator.	IWSOC	2005	DBLP DOI BibTeX RDF
34	Charles Njinda	A Hierarchical DFT Architecture for Chip, Board and System Test/Debug.	ITC	2004	DBLP DOI BibTeX RDF
34	Tim Price, Cameron Patterson	Reconfigurable Breakpoints for Co-debug.	FPL	2001	DBLP DOI BibTeX RDF
34	Yiorgos Makris, Alex Orailoglu	A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths.	DFT	1999	DBLP DOI BibTeX RDF
34	Young-Jun Kwon, Ben Mathew, Hong Hao	FakeFault: a silicon debug software tool for microprocessor embedded memory arrays.	ITC	1998	DBLP DOI BibTeX RDF
34	Xiao Liu 0011, Qiang Xu 0001	Interconnection fabric design for tracing signals in post-silicon validation.	DAC	2009	DBLP DOI BibTeX RDF	trace-based debug, post-silicon validation
34	Guillermo Vigueras, Jorge J. Gómez-Sanz, Juan A. Botía Blaya, Juan Pavón	Using Semantic Causality Graphs to Validate MAS Models.	Innovations in Hybrid Intelligent Systems	2008	DBLP DOI BibTeX RDF	Intelligent agent-based systems, MAS debug, MAS validation
34	Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Shing Tsai	Advanced techniques for RTL debugging.	DAC	2003	DBLP DOI BibTeX RDF	simulation, visualization, verification, debug, reasoning
32	Jimin Lee, Jae Min Kim, Junho Huh, Jungwoo Kim 0001	Software-driven Debug Framework for Embedded RISC-V, that Transparently Emulates the Industry Standard Debug Framework.	ICCE	2023	DBLP DOI BibTeX RDF
32	Inhyuk Choi, Hyunggoy Oh, Young-Woo Lee, Sungho Kang 0001	Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost.	IEEE Trans. Computers	2018	DBLP DOI BibTeX RDF
32	Pankaj Shanker	Spatial Debug & Debug Without Re-programming in FPGAs: On-Chip debugging in FPGAs.	FPGA	2016	DBLP DOI BibTeX RDF
32	Kees Goossens, Bart Vermeulen, Ashkan Beyranvand Nejad	A high-level debug environment for communication-centric debug.	DATE	2009	DBLP DOI BibTeX RDF
32	Marc Boule, Jean-Samuel Chenard, Zeljko Zilic	Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug.	ICCD	2006	DBLP DOI BibTeX RDF
32	Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini	A Low-Cost Emulation System for Fast Co-verification and Debug.	ETS	2011	DBLP DOI BibTeX RDF	FPGA, debug, System-on-Chip, co-verification
32	Eddie Hung, Steven J. E. Wilton	Speculative Debug Insertion for FPGAs.	FPL	2011	DBLP DOI BibTeX RDF	fpga debug, trace buffer
32	Yousef Iskander, Cameron D. Patterson, Stephen D. Craven	Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug.	FPL	2011	DBLP DOI BibTeX RDF	FPGA, debug, validation
32	Steven J. E. Wilton, Chun Hok Ho, Bradley R. Quinton, Philip Heng Wai Leong, Wayne Luk	A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications.	ACM Trans. Reconfigurable Technol. Syst.	2008	DBLP DOI BibTeX RDF	Field programmable gate array, system-on-chip, integrated circuit, silicon debug
32	Stefan Holst, Hans-Joachim Wunderlich	Adaptive Debug and Diagnosis without Fault Dictionaries.	ETS	2008	DBLP DOI BibTeX RDF	VLSI, Test, Debug, Diagnosis
32	Bart Vermeulen, Tom Waayers, Sjaak Bakker	Multi-TAP Controller Architecture for Digital System Chips.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	system-chips, IEEE-1149.1, software-debug, design-for-debug, multi-TAP
26	Erik Jan Marinissen	Bugs, moths, grasshoppers, and whales.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
26	Hugo Venturini, Frédéric Riss, Jean-Claude Fernandez, Miguel Santana	A fully-non-transparent approach to the code location problem.	SCOPES	2008	DBLP DOI BibTeX RDF
26	Shantanu Gupta, Florin Sultan, Srihari Cadambi, Franjo Ivancic, Martin Rötteler	RaceTM: detecting data races using transactional memory.	SPAA	2008	DBLP DOI BibTeX RDF	transactional memory, data race detection
26	Mi-Young Park, Nguyen Cao Truong Hai, Yong-Kee Jun, Hyuk-Ro Park	Visualization of Message Races in MPI Parallel Programs.	CIT	2007	DBLP DOI BibTeX RDF
26	Katalin Popovici, Xavier Guerin, Frédéric Rousseau 0001, Pier Stanislao Paolucci, Ahmed Amine Jerraya	Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
26	Brent E. Nelson	The Mythical CCM: In Search of Usable (and Resuable) FPGA-Based General Computing Machines.	ASAP	2006	DBLP DOI BibTeX RDF
26	Winai Wichaipanitch, Mansur H. Samadzadeh, Songsri Tangsripairoj	Development and Evaluation of a Slicing-Based C++ Debugger.	ITCC (2)	2005	DBLP DOI BibTeX RDF	Slicing and Dicing, Evaluation, Algorithms, Debugging, Dynamic Slicing
26	Jonathan Noel Tombs, Miguel Angel Aguirre Echánove, Fernando Muñoz 0001, Vicente Baena Lecuyer, Antonio Jesús Torralba Silgado, A. Fernandez-León, Francisco Tortosa	The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead.	FPL	2004	DBLP DOI BibTeX RDF
26	Kwangyong Lee, Chaedeok Lim, Kisok Kong, Heung-Nam Kim	A Design and Implementation of a Remote Debugging Environment for Embedded Internet Software.	LCTES	2000	DBLP DOI BibTeX RDF
26	Le-Chun Wu, Rajiv Mirani, Harish Patil, Bruce Olsen, Wen-mei W. Hwu	A New Framework for Debugging Globally Optimized Code.	PLDI	1999	DBLP DOI BibTeX RDF
26	Ronald Stence	A New Development Tool with the IEEE-ISTO.	ICCD	1999	DBLP DOI BibTeX RDF
25	Myoungkyu Song, Eli Tilevich	The anti-goldilocks debugger: helping the average bear debug transparently transformed programs.	OOPSLA Companion	2009	DBLP DOI BibTeX RDF	bytecode enhancement, debugging, program transformation