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Publication years (Num. hits)
1987-1993 (15) 1994-1997 (16) 1998-2000 (17) 2001-2003 (23) 2004-2005 (17) 2006-2008 (16) 2009-2012 (16) 2013-2015 (20) 2016-2018 (17) 2019-2023 (14)
Publication types (Num. hits)
article(83) inproceedings(88)
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The graphs summarize 113 occurrences of 81 keywords

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Found 171 publication records. Showing 171 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
151Arash Hariri, Arash Reyhani-Masoleh Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields. Search on Bibsonomy WAIFI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Shifted polynomial basis, binary extension fields, digit-serial, multiplication
145Mary Jane Irwin, Robert Michael Owens A case for digit serial VLSI signal processors. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
137Krister Landernäs, Johnny Holmberg, Mark Vesterbacka A high-speed low-latency digit-serial hybrid adder. Search on Bibsonomy ISCAS (3) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
117Leilei Song, Keshab K. Parhi, Ichiro Kuroda, Takao Nishitani Hardware/software codesign of finite field datapath for low-energy Reed-Solomon codecs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
113Sandeep S. Kumar, Thomas J. Wollinger, Christof Paar Optimum Digit Serial GF(2^m) Multipliers for Curve-Based Cryptography. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2006 DBLP  DOI  BibTeX  RDF least significant digit multiplier, elliptic/hyperelliptic curve cryptography, public key cryptography, digit serial multiplier, Bit serial multiplier
109Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong, In-Gil Nam A New Digit-Serial Systolic Mulitplier for High Performance GF(2m) Applications. Search on Bibsonomy HPCC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF VLSI, Cryptography, Finite Field, Digit-Serial Multiplier
107Nam-Yeun Kim, Kee-Young Yoo Digit-Serial AB2 Systolic Array for Division in GF(2m). Search on Bibsonomy ICCSA (4) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
107Hanho Lee, Gerald E. Sobelman Digit-Serial DSP Library for Optimized FPGA Configuration. Search on Bibsonomy FCCM The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
95Zhiyuan Yan Digit-Serial Systolic Architectures for Inversions over GF(2m). Search on Bibsonomy SiPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
81Markus Hütter, Johann Großschädl, Guy-Armand Kamendje A Versatile and Scalable Digit-Serial/Parallel Multiplier Architecture for Finite Fields GF(2m). Search on Bibsonomy ITCC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF binary extension fields, digit-serial/parallel multiplier, Elliptic curve cryptography, critical path
80Arash Reyhani-Masoleh, M. Anwar Hasan Efficient digit-serial normal basis multipliers over binary extension fields. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF security, finite field, normal basis, Digit-serial multiplier
78Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong, Hiecheol Kim A New Systolic Array for Least Significant Digit First Multiplication in GF(2m). Search on Bibsonomy ICCSA (3) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Digit-Serial Architecture, VLSI, Cryptography, Systolic Array, Finite Field Multiplication
74T. Sansaloni, Javier Valls, Keshab K. Parhi Digit-Serial Complex-Number Multipliers on FPGAs. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF complex-number multipliers, digit-serial arithmetic, FPGA, Booth recoding
73Chang Hoon Kim, Chun Pyo Hong, Soonhak Kwon A digit-serial multiplier for finite field GF(2m). Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
63Javier Valls, Trini Sansaloni, Marcos Martínez-Peiró, Eduardo I. Boemo Fast FPGA-based pipelined digit-serial/parallel multipliers. Search on Bibsonomy ISCAS (1) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
59Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong A fast digit-serial systolic multiplier for finite field GF(2m). Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
59Won-Ho Lee, Keon-Jik Lee, Kee-Young Yoo New Digit-Serial Systolic Arrays for Power-Sum and Division Operation in GF(2m). Search on Bibsonomy ICCSA (3) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
59Sungwook Kim, Gerald E. Sobelman Efficient digit-serial FIR filters with skew-tolerant domino. Search on Bibsonomy ISCAS (4) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
59Mohammad K. Ibrahim, Abulaziz Almulhem Bit-level pipelined digit serial GF(2m) multiplier. Search on Bibsonomy ISCAS (4) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
57Magnus Karlsson, Mark Vesterbacka Digit-serial/parallel multipliers with improved throughput and latency. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
57Pasin Israsena, S. Summerfield Wave digital filters using digit serial 3-port adaptors. Search on Bibsonomy APCCAS (1) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
56Keshab K. Parhi, Takao Nishitani VLSI architectures for discrete wavelet transforms. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1993 DBLP  DOI  BibTeX  RDF
54Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor FPGA-Based Structures for On-Line FFT and DCT. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF FPGA, interconnect, MAC, FFT, signal processing, DCT, online, on-line, distributed arithmetic, bit-serial, xilinx, on-line arithmetic
53Martin Novotný, Jan Schmidt General Digit-Serial Normal Basis Multiplier with Distributed Overlap. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
53Martin Novotný, Jan Schmidt Two Architectures of a General Digit-Serial Normal Basis Multiplier. Search on Bibsonomy DSD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
51Lun Li, Mitchell A. Thornton, David W. Matula A digit serial algorithm for the integer power operation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF power operation, standard cell implementation, exponential, discrete log
50Steven D. Krueger, Peter-Michael Seidel Design of an On-Line IEEE Floating-Point Addition Unit for FPGAs. Search on Bibsonomy FCCM The full citation details ... 2004 DBLP  DOI  BibTeX  RDF IEEE rounding, Floating-point addition, on-line arithmetic
46Leilei Song, Keshab K. Parhi Efficient Finite Field Serial/Parallel Multiplication. Search on Bibsonomy ASAP The full citation details ... 1996 DBLP  DOI  BibTeX  RDF finite field serial/parallel multiplication, finite field arithmetic architectures, bit-serial/parallel finite field multiplier, standard basis representation, optimal primitive polynomials, minimum hardware complexity, semi-systolic architecture, computational complexity, cryptography, cryptography, encoding, digital arithmetic, polynomials, multiplying circuits, VLSI implementation, coding theory
45Junfeng Fan, Ingrid Verbauwhede Unified Digit-Serial Multiplier and Inverter in Finite Field GF(2m). Search on Bibsonomy HOST The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
45Alex Fit-Florea, David W. Matula A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2k. Search on Bibsonomy ASAP The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
44Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin Digit pipelined arithmetic on fine-grain array processors. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
42Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli Multi-gigabit GCM-AES Architecture Optimized for FPGAs. Search on Bibsonomy CHES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Galois/Counter Mode (GCM), hybrid multiplier, Field Programmable Gate Array (FPGA), Very Large Scale Integration (VLSI), Advanced Encryption Standard (AES), high throughput, digit-serial multiplier, bit-parallel multiplier
42J. Living, Bashir M. Al-Hashimi Mixed arithmetic architecture: a solution to the iteration bound for resource efficient FPGA and CPLD recursive digital filters. Search on Bibsonomy ISCAS (1) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
42M. C. Mekhallalati, Ahmed S. Ashur, M. K. Ibrahim Novel Radix Finite Field Multiplier for GF(2m). Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
38Sridhar Rajagopal, Joseph R. Cavallaro Truncated Online Arithmetic with Applications to Communication Systems. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Dynamic truncation, finite precision, communication systems, online arithmetic
37Monk-Ping Leong, Philip Heng Wai Leong A variable-radix digit-serial design methodology and its application to the discrete cosine transform. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Guido Bertoni, Jorge Guajardo, Gerardo Orlando Systolic and Scalable Architectures for Digit-Serial Multiplication in Fields GF(pm). Search on Bibsonomy INDOCRYPT The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Arash Reyhani-Masoleh, M. Anwar Hasan Efficient digit-serial normal basis multipliers over GF(2m). Search on Bibsonomy ISCAS (5) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Chakkapas Visavakul, Peter Y. K. Cheung, Wayne Luk A Digit-Serial Structure for Reconfigurable Multipliers. Search on Bibsonomy FPL The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Lori Lucke, Chaitali Chakrabarti A digit-serial architecture for gray-scale morphological filtering. Search on Bibsonomy IEEE Trans. Image Process. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
36Jeng-Shyang Pan 0001, Chiou-Yng Lee, Pramod Kumar Meher Low-Latency Digit-Serial and Digit-Parallel Systolic Multipliers for Large Binary Extension Fields. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
34Junfeng Fan, Lejla Batina, Ingrid Verbauwhede Light-weight implementation options for curve-based cryptography: HECC is also ready for RFID. Search on Bibsonomy ICITST The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
34G. K. Grigoriadis, Basil G. Mertzios Implementation of the velocities of the end-effector with the distributed arithmetic architecture. Search on Bibsonomy J. Intell. Robotic Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF linear velocity, positional and orientational Jacobian matrices, distributed arithmetic and end-effector, pipelining, robot kinematics, fast implementation, angular velocity
34Essam Elsayed, Hatem M. El-Boghdadi Area-Efficient Digit Serial-Serial Two's Complement Multiplier. Search on Bibsonomy J. Circuits Syst. Comput. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
34Miguel Morales-Sandoval, Claudia Feregrino Uribe, Paraskevas Kitsos Bit-serial and digit-serial GF(2m)Montgomery multipliers using linear feedback shift registers. Search on Bibsonomy IET Comput. Digit. Tech. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
34Keon-Jik Lee, Kee-Won Kim, Kee-Young Yoo Digit-serial-in-serial-out systolic multiplier for Montgomery algorithm. Search on Bibsonomy Inf. Process. Lett. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Keon-Jik Lee, Kee-Won Kim, Kee-Young Yoo Digit Serial-In-Serial-Out Systolic Multiplier for Montogomery's Algorithm. Search on Bibsonomy PDCS The full citation details ... 2001 DBLP  BibTeX  RDF
28Peter Kornerup A Systolic, Linear-Array Multiplier for a Class of Right-Shift Algorithms. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1994 DBLP  DOI  BibTeX  RDF systolic linear-array multiplier, right-shift algorithms, multiplier cell, digit-product terms, least significant digit first, active elements, module-multiplier, Montgomery module-reduction, RSA encryption, modular division, cryptography, logic design, systolic arrays, systolic array, digital arithmetic, multiplying circuits, latches, modular inverses, Hensel codes, digit-serial multiplier
28Milos D. Ercegovac, Tomás Lang On-the-Fly Rounding. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1992 DBLP  DOI  BibTeX  RDF digit rounding, digit-serial form, most significant digit, least significant, redundant addition, result-digit, signed-digit set, computing arithmetic, digital arithmetic, number theory, digit-recurrence algorithms, online arithmetic
28Milos D. Ercegovac, Tomás Lang Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1990 DBLP  DOI  BibTeX  RDF online CORDIC, redundant CORDIC, matrix triangularization, angles, digit-serial addition, online multiplication, Givens' rotations, singular value decomposition, SVD, digital arithmetic, rotations, division, square root, scaling factors, floating-point representations
28Franco P. Preparata, Jean Vuillemin Practical Cellular Dividers. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1990 DBLP  DOI  BibTeX  RDF parallel division algorithms, nonrestoring online division methods, divider/multiplier, RSA cryptography, greatest common divisor computations, parallel algorithms, signal processing, digital arithmetic, modular arithmetic, redundant representations, floating-point units, dividing circuits, signed, systolic, digit-serial multiplier
28Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor A FPGA-based Library for On-Line Signal Processing. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF FFT, DSP, DCT, configurable computing, on-line arithmetic
26Adnan Abdul-Aziz Gutub, Mohammad K. Ibrahim Power-time flexible architecture for GF(2k) elliptic curve cryptosystem computation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF crypto-systems power-time tradeoff, projective coordinate arithmetic, parallel architecture, elliptic curve cryptography
26Oscar Gustafsson, Lars Wanhammar Implementation of maximally fast ladder wave digital filters using a numerically equivalent state-space representation. Search on Bibsonomy ISCAS (3) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
23Muhammad Sohail Ibrahim, Muhammad Usman, Malik Zohaib Nisar, Jeong-A Lee DSLOT-NN: Digit-Serial Left-to-Right Neural Network Accelerator. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
23Muhammad Sohail Ibrahim, Muhammad Usman, Malik Zohaib Nisar, Jeong-A Lee DSLOT-NN: Digit-Serial Left-to-Right Neural Network Accelerator. Search on Bibsonomy DSD The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
23Xinyu Wang, Ning Wu, Fang Zhou 0001, Fen Ge Efficient Configurable Digit-Serial Multiplier Based on Improved Karatsuba Algorithm over GF(2m). Search on Bibsonomy ICCT The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
23Shen-Fu Hsiao, Hung-Ching Li, Yu-Che Yen, Po-Chang Li Dynamically Swappable Digit-Serial Multi-Precision Deep Neural Network Accelerator with Early Termination. Search on Bibsonomy ISCAS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
23Hayssam El-Razouk, Kirthi Kotha, Mahidhar Puligunta Novel $GF\left(2^{m}\right)$GF2m Digit-Serial PISO Multipliers for the Self-Dual Gaussian Normal Bases. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
23Shen-Fu Hsiao, Jian-Ming Chen, Yu-Hong Chen, Hung-Ching Li, Yi Hsu Comparison of Digit-Serial and Bit-Level Designs for Acceleration of Convolutional Neural Network Computation. Search on Bibsonomy ISCAS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
23Atef Ibrahim Unified and Scalable Digit-Serial Systolic Array for Multiplication and Division Over GF (2m). Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Jiafeng Xie Efficient Subquadratic Space Complexity Digit-Serial Multipliers over GF(2m) based on Bivariate Polynomial Basis Representation. Search on Bibsonomy ASP-DAC The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
23Jiafeng Xie, Chiou-Yng Lee, Pramod Kumar Meher, Zhi-Hong Mao Novel Bit-Parallel and Digit-Serial Systolic Finite Field Multipliers Over $GF(2^m)$ Based on Reordered Normal Basis. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Ned Bingham, Rajit Manohar Self-Timed Adaptive Digit-Serial Addition. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Sahar Fatemi, Maryam Zare, Amir Farzad Khavari, Mohammad Maymandi-Nejad Efficient implementation of digit-serial Montgomery modular multiplier architecture. Search on Bibsonomy IET Circuits Devices Syst. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Atef Ibrahim Scalable digit-serial processor array architecture for finite field division. Search on Bibsonomy Microelectron. J. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Jiafeng Xie Digit-Serial Versatile Multiplier Based on a Novel Block Recombination of the Modified Overlap-Free Karatsuba Algorithm. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Siva Ramakrishna Pillutla, Lakshmi Boppana A high-throughput fully digit-serial polynomial basis finite field GF(2m) multiplier for IoT applications. Search on Bibsonomy TENCON The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
23Jiafeng Xie, Pramod Kumar Meher, Xiaojun Zhou, Chiou-Yng Lee Low Register-Complexity Systolic Digit-Serial Multiplier Over GF(2m) Based on Trinomials. Search on Bibsonomy IEEE Trans. Multi Scale Comput. Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Jeng-Shyang Pan 0001, Pengfei Song, Chun-Sheng Yang Efficient digit-serial modular multiplication algorithm on FPGA. Search on Bibsonomy IET Circuits Devices Syst. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Zhenji Hu, Jiafeng Xie Novel Hybrid-Size Digit-Serial Systolic Multiplier over GF(2m). Search on Bibsonomy Symmetry The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Warren E. Ferguson, Jesse Bingham, Levent Erkök, John R. Harrison, Joe Leslie-Hurd Digit Serial Methods with Applications to Division and Square Root. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
23Jeng-Shyang Pan 0001, Shu-Xia Dong, Chun-Sheng Yang Low-Space Complexity Digit-Serial Multiplier Based on Modified Polynomial Basis Over GF(2m). Search on Bibsonomy J. Inf. Hiding Multim. Signal Process. The full citation details ... 2017 DBLP  BibTeX  RDF
23Che Wun Chiou, Chiou-Yng Lee, Jim-Min Lin, Yun-Chi Yeh, Jeng-Shyang Pan 0001 Low-latency digit-serial dual basis multiplier for lightweight cryptosystems. Search on Bibsonomy IET Inf. Secur. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher, Chia-Chen Fan, Shyan-Ming Yuan Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix-Vector Product Decomposition. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Serdar Süer Erdem, Tugrul Yanik, Anil Çelebi A General Digit-Serial Architecture for Montgomery Modular Multiplication. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Shoaleh Hashemi Namin, Huapeng Wu, Majid Ahmadi Low-Power Design for a Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Warren E. Ferguson, Jesse Bingham, Levent Erkök, John R. Harrison, Joe Leslie-Hurd Digit Serial Methods with Applications to Division and Square Root (with mechanically checked correctness proofs). Search on Bibsonomy CoRR The full citation details ... 2017 DBLP  BibTeX  RDF
23Atef Ibrahim, Fayez Gebali Scalable and Unified Digit-Serial Processor Array Architecture for Multiplication and Inversion Over GF( $2^{m}$ ). Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Apostolos P. Fournaris, Charalambos Dimopoulos, Odysseas G. Koufopavlou A Design Strategy for Digit Serial Multiplier Based Binary Edwards Curve Scalar Multiplier Architectures. Search on Bibsonomy DSD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
23Atef Ibrahim, Turki F. Al-Somani, Fayez Gebali Efficient Scalable Digit-Serial Inverter Over GF( $2^{m}$ ) for Ultra-Low Power Devices. Search on Bibsonomy IEEE Access The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher, Chung-Hsin Liu Area-Delay Efficient Digit-Serial Multiplier Based on k-Partitioning Scheme Combined With TMVP Block Recombination Approach. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Abdalhossein Rezai, Parviz Keshavarzi High-performance scalable architecture for modular multiplication using a new digit-serial computation. Search on Bibsonomy Microelectron. J. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi High-speed VLSI implementation of Digit-serial Gaussian normal basis Multiplication over GF(2m). Search on Bibsonomy IACR Cryptol. ePrint Arch. The full citation details ... 2016 DBLP  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher Comment on "Subquadratic Space-Complexity Digit-Serial Multipliers Over GF(2m) Using Generalized (a, b)-Way Karatsuba Algorithm". Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
23Arash Reyhani-Masoleh Comments on "Low-Latency Digit-Serial Systolic Double Basis Multiplier over GF(2m) Using Subquadratic Toeplitz Matrix-Vector Product Approach". Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Bilal Uslu, Serdar Süer Erdem Versatile digit serial multipliers for binary extension fields. Search on Bibsonomy Comput. Electr. Eng. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Chung-Hsin Liu, Chiou-Yng Lee, Pramod Kumar Meher Efficient Digit-Serial KA-Based Multiplier Over Binary Extension Fields Using Block Recombination Approach. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher Subquadratic Space-Complexity Digit-Serial Multipliers Over GF(2m) Using Generalized (a, b)-Way Karatsuba Algorithm. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher Area-Efficient Subquadratic Space-Complexity Digit-Serial Multiplier for Type-II Optimal Normal Basis of GF(2m) Using Symmetric TMVP and Block Recombination Techniques. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Shyan-Ming Yuan, Chiou-Yng Lee, Chia-Chen Fan Efficient Digit-Serial Multiplier Employing Karatsuba Algorithm. Search on Bibsonomy ICGEC (2) The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
23Jeng-Shyang Pan 0001, Reza Azarderakhsh, Mehran Mozaffari Kermani, Chiou-Yng Lee, Wen-Yo Lee, Che Wun Chiou, Jim-Min Lin Low-Latency Digit-Serial Systolic Double Basis Multiplier over $\mbi GF{(2^m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Chun-Sheng Yang, Bimal Kumar Meher, Pramod Kumar Meher, Jeng-Shyang Pan 0001 Low-Complexity Digit-Serial and Scalable SPB/GPB Multipliers Over Large Binary Extension Fields Using (b, 2)-Way Karatsuba Decomposition. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Chiou-Yng Lee, Pramod Kumar Meher, Wen-Yo Lee Subquadratic space complexity digit-serial multiplier over binary extension fields using Toom-Cook algorithm. Search on Bibsonomy ISIC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Wangchen Dai, Huapeng Wu, Ray C. C. Cheung Time-efficient computation of digit serial Montgomery multiplication. Search on Bibsonomy ISIC The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
23Gustavo Sutter, Jean-Pierre Deschamps, José Luis Imaña Efficient Elliptic Curve Point Multiplication Using Digit-Serial Binary Field Operations. Search on Bibsonomy IEEE Trans. Ind. Electron. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
23Ying Yan Hua, Jim-Min Lin, Che Wun Chiou, Chiou-Yng Lee, Yong Huan Liu Low space-complexity digit-serial dual basis systolic multiplier over Galois field GF(2m) using Hankel matrix and Karatsuba algorithm. Search on Bibsonomy IET Inf. Secur. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
23Levent Aksoy, Cristiano Lazzari, Eduardo Costa 0001, Paulo F. Flores, José Monteiro 0001 Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
23Miguel Morales-Sandoval, Claudia Feregrino Uribe, Paraskevas Kitsos, René Cumplido Area/performance trade-off analysis of an FPGA digit-serial GF(2m)GF(2m) Montgomery multiplier based on LFSR. Search on Bibsonomy Comput. Electr. Eng. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
23Chun-Sheng Yang, Jeng-Shyang Pan 0001, Chiou-Yng Lee Digit-Serial GNB Multiplier Based on TMVP Approach over GF(2m). Search on Bibsonomy RVSP The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
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