Search results for "dimm"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
131	Hongzhong Zheng, Jiang Lin, Zhao Zhang 0010, Zhichun Zhu	Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices.	ISCA	2009	DBLP DOI BibTeX RDF	bandwidth decoupling, decoupled DIMM, DRAM memories
131	Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang 0010, Howard David	DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving.	ISPASS	2007	DBLP DOI BibTeX RDF	channel bandwidth utilization, DRAM-level prefetching, dynamic random access memory, fully-buffered DIMM, dual in-line memory module, redundant bandwidth, memory block, L2 cache block, DRAM power consumption, SPEC2000 program, software cache prefetching, idle memory latency, power saving, multicore processor, memory controller, interconnect structure, DRAM chip
84	Bianca Schroeder, Eduardo Pinheiro, Wolf-Dietrich Weber	DRAM errors in the wild: a large-scale field study.	SIGMETRICS/Performance	2009	DBLP DOI BibTeX RDF	dimm, dram reliability, ecc, hard error, empirical study, memory, soft error, dram, large-scale systems, data corruption
82	Weiyi Sun, Zhaoshi Li, Shouyi Yin, Shaojun Wei, Leibo Liu	ABC-DIMM: Alleviating the Bottleneck of Communication in DIMM-based Near-Memory Processing with Inter-DIMM Broadcast.	ISCA	2021	DBLP DOI BibTeX RDF
66	Brinda Ganesh, Aamer Jaleel, David Wang 0003, Bruce L. Jacob	Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling.	HPCA	2007	DBLP DOI BibTeX RDF
66	Atsushi Hiraishi, Toshio Sugano, Hideki Kusamitsu	Preferable Improvements and Changes to FB-DiMM High-Speed Channel for 9.6Gbps Operation.	ASP-DAC	2007	DBLP DOI BibTeX RDF
66	Noboru Tanabe, Yoshihiro Hamada, Hironori Nakajo, Hideki Imashiro, Junji Yamamoto, Tomohiro Kudoh, Hideharu Amano	Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot.	PARELEC	2002	DBLP DOI BibTeX RDF
65	Yungang Bao, Mingyu Chen 0001, Yuan Ruan, Li Liu 0038, Jianping Fan 0002, Qingbo Yuan, Bo Song, Jianwei Xu	HMTT: a platform independent full-system memory trace monitoring system.	SIGMETRICS	2008	DBLP DOI BibTeX RDF	DIMM, HMTT, memory trace, real system
58	Xiangyu Dong, Naveen Muralimanohar, Norman P. Jouppi, Richard Kaufmann, Yuan Xie 0001	Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems.	SC	2009	DBLP DOI BibTeX RDF
58	Wei Chen 0009, Hongyi Lu, Li Shen 0007, Zhiying Wang 0003, Nong Xiao, Dan Chen 0001	A Novel Hardware Assisted Full Virtualization Technique.	ICYCS	2008	DBLP DOI BibTeX RDF
58	Wei Chen 0009, Hongyi Lu, Li Shen 0007, Zhiying Wang 0003, Nong Xiao	DBTIM: An Advanced Hardware Assisted Full Virtualization Architecture.	EUC (2)	2008	DBLP DOI BibTeX RDF
58	Amit Hadke, Tony Benavides, S. J. Ben Yoo, Rajeevan Amirtharajah, Venkatesh Akella	OCDIMM: Scaling the DRAM Memory Wall Using WDM Based Optical Interconnects.	Hot Interconnects	2008	DBLP DOI BibTeX RDF
58	Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang 0010	Thermal modeling and management of DRAM memory systems.	ISCA	2007	DBLP DOI BibTeX RDF	thermal management, thermal modeling, DRAM memories
58	Jingwei Zhang, Jianjuan Xiu, You He, Wei Xiong	Distributed interacted multisensor joint probabilistic data association algorithm based on D-S theory.	Sci. China Ser. F Inf. Sci.	2006	DBLP DOI BibTeX RDF	multisensor, interacted, distributed, data association
58	Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano	MEMOnet : Network interface plugged into a memory slot.	CLUSTER	2000	DBLP DOI BibTeX RDF
55	Zhe Zhou, Cong Li, Fan Yang, Guangyu Sun 0003	DIMM-Link: Enabling Efficient Inter-DIMM Communication for Near-Memory Processing.	HPCA	2023	DBLP DOI BibTeX RDF
55	Ke Zhang 0017, Lei Yu, Yisong Chang, Ran Zhao, Hongxia Zhang, Lixin Zhang 0002, Mingyu Chen 0001, Sally A. McKee	Co-DIMM: Inter-Socket Data Sharing via a Common DIMM Channel.	MEMSYS	2016	DBLP DOI BibTeX RDF
38	Amit Hadke, Tony Benavides, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Design and evaluation of an optical CPU-DRAM interconnect.	ICCD	2008	DBLP DOI BibTeX RDF
27	Chaemin Lim, Suhyun Lee, Jinwoo Choi 0003, Jounghoo Lee, Seongyeon Park, Hanjun Kim 0001, Jinho Lee, Youngsok Kim	Design and Analysis of a Processing-in-DIMM Join Algorithm: A Case Study with UPMEM DIMMs.	Proc. ACM Manag. Data	2023	DBLP DOI BibTeX RDF
27	Palash Das, Hemangee K. Kapoor	NDIE: A Near DRAM Inference Engine Exploiting DIMM's Parallelism.	APCCAS	2023	DBLP DOI BibTeX RDF
27	Cong Li, Zhe Zhou, Xingchen Li, Guangyu Sun 0003, Dimin Niu	NMExplorer: An Efficient Exploration Framework for DIMM-based Near-Memory Tensor Reduction.	DAC	2023	DBLP DOI BibTeX RDF
27	Phil Murray, Feras Al-Hawari	Challenges in implementing DDR3 memory interface on PCB systems: a methodology for interfacing DDR3 SDRAM DIMM to an FPGA.	CoRR	2022	DBLP DOI BibTeX RDF
27	Teng Tian, Xiaotian Wang, Letian Zhao, Wei Wu, Xuecang Zhang, Fangmin Lu, Tianqi Wang, Xi Jin 0002	G-NMP: Accelerating Graph Neural Networks with DIMM-based Near-Memory Processing.	J. Syst. Archit.	2022	DBLP DOI BibTeX RDF
27	Donghun Lee 0001, Jinin So, Minseon Ahn, Jong-Geon Lee, Jungmin Kim, Jeonghyeon Cho, Oliver Rebholz, Vishnu Charan Thummala, Ravi Shankar JV, Sachin Suresh Upadhya, Mohammed Ibrahim Khan, Jin Hyun Kim	Improving In-Memory Database Operations with Acceleration DIMM (AxDIMM).	DaMoN	2022	DBLP DOI BibTeX RDF
27	Lingfeng Xiang, Xingsheng Zhao, Jia Rao, Song Jiang 0001, Hong Jiang 0001	Characterizing the performance of intel optane persistent memory: a close look at its on-DIMM buffering.	EuroSys	2022	DBLP DOI BibTeX RDF
27	Taeyoung Chung, Sooa Kim, Jehyung Yoon, Heeseok Han, Kyung Soo Park, Hokyu Lee, Ho-Young Yoon, Sun-Kyu Lee, Jongyoon Lim, Yongjin Kwon, Jungbong Lee, Sung-Ung Kwak	A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression.	VLSI Circuits	2021	DBLP DOI BibTeX RDF
27	Shinobu Miwa, Masaya Ishihara, Hayato Yamaki, Hiroki Honda, Martin Schulz 0001	Footprint-Based DIMM Hotplug.	IEEE Trans. Computers	2020	DBLP DOI BibTeX RDF
27	Tianyue Lu, Haiyang Pan, Mingyu Chen 0001	System measurement of Intel AEP Optane DIMM.	CoRR	2020	DBLP BibTeX RDF
27	Wenqin Huangfu, Krishna T. Malladi, Shuangchen Li, Peng Gu, Yuan Xie 0001	NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting.	ICCAD	2020	DBLP DOI BibTeX RDF
27	Wenqin Huangfu, Xueqi Li 0001, Shuangchen Li, Xing Hu 0001, Peng Gu, Yuan Xie 0001	MEDAL: Scalable DIMM based Near Data Processing Accelerator for DNA Seeding Algorithm.	MICRO	2019	DBLP DOI BibTeX RDF
27	Zhe Sun, Ting Wang 0003, Ke Deng, Xiao-Feng Wang, Robert Lafyatis, Ying Ding 0003, Ming Hu 0001, Wei Chen 0074	DIMM-SC: a Dirichlet mixture model for clustering droplet-based single cell transcriptomic data.	Bioinform.	2018	DBLP DOI BibTeX RDF
27	Ali Shafiee, Rajeev Balasubramonian, Mohit Tiwari, Feifei Li 0001	Secure DIMM: Moving ORAM Primitives Closer to Memory.	HPCA	2018	DBLP DOI BibTeX RDF
27	Frederick A. Ware, Javier Bueno, Liji Gopalakrishnan, Brent Haukness, Chris Haywood, Toni Juan, Eric Linstadt, Sally A. McKee, Steven C. Woo, Kenneth L. Wright, Craig Hampel, Gary Bronner	Architecting a hardware-managed hybrid DIMM optimized for cost/performance.	MEMSYS	2018	DBLP DOI BibTeX RDF
27	Young-Kyu Kim, Yong-Hwan Lee, Byungin Moon	A study of partitioned DIMM tree management for multimedia server systems.	Multim. Tools Appl.	2017	DBLP DOI BibTeX RDF
27	Ioana Giurgiu, Dorothea Wiesmann, John Bird	"Memory loss" in commodity hardware?: predicting DIMM failures with machine learning.	SYSTOR	2017	DBLP DOI BibTeX RDF
27	Seoung-hyun Koh, Yen-Yoo You, Do-sung Na	Object-based dynamic influence measurement model (DIMM) using social data (on facebook).	Clust. Comput.	2016	DBLP DOI BibTeX RDF
27	Meysam Taassori, Ali Shafiee, Rajeev Balasubramonian	Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system.	ICCD	2016	DBLP DOI BibTeX RDF
27	Kazuichi Oe, Takeshi Nanri, Koji Okamura	Feasibility Study for Building Hybrid Storage System Consisting of Non-volatile DIMM and SSD.	CANDAR	2016	DBLP DOI BibTeX RDF
27	Michael Bucher, Ravi T. Kollipara, Bruce Su, Liji Gopalakrishnan, Kashinath Prabhu, Pravin Kumar Venkatesan, Kambiz Kaviani, Barry Daly, William F. Stonecypher, Wayne D. Dettloff, Teva Stone, Fred Heaton, Yi Lu, Chris J. Madden, Sanath Bangalore, John C. Eble, Nhat Nguyen, Lei Luo 0006	A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
27	Kambiz Kaviani, Michael Bucher, Bruce Su, Barry Daly, Bill Stonecypher, Wayne D. Dettloff, Teva Stone, Kashinath Prabhu, Pravin Kumar Venkatesan, Fred Heaton, Ravi T. Kollipara, Yi Lu, Chris J. Madden, John C. Eble, Lei Luo 0006, Nhat Nguyen	A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.	ISSCC	2013	DBLP DOI BibTeX RDF
27	Qing Guo 0004, Xiaochen Guo, Ravi Patel 0001, Engin Ipek, Eby G. Friedman	AC-DIMM: associative computing with STT-MRAM.	ISCA	2013	DBLP DOI BibTeX RDF
27	Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang	Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2012	DBLP DOI BibTeX RDF
27	Mu-Tien Chang, Joe Gross, Bruce L. Jacob	Energy-Efficient Cached DIMM Architecture.	MASCOTS	2012	DBLP DOI BibTeX RDF
27	Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, M. Frank Chang	The DIMM tree architecture: A high bandwidth and scalable memory system.	ICCD	2011	DBLP DOI BibTeX RDF
27	Young-Chan Jang, Hoeju Chung, Youngdon Choi, Hwan-Wook Park, Jaekwan Kim 0003, Soouk Lim, Jung Sunwoo, Moon-Sook Park, Hyung-Seuk Kim, Sang-Yun Kim, Yun-Sang Lee, Woo-Seop Kim, Jung-Bae Lee, Jei-Hwan Yoo, Changhyun Kim	BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel.	IEEE J. Solid State Circuits	2009	DBLP DOI BibTeX RDF
27	Jung Ho Ahn, Jacob Leverich, Robert S. Schreiber, Norman P. Jouppi	Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs.	IEEE Comput. Archit. Lett.	2009	DBLP DOI BibTeX RDF
27	Dirk Pfaff, Sivakumar Kanesapillai, Volodymyr Yavorskyy, Carlos Carvalho, Reza Yousefi, Muhammad Ali Khan, Trevor Monson, Mark Ayoub, Claus Reitlingshoefer	A 1.8W 115Gb/s Serial Link for Fully Buffered DIMM with 2.1ns Pass-Through Latency in 90nm CMOS.	ISSCC	2008	DBLP DOI BibTeX RDF
27	Hamid Partovi, Wolfgang Walthes, Luca Ravezzi, Paul Lindt, Sivaraman Chokkalingam, Karthik Gopalakrishnan, Andreas Blum, Otto Schumacher, Claudio Andreotti, Michael Bruennert, Bruno Celli-Urbani, Dirk Friebe, Ivo Koren, Michael Verbeck, Ulrich Lange	Data Recovery and Retiming for the Fully Buffered DIMM 4.8Gb/s Serial Links.	ISSCC	2006	DBLP DOI BibTeX RDF
27	Paul Vincent Mejia, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Performance Evaluation of a Multicore System with Optically Connected Memory Modules.	NOCS	2010	DBLP DOI BibTeX RDF	OC-DIMM, DWDM, Performance Evaluation, DRAM, Optics
27	Yeonjung Kang, Haeryong Park, Kilsoo Chun, Junghwan Song	A Digital Identity Management Service Model.	ITNG	2008	DBLP DOI BibTeX RDF	IDSP, DIMM, User, Identity Management, SP
27	Sivakumar Radhakrishnan, Sundaram Chinthamani, Kai Cheng	The Blackford Northbridge Chipset for the Intel 5000.	IEEE Micro	2007	DBLP DOI BibTeX RDF	platform architecture, dual-processor system, northbridge chipset, I/O bridges, FB-DIMM memory technology, low-power design, shared memory
19	Doe Hyun Yoon, Mattan Erez	Virtualized and flexible ECC for main memory.	ASPLOS	2010	DBLP DOI BibTeX RDF	fault tolerance, reliability, error correction, memory systems
19	Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber	Future scaling of processor-memory interfaces.	SC	2009	DBLP DOI BibTeX RDF
19	Hongzhong Zheng, Jiang Lin, Zhao Zhang 0010, Eugene Gorbatov, Howard David, Zhichun Zhu	Mini-rank: Adaptive DRAM architecture for improving memory power efficiency.	MICRO	2008	DBLP DOI BibTeX RDF
19	Domingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque	Adaptive L2 Cache for Chip Multiprocessors.	Euro-Par Workshops	2007	DBLP DOI BibTeX RDF
19	Tomotaka Miyashiro, Akira Kitamura, Hironori Nakajo, Noboru Tanabe	DIMMnet-2: A Reconfigurable Board Connected Into a Memory Slot.	FPL	2006	DBLP DOI BibTeX RDF
19	David Wang 0003, Brinda Ganesh, Nuengwong Tuaycharoen, Kathleen Baynes, Aamer Jaleel, Bruce L. Jacob	DRAMsim: a memory system simulator.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
19	Sayantan Sur, Abhinav Vishnu, Hyun-Wook Jin, Wei Huang 0003, Dhabaleswar K. Panda 0001	Can Memory-Less Network Adapters Benefit Next-Generation InfiniBand Systems?.	Hot Interconnects	2005	DBLP DOI BibTeX RDF
19	Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano	On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism.	ISPAN	2000	DBLP DOI BibTeX RDF