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Publication years (Num. hits)
1990-2005 (28) 2006 (40) 2007 (58) 2008 (43) 2009 (37) 2010 (17) 2011-2012 (19) 2013 (18) 2014-2015 (17) 2016-2017 (17) 2018-2020 (26) 2021-2022 (22) 2023-2024 (14)
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article(98) inproceedings(257) phdthesis(1)
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Found 356 publication records. Showing 356 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
60Jia-Ming Chen, Chih-Hao Chang, Shau-Yin Tseng, Jenq Kuen Lee, Wei-Kuan Shih Power Aware H.264/AVC Video Player on PAC Dual-Core SoC Platform. Search on Bibsonomy EUC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Dual-Core SoC, H.264/AVC, Power-aware, DVFS
54Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei Chang, Jenq Kuen Lee Enabling Streaming Remoting on Embedded Dual-Core Processors. Search on Bibsonomy ICPP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
51Pawel Gepner, David L. Fraser, Michal Filip Kowalik Performance Evolution and Power Benefits of Cluster System Utilizing Quad-Core and Dual-Core Intel Xeon Processors. Search on Bibsonomy PPAM The full citation details ... 2007 DBLP  DOI  BibTeX  RDF dual-core processors, quad-core processors, parallel processing, benchmarks, HPC, multi-core processors
47George S. Almási, Leonardo R. Bachega, Siddhartha Chatterjee, Manish Gupta 0002, Derek Lieber, Xavier Martorell, José E. Moreira Enabling Dual-Core Mode in BlueGene/L: Challenges and Solutions. Search on Bibsonomy SBAC-PAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
46Lu Peng 0001, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-Kuang Chen, David M. Koppelman Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study. Search on Bibsonomy IPCCC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
46Chun-Hao Hsu, Jian Jhen Chen, Shiao-Li Tsao Evaluation and modeling of power consumption of a heterogeneous dual-core processor. Search on Bibsonomy ICPADS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
42Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Ana Sonia Leon A dual-core 64b ultraSPARC microprocessor for dense server applications. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF L2, UltraSPARC, coupling noise, deep submicron technology, dense server, dual-core, throughput computing, cache, multiprocessor, leakage, NBTI, negative bias temperature instability
40Daisuke Takahashi An Implementation of Parallel 1-D FFT Using SSE3 Instructions on Dual-Core Processors. Search on Bibsonomy PARA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
39Christian El Salloum, Andreas Steininger, Peter Tummeltshammer, Werner Harter Recovery Mechanisms for Dual Core Architectures. Search on Bibsonomy DFT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
39Cheng-Nan Chiu, Chien-Tang Tseng, Chun-Jen Tsai Tightly-coupled MPEG-4 video encoder framework on asymmetric dual-core platforms. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Ryan E. Grant, Ahmad Afsahi A Comprehensive Analysis of OpenMP Applications on Dual-Core Intel Xeon SMPs. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Rui Gong, Kui Dai, Zhiying Wang 0003 Transient Fault Tolerance on Chip Multiprocessor Based on Dual and Triple Core Redundancy. Search on Bibsonomy PRDC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
34Fadi N. Sibai Evaluating the performance of single and multiple core processors with PCMARK®05 and benchmark analysis. Search on Bibsonomy SIGMETRICS Perform. Evaluation Rev. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF performance benchmark, single and dual core processors, workload characterization
33Kwangsik Kim, Dohun Kim, Chanik Park Real-time Scheduling in Heterogeneous Dual-core Architectures. Search on Bibsonomy ICPADS (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark A. Heinrich Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads. Search on Bibsonomy ISPASS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF active memory cluster, directory protocol thread, active memory address remapping, parallel reduction, coherence protocol extension, software protocol, multi-threaded node, dual-core node, active memory architecture, distributed shared memory, multiprocessor architecture, memory controller, matrix transpose
32Iman Faraji, Moslem Didehban, Hamid R. Zarandi Analysis of Transient Faults on a MIPS-Based Dual-Core Processor. Search on Bibsonomy ARES The full citation details ... 2010 DBLP  DOI  BibTeX  RDF Dual-core microprocessor, Microprocessor without Interlocked Pipeline Stages (MIPS), simulation-based fault injection, vulnerability analysis, fault propagation
32Chih-Lun Fang, Tsung-Han Tsai 0001, Ren-Chih Kuo Design and Implementation of a Videotext Extractor on Dual-Core Platform. Search on Bibsonomy APSCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
30Rui Gong, Kui Dai, Zhiying Wang 0003 Transient Fault Recovery on Chip Multiprocessor based on Dual Core Redundancy and Context Saving. Search on Bibsonomy ICYCS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
30Eric S. Fetzer Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF dual core, Itanium microprocessor, Montecito, adaptive circuits, cache safe technology, active clock deskew, process variation, power measurement
29Hee Seo, Seon Wook Kim OpenMP Directive Extension for BlackFin 561 Dual Core Processor. Search on Bibsonomy CIT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
28Meilian Xu, Parimala Thulasiraman Parallel Algorithm Design and Performance Evaluation of FDTD on 3 Different Architectures: Cluster, Homogeneous Multicore and Cell/B.E. Search on Bibsonomy HPCC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
28Sadaf R. Alam, Pratul K. Agarwal On the Path to Enable Multi-scale Biomolecular Simulations on PetaFLOPS Supercomputer with Multi-core Processors. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Viren Kumar, James P. Delgrande Optimal Multicore Scheduling: An Application of ASP Techniques. Search on Bibsonomy LPNMR The full citation details ... 2009 DBLP  DOI  BibTeX  RDF clingo, edge cover, scheduling, multicore, ASP
27Kiyotaka Takahashi, Eigo Mori Architectural Design of a DSP Scripting Language for Mobile Multimedia Terminals. Search on Bibsonomy AINA (2) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
26Noriyuki Ito, Hiroaki Komatsu, Akira Kanuma, Akihiro Yoshitake, Yoshiyasu Tanamura, Hiroyuki Sugiyama, Ryoichi Yamashita, Ken-ichi Nabeya, Hironobu Yoshino, Hitoshi Yamanaka, Masahiro Yanagida, Yoshitomo Ozeki, Kinya Ishizaka, Takeshi Kono, Yutaka Isoda Design Methodology for 2.4GHz Dual-Core Microprocessor. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Jianxun Jason Ding, Abdul Waheed Dual Processor Performance Characterization for XML Application-Oriented Networking. Search on Bibsonomy ICPP The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
25Thomas Kottke, Andreas Steininger A Reconfigurable Generic Dual-Core Architecture. Search on Bibsonomy DSN The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
25Huiyang Zhou Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window. Search on Bibsonomy IEEE PACT The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
24Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Gregory B. Newby Experimental Evaluation of Emerging Multi-core Architectures. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
24Mark C. Johnson, Eric P. Villasenor, Olga Krachina, Mithuna Thottethodi Undergraduate dual-core prototyping and analysis of factors influencing student success on dual-core designs. Search on Bibsonomy MSE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
22Yi Ma, Hongliang Gao, Martin Dimitrov, Huiyang Zhou Optimizing Dual-Core Execution for Power Efficiency and Transient-Fault Recovery. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Multiple data stream architectures, fault tolerance, low-power design
22Michael G. Benjamin, David R. Kaeli Stream Image Processing on a Dual-Core Embedded System. Search on Bibsonomy SAMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Carol Currie Sobczak, James Kessler, David Eldridge The dual os classroom: if you build it, will they come? Search on Bibsonomy SIGUCCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF boot camp, deep freeze, intel dual core, winbatch, parallels, imaging, deployment, support, classroom technology
20David Geer Industry Trends: Chip Makers Turn to Multicore Processors. Search on Bibsonomy Computer The full citation details ... 2005 DBLP  DOI  BibTeX  RDF dual-core chips, processor architectures, multicore processors
20Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen A unified processor architecture for RISC & VLIW DSP. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF dual-core processor, register organization, variable-length instruction encoding, digital signal processor
20Hossein Pourreza, Peter Graham On the Programming Impact ofMulti-Core, Multi-Processor Nodes inMPI Clusters. Search on Bibsonomy HPCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20James Donald, Margaret Martonosi An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation. Search on Bibsonomy IEEE Comput. Archit. Lett. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
20Hisashige Ando, Nestoras Tzartzanis, William W. Walker A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
19Pranav Vaidya, Jaehwan John Lee Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor. Search on Bibsonomy CIKM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF column-oriented databases, monetdb, tpc-h, performance profiling
19Eva Beckschulze, Falk Salewski, Thomas Siegbert, Stefan Kowalewski Fault Handling Approaches on Dual-Core Microcontrollers in Safety-Critical Automotive Applications. Search on Bibsonomy ISoLA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
19Rod Fatoohi Performance Evaluation of the Dual-Core Based SGI Altix 4700. Search on Bibsonomy SBAC-PAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
19Raj Varada, Mysore Sriram, Kris Chou, James Guzzo Design and integration methods for a multi-threaded dual core 65nm Xeon® processor. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Xeon®, Integration, Design Methods, processor
19Prachuryya Subash Das, Deepjyoti Deb, Rupam Goswami, Santanu Sharma, Rajesh Saha Fin core dimensionality and corner effect in dual core gate-all-around FinFET. Search on Bibsonomy Microelectron. J. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Sujoy Pandit, Prateek Sikka Design and Implementation of Power Optimized Dual Core and Single Core DLX Processor on FPGA. Search on Bibsonomy ICCCNT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
19Dragan S. Rakic, Dragan S. Djordjevic Star, sharp, core and dual core partial order in rings with involution. Search on Bibsonomy Appl. Math. Comput. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
19Fan Xu, Li Shen 0007, Zhiying Wang 0003, Hui Guo 0004, Bo Su, Wei Chen 0009 Customized Core Layout: A Case Study on Dual-Core Dynamic Binary Translation System. Search on Bibsonomy CIT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
19Rajesh Kannan Megalingam, Ashwin Mohan, Shekhil Hassan Thavalengal, Tanmay Muralidhar Rao, Vivek Periye Low Power Single Core CPU for a Dual Core Microcontroller. Search on Bibsonomy ICETET The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
19Lei Chai, Qi Gao 0004, Dhabaleswar K. Panda 0001 Understanding the Impact of Multi-Core Architecture in Cluster Computing: A Case Study with Intel Dual-Core System. Search on Bibsonomy CCGRID The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Ashley M. DeFlumere, Sadaf R. Alam Exploring multi-core limitations through comparison of contemporary systems. Search on Bibsonomy Richard Tapia Celebration of Diversity in Computing Conference The full citation details ... 2009 DBLP  DOI  BibTeX  RDF performance evaluation and analysis, benchmarking, multi-core processor
18Sadaf R. Alam, Pratul K. Agarwal, Scott S. Hampton, Hong Ong Experimental Evaluation of Molecular Dynamics Simulations on Multi-core Systems. Search on Bibsonomy HiPC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Performance, Multicore, HPC, Molecular Dynamics Simulation
18Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen A Compact DSP Core with Static Floating-Point Arithmetic. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen A 52mW 1200MIPS compact DSP for multi-core media SoC. Search on Bibsonomy ASP-DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen A compact DSP core with static floating-point unit & its microcode generation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF DSP core, digital signal processor, floating-point units
17Yuhang Liu, Haifeng Ma Dual core generalized inverse of third-order dual tensor based on the T-product. Search on Bibsonomy Comput. Appl. Math. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
17Wei Deng 0001, Haikun Jia, Rui Wu 0001, Shiyan Sun, Chenggang Li, Zhihua Wang 0001, Baoyong Chi An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator. Search on Bibsonomy CICC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
17Haixia Han, Donglian Hou, Nannan Luan, Zhenxu Bai, Li Song, Jianfei Liu, Yongsheng Hu Surface Plasmon Resonance Sensor Based on Dual-Side Polished Microstructured Optical Fiber with Dual-Core. Search on Bibsonomy Sensors The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
17José Luis García-Lapresta, Ricardo Alberto Marques Pereira The self-dual core and the anti-self-dual remainder of an aggregation operator. Search on Bibsonomy Fuzzy Sets Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Cameron McNairy, Rohit Bhatia Montecito: A Dual-Core, Dual-Thread Itanium Processor. Search on Bibsonomy IEEE Micro The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Reliability, Power Management, Cache memories, Multithreaded processors, Testing and Fault-Tolerance
17Rod Fatoohi Performance evaluation of NSF application benchmarks on parallel systems. Search on Bibsonomy IPDPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Subhash Saini, Dale Talcott, Dennis C. Jespersen, M. Jahed Djomehri, Haoqiang Jin, Rupak Biswas Scientific application-based performance comparison of SGI Altix 4700, IBM POWER5+, and SGI ICE 8200 supercomputers. Search on Bibsonomy SC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Damian Dechev, Peter Pirkelbauer, Bjarne Stroustrup Lock-Free Dynamically Resizable Arrays. Search on Bibsonomy OPODIS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF real-time systems, concurrency, C++, vector, lock-free, STL
16Peter Tummeltshammer, Andreas Steininger On the role of the power supply as an entry for common cause faults - An experimental analysis. Search on Bibsonomy DDECS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
16Ralph K. Cavin III, James A. Hutchby, Victor V. Zhirnov, Joe E. Brewer, George Bourianoff Emerging Research Architectures. Search on Bibsonomy Computer The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
16Jaime H. Moreno Chip-level integration: the new frontier for microprocessor architecture. Search on Bibsonomy SPAA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF chip-level integration, microprocessor architecture
14Dong Hyuk Woo, Hsien-Hsin S. Lee PROPHET: goal-oriented provisioning for highly tunable multicore processors in cloud computing. Search on Bibsonomy ACM SIGOPS Oper. Syst. Rev. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
14Matin Hashemi, Soheil Ghiasi Exact and Approximate Task Assignment Algorithms for Pipelined Software Synthesis. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
14George Teodoro, Daniel Fireman, Dorgival Olavo Guedes Neto, Wagner Meira Jr., Renato Ferreira 0001 Achieving Multi-Level Parallelism in the Filter-Labeled Stream Programming Model. Search on Bibsonomy ICPP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
14Pitch Patarasuk, Xin Yuan 0001 Bandwidth Efficient All-reduce Operation on Tree Topologies. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
14Wenlong Li, Xiaofeng Tong, Yimin Zhang 0002 Optimization and Parallelization on a Multimeida Application. Search on Bibsonomy ICME The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
14Rikun Liao, Yuefeng Ji, Hui Li 0033 Interface Design and QoS Performance of Video Monitor System. Search on Bibsonomy ICICIC (3) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Ali El-Moursy, Rajeev Garg, David H. Albonesi, Sandhya Dwarkadas Compatible phase co-scheduling on a CMP of multi-threaded processors. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Jonathan Ezekiel, Gerald Lüttgen, Radu Siminiceanu Can Saturation Be Parallelised? Search on Bibsonomy FMICS/PDMC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Lei Chai, Albert Hartono, Dhabaleswar K. Panda 0001 Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters. Search on Bibsonomy CLUSTER The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
13Sadaf R. Alam, Richard F. Barrett, Heike Jagode, Jeffery A. Kuehn, Stephen W. Poole, Ramanan Sankaran Impact of Quad-Core Cray XT4 System and Software Stack on Scientific Computation. Search on Bibsonomy Euro-Par The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
13Pascal Vezolle, Stéphane Vialle, Xavier Warin Large scale experiment and optimization of a distributed stochastic control algorithm. Application to energy management problems. Search on Bibsonomy IPDPS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
13Jing Liang, Yinqin Wu Wireless ECG Monitoring System Based on OMAP. Search on Bibsonomy CSE (2) The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
13Noriko Takagi, Hiroshi Sasaki 0001, Masaaki Kondo, Hiroshi Nakamura Cooperative shared resource access control for low-power chip multiprocessors. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF low power, chip multiprocessors, cache partitioning, dvfs, resource conflict
13Qian Diao, Justin J. Song Prediction of CPU idle-busy activity pattern. Search on Bibsonomy HPCA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
13Kostas Papadopoulos, Kyriakos Stavrou, Pedro Trancoso HelperCoreDB: Exploiting multicore technology to improve database performance. Search on Bibsonomy IPDPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
13Partha Tirumalai, Yonghong Song, Spiros Kalogeropulos Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor Architectures. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
13Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vetter Balancing productivity and performance on the cell broadband engine. Search on Bibsonomy CLUSTER The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
13Sadaf R. Alam, Richard F. Barrett, Jeffery A. Kuehn, Philip C. Roth, Jeffrey S. Vetter Characterization of Scientific Workloads on Systems with Multi-Core Processors. Search on Bibsonomy IISWC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
13Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August Automatic Thread Extraction with Decoupled Software Pipelining. Search on Bibsonomy MICRO The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
12Zhenkun Shi, Sen Wang 0001, Lin Yue, Yijia Zhang, Binod Kumar Adhikari, Shuai Xue, Wanli Zuo, Xue Li 0001 Dual-core mutual learning between scoring systems and clinical features for ICU mortality prediction. Search on Bibsonomy Inf. Sci. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Demyana Emil, Mohammed Hamdy, Gihan Nagib Development an efficient AXI-interconnect unit between set of customized peripheral devices and an implemented dual-core RISC-V processor. Search on Bibsonomy J. Supercomput. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Xi Meng, Haoran Li, Peng Chen 0022, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Satyam Shukla, Utkarsh, Md Azam, Kailash Chandra Ray An Efficient Fault-Tolerant Instruction Decoder for RISC-V Based Dual-Core Soft-Processors. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Jiayue Wan, Zesong Fei, Zicheng Liu 0009, Quanwen Qi, Fang Han, Xiaoran Li, Zhiming Chen 0001 A 20.65-to-40.55 GHz Dual-Core Quad-Mode VCO With Mode-Independent Transformer-Switching Technique in 65-nm CMOS. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Pegdwende Romaric Nikiema, Angeliki Kritikakou, Marcello Traiola, Olivier Sentieys Design with low complexity fine-grained Dual Core Lock-Step (DCLS) RISC-V processors. Search on Bibsonomy DSN-S The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Duc M. Tran, Joon-Young Choi Distributed Data Logger Based on Dual-Core MCU in Motor Drive. Search on Bibsonomy MCSoC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Marcello Barbirotta, Francesco Menichelli, Antonio Mastrandrea, Abdallah Cheikh, Marco Angioli, Saeid Jamili, Mauro Olivieri Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects. Search on Bibsonomy ApplePies The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Qixiu Wu, Wei Deng 0001, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang 0001, Baoyong Chi An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation Technique. Search on Bibsonomy ISSCC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy. Search on Bibsonomy ISCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy. Search on Bibsonomy ISCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Xiangjian Kong, Ding Qiu, Mingchao Jian, Chunbing Guo, Kai Xu A Dual-Core Quad_Mode VCO with Reconfigurable Magnetic Coupling Mode and Negative-Resistive Mode Switch. Search on Bibsonomy ASICON The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Zheng Xu, Xinjie Zhou, Zhiqiang Xiao A Hardware Backup Dual-Core Lockstep for Error Checking and Recovery. Search on Bibsonomy EITCE The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
12Tonglei Cheng, Bin Li 0066, Fan Zhang 0065, Wei Liu 0133, Xiaoyu Chen, Yuanhongliu Gao, Xin Yan 0004, Xuenan Zhang, Fang Wang, Takenobu Suzuki, Yasutake Ohishi A Sagnac Interferometer-Based Twist Angle Sensor Drawing on an Eccentric Dual-Core Fiber. Search on Bibsonomy IEEE Trans. Instrum. Meas. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
12Yujun Xie, Yuan Liu 0022, Xin Zheng 0001, Wenhao Zhu, Junxian Li, Jianzhong Li, Shuting Cai, Xiaoming Xiong A Dual-Core High-Performance Processor for Elliptic Curve Cryptography in GF(p) Over Generic Weierstrass Curves. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
12Ethan Chou, Lorenzo Iotti, Ali M. Niknejad Design of an Inductor-Less 72-GHz 2: 1 CMOS CML Frequency Divider With Dual-Core VCO. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
12Zhenkun Shi, Qianqian Yuan, Ruoyu Wang 0025, Hoaran Li, Xiaoping Liao, Hongwu Ma ECRECer: Enzyme Commission Number Recommendation and Benchmarking based on Multiagent Dual-core Learning. Search on Bibsonomy CoRR The full citation details ... 2022 DBLP  BibTeX  RDF
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