Search results for "elmore"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
147	Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu	Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model.	ICCD	2002	DBLP DOI BibTeX RDF
94	Yehea I. Ismail, Eby G. Friedman, José Luis Neves	Equivalent Elmore delay for RLC trees.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
94	Nevine Nassif, Madhav P. Desai, Dale H. Hall	Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a 600MHz CMOS Microprocessor.	DAC	1998	DBLP DOI BibTeX RDF	reconstruction, emulation, visibility, functional simulation
94	Rohini Gupta, Bogdan Tutuianu, Lawrence T. Pileggi	The Elmore delay as a bound for RC trees with generalized input signals.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
81	Satoshi Tayu, Mineo Kaneko	Characterization and computation of Steiner wiring based on Elmore's delay model.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
76	Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-Wen Albert Tsao	Bounded-skew clock and Steiner routing under Elmore delay.	ICCAD	1995	DBLP DOI BibTeX RDF	bounded-skew, pathlength delay, VLSI, global routing, Elmore delay, zero-skew, zero-skew, clock routing, routing trees
67	Andrew B. Kahng, Chung-Wen Albert Tsao	Low-cost single-layer clock trees with exact zero Elmore delay skew.	ICCAD	1994	DBLP DOI BibTeX RDF
67	Youxin Gao, D. F. Wong 0001	Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model.	DATE	2000	DBLP DOI BibTeX RDF
67	Yehea I. Ismail, Eby G. Friedman, José Luis Neves	Signal waveform characterization in RLC trees.	ISCAS (6)	1999	DBLP DOI BibTeX RDF
67	Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins	Near-optimal critical sink routing tree constructions.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
63	Youxin Gao, D. F. Wong 0001	Optimal shape function for a bi-directional wire under Elmore delay model.	ICCAD	1997	DBLP DOI BibTeX RDF	Bi-directional wire, Optimal shape, Elmore Delay
63	Chung-Ping Chen, Hai Zhou 0001, D. F. Wong 0001	Optimal non-uniform wire-sizing under the Elmore delay model.	ICCAD	1996	DBLP DOI BibTeX RDF	Elmore delay model, IBM RS/6000 workstation, NWSA-db, NWSA-md, NWSA-wd algorithm, general routing trees, maximum sink delay, minimization objectives, optimal nonuniform wire sizing, routing-tree problem, sink-delay bounds, total area, total weighted sink-delays, wire-sizing formula, circuit analysis computing, Lagrangian relaxation
54	Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman 0001, Parthasarathi Dasgupta	Revisiting fidelity: a case of elmore-based Y-routing trees.	SLIP	2008	DBLP DOI BibTeX RDF	routing, Steiner trees, fidelity, rank correlation
54	Quming Zhou, Kartik Mohanram	Elmore model for energy estimation in RC trees.	DAC	2006	DBLP DOI BibTeX RDF	RC trees, interconnect, Energy estimation
54	Arif Ishaq Abou-Seido, Brian Nowak, Chris Chong-Nuen Chu	Fitted Elmore delay: a simple and accurate interconnect delay model.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
54	Manjit Borah, Robert Michael Owens, Mary Jane Irwin	A fast algorithm for minimizing the Elmore delay to identified critical sinks.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
54	John P. Fishburn	Shaping a VLSI wire to minimize Elmore delay.	ED&TC	1997	DBLP DOI BibTeX RDF
54	Jason Cong, Kwok-Shing Leung	Optimal wiresizing under Elmore delay model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
53	Kanak Agarwal, Dennis Sylvester, David T. Blaauw	A simple metric for slew rate of RC circuits based on two circuit moments.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
53	Charles J. Alpert, Anirudh Devgan, Chandramouli V. Kashyap	RC delay metrics for performance optimization.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
53	Youxin Gao, Martin D. F. Wong	Wire-sizing optimization with inductance consideration using transmission-line model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
53	John Lillis, Premal Buch	Table-Lookup Methods for Improved Performance-Driven Routing.	DAC	1998	DBLP DOI BibTeX RDF	logic synthesis, gate-sizing, fanout optimization
53	Andrew B. Kahng, Sudhakar Muddu	An analytical delay model for RLC interconnects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
53	Chung-Ping Chen, D. F. Wong 0001	Optimal Wire-Sizing Function with Fringing Capacitance Consideration.	DAC	1997	DBLP DOI BibTeX RDF
53	Andrew B. Kahng, Chung-Wen Albert Tsao	Planar-DME: a single-layer zero-skew clock tree router.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
49	Lieven Vandenberghe, Stephen P. Boyd, Abbas El Gamal	Optimal wire and transistor sizing for circuits with non-tree topology.	ICCAD	1997	DBLP DOI BibTeX RDF	optimal circuit sizing, crosstalk, Elmore delay, clock distribution networks
49	Andrew B. Kahng, Kei Masuko, Sudhakar Muddu	Analytical delay models for VLSI interconnects under ramp input.	ICCAD	1996	DBLP DOI BibTeX RDF	SPICE-computed delay, VLSI routing topologies layout, analytical delay models, arbitrary interconnect trees, interconnect transfer function, performance-driven synthesis, ramp input, source-sink delays, VLSI, Elmore delay, interconnect delays, VLSI interconnects, RLC interconnections
41	Min Ni, Seda Ogrenci Memik	Self-heating-aware optimal wire sizing under Elmore delay model.	DATE	2007	DBLP DOI BibTeX RDF
41	Shuji Tsukiyama, Masahiko Tomita	An algorithm for calculating correlation coefficients between Elmore interconnect delays.	ISCAS	2006	DBLP DOI BibTeX RDF
41	Youxin Gao, Martin D. F. Wong	Optimal shape function for a bidirectional wire under Elmore delay model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
41	Youxin Gao, D. F. Wong 0001	Optimal Wire Shape with Consideration of Coupling Capacitance under Elmore Delay Model.	ASP-DAC	1999	DBLP DOI BibTeX RDF
40	Tao Lin, Lawrence T. Pileggi	RC(L) interconnect sizing with second order considerations via posynomial programming.	ISPD	2001	DBLP DOI BibTeX RDF	RC trees, VLSI design automation, central moments, posynomiality, convex programming, interconnect optimization
40	Huibo Hou, Jiang Hu, Sachin S. Sapatnekar	Non-Hanan routing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
40	Xiaodong Yang, Walter H. Ku, Chung-Kuan Cheng	RLC interconnect delay estimation via moments of amplitude and phase response.	ICCAD	1999	DBLP DOI BibTeX RDF
40	Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi	S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
40	Noel Menezes, Chung-Ping Chen	Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect.	VLSI Design	1999	DBLP DOI BibTeX RDF
35	Dukgwon Lee, Seunghyun Beak, Youngmin Lee, Eunser Lee, Jungkook Kim, Gyung-Leen Park, Taikyeong Jeong	Minimize the delay of parasitic capacitance and modeling in RLC circuit.	ICHIT	2009	DBLP DOI BibTeX RDF	Elmore, parasitic capacitance, delay, interconnection, oscillator
35	Yen-Hung Lin, Shu-Hsin Chang, Yih-Lang Li	Critical-trunk based obstacle-avoiding rectilinear steiner tree routings for delay and slack optimization.	ISPD	2009	DBLP DOI BibTeX RDF	elmore delay model, obstacle-avoiding rectilinear steiner tree, performance-driven routing, worst negative slack, timing constraint
35	Soroush Abbaspour, Hanif Fatemi, Massoud Pedram	VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	moment calculation, sources of variation, sensitivity, statistical timing analysis, elmore delay
35	Soroush Abbaspour, Amir H. Ajami, Massoud Pedram, Emre Tuncer	TFA: a threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	elmore, threshold-based filtering algorithm, static timing analysis, moments, AWE
35	Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu 0001, Anirudh Devgan	Closed form expressions for extending step delay and slew metrics to ramp inputs.	ISPD	2003	DBLP DOI BibTeX RDF	Elmore, slew, delay, timing, interconnects, PDF, moments, median, skewness
35	Vasant B. Rao, Jeffrey Soreff, Ravichander Ledalla, Fred L. Yang	Aggressive crunching of extracted RC netlists.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF	RC reduction, TICER, crunching, node elimination, resistor shorting, time constants, interconnect modeling, elmore delay
35	Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu 0001, Anirudh Devgan	PERI: a technique for extending delay and slew metrics to ramp inputs.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF	Elmore, slew, delay, interconnects, PDF, moments, median, skewness, standard deviation
35	Anirudh Devgan	Efficient coupled noise estimation for on-chip interconnects.	ICCAD	1997	DBLP DOI BibTeX RDF	coupled noise estimation, dynamic logic circuit families, noise criticality pruning, physical design based noise avoidance, circuit simulation, on-chip interconnects, Elmore delay, noise analysis, timing simulation, integrated circuit noise, deep submicron design
35	Jason Cong, Lei He 0001	Optimal wiresizing for interconnects with multiple sources.	ACM Trans. Design Autom. Electr. Syst.	1996	DBLP DOI BibTeX RDF	bundled refinement, decomposition of multi-source routing tree, dominance property, multi-source net, multi-source routing tree, optimal wiresizing, variable segment-division, high performance, SPICE, fidelity, interconnect optimization, Elmore delay, local refinement, layout optimization
35	Manjit Borah, Robert Michael Owens, Mary Jane Irwin	Fast algorithm for performance-oriented Steiner routing.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	performance-oriented Steiner routing, fast routing algorithm, Elmore delay minimisation, layout generators, computational complexity, VLSI, data structures, data structures, delays, iterative methods, network routing, circuit layout CAD, integrated circuit layout, iterative techniques
27	Ahmed Soltan, Ahmed G. Radwan, Alex Yakovlev	Elmore delay in the fractional order domain.	ECCTD	2017	DBLP DOI BibTeX RDF
27	Jiani Xie, C. Y. Roger Chen	Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model.	ACM Great Lakes Symposium on VLSI	2015	DBLP DOI BibTeX RDF
27	Mutlu Avci, Serhan Yamaçli	An improved Elmore delay model for VLSI interconnects.	Math. Comput. Model.	2010	DBLP DOI BibTeX RDF
27	Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo O. Johann, Ricardo Reis 0001	The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms.	ICCD	2010	DBLP DOI BibTeX RDF
27	Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis	On the accuracy of Elmore-based Delay Models.	ICECS	2009	DBLP DOI BibTeX RDF
27	Satoshi Tayu, Mineo Kaneko	Characterization and Computation of Steiner Routing Based on Elmore's Delay Model.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2002	DBLP BibTeX RDF
27	Clayton B. McDonald, Randal E. Bryant	Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis.	DAC	2001	DBLP DOI BibTeX RDF
27	Tetsushi Koide, Shin'ichi Wakabayashi	A timing-driven floorplanning algorithm with the Elmore delay model for building block layout.	Integr.	1999	DBLP DOI BibTeX RDF
27	Youxin Gao, D. F. Wong 0001	Shaping a VLSI wire to minimize Elmore delay with consideration of coupling capacitance.	Integr.	1999	DBLP DOI BibTeX RDF
27	Yehea I. Ismail, Eby G. Friedman, José Luis Neves	Equivalent Elmore Delay for RLC Trees.	DAC	1999	DBLP DOI BibTeX RDF
27	Tetsushi Koide, Shin'ichi Wakabayashi, Mitsuhiro Ono, Yutaka Nishimaru, Noriyoshi Yoshida	A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs.	Integr.	1997	DBLP DOI BibTeX RDF
27	Tetsushi Koide, Mitsuhiro Ono, Shin'ichi Wakabayashi, Yutaka Nishimaru	Par-POPINS: a timing-driven parallel placement method with the Elmore delay model for row based VLSIs.	ASP-DAC	1997	DBLP DOI BibTeX RDF
27	Chung-Ping Chen, Yao-Ping Chen, D. F. Wong 0001	Optimal Wire-Sizing Formular Under the Elmore Delay Model.	DAC	1996	DBLP DOI BibTeX RDF
27	Tetsushi Koide, Mitsuhiro Ono, Shin'ichi Wakabayashi, Yutaka Nishimaru	A new performance driven placement method with the Elmore delay model for row based VLSIs.	ASP-DAC	1995	DBLP DOI BibTeX RDF
27	Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John Willis, Lawrence T. Pileggi	The Elmore Delay as a Bound for RC Trees with Generalized Input Signals.	DAC	1995	DBLP DOI BibTeX RDF
27	Todd D. Hodes, Bernard A. McCoy, Gabriel Robins	Dynamically-Wiresized Elmore-Based Routing Constructions.	ISCAS	1994	DBLP DOI BibTeX RDF
27	Sachin S. Sapatnekar	RC Interconnect Optimization Under the Elmore Delay Model.	DAC	1994	DBLP DOI BibTeX RDF
27	Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins	Rectilinear Steiner Trees with Minimum Elmore Delay.	DAC	1994	DBLP DOI BibTeX RDF
27	Jason Cong, Kwok-Shing Leung	Optimal wiresizing under the distributed Elmore delay model.	ICCAD	1993	DBLP DOI BibTeX RDF
27	Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins	Fidelity and Near-Optimality of Elmore-Based Routing Constructions.	ICCD	1993	DBLP DOI BibTeX RDF
27	Zhuo Li 0001, Nancy Ying Zhou, Weiping Shi	Wire Sizing for Non-Tree Topology.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
27	Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen	An efficient gate delay model for VLSI design.	ICCD	2007	DBLP DOI BibTeX RDF
27	Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Chandramouli V. Kashyap	Fast Interconnect and Gate Timing Analysis for Performance Optimization.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
27	Weixiang Shen, Yici Cai, Jiang Hu, Xianlong Hong, Bing Lu	High performance clock routing in X-architecture.	ISCAS	2006	DBLP DOI BibTeX RDF
27	Li-Da Huang, Minghorng Lai, Martin D. F. Wong, Youxin Gao	Maze routing with buffer insertion under transition time constraints.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
27	Minghorng Lai, Martin D. F. Wong	Maze routing with buffer insertion and wiresizing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
27	Li-Da Huang, Minghorng Lai, D. F. Wong 0001, Youxin Gao	Maze Routing with Buffer Insertion under Transition Time Constraints.	DATE	2002	DBLP DOI BibTeX RDF
27	Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter	Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
27	Minghorng Lai, D. F. Wong 0001	Maze routing with buffer insertion and wiresizing.	DAC	2000	DBLP DOI BibTeX RDF
27	Lieven Vandenberghe, Stephen P. Boyd, Abbas A. El Gamal	Optimizing dominant time constant in RC circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
27	Rony Kay, Lawrence T. Pileggi	EWA: efficient wiring-sizing algorithm for signal nets and clock nets.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
27	Rony Kay, Lawrence T. Pileggi	PRIMO: Probability Interpretation of Moments for Delay Calculation.	DAC	1998	DBLP DOI BibTeX RDF	transceiver, spread spectrum communication, RF CMOS, digital radio, ISM frequency band
27	Noel Menezes, Ross Baldick, Lawrence T. Pileggi	A sequential quadratic programming approach to concurrent gate and wire sizing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
27	Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi	Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
27	Noel Menezes, Ross Baldick, Lawrence T. Pileggi	A sequential quadratic programming approach to concurrent gate and wire sizing.	ICCAD	1995	DBLP DOI BibTeX RDF	RC interconnect, optimization, sequential quadratic programming
27	Jirí Vlach, James A. Barby, Anthony Vannelli, T. Talkhan, C.-J. Richard Shi	Group delay as an estimate of delay in logic.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
27	Jean Paul Caisso, Eduard Cerny, Nicholas C. Rumin	A recursive technique for computing delays in series-parallel MOS transistor circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
27	Steven Paul McCormick, Jonathan Allen	Waveform Moment Methods for Improved Interconnection Analysis.	DAC	1990	DBLP DOI BibTeX RDF
26	Tad T. Brunyé, Kelsey Booth, Dalit D. Hendel, Kathleen F. Kerr, Hannah Shucard, Donald L. Weaver, Joann G. Elmore	Machine learning classification of diagnostic accuracy in pathologists interpreting breast biopsies.	J. Am. Medical Informatics Assoc.	2024	DBLP DOI BibTeX RDF
26	Nicoleta J. Economou-Zavlanos, Sophia Bessias, Michael P. Cary, Armando Bedoya, Benjamin Goldstein 0001, John Eric Jelovsek, Cara O'Brien, Nancy Walden, Matthew Elmore, Amanda B. Parrish, Scott Elengold, Kay S. Lytle, Suresh Balu, Michael E. Lipkin, Afreen Idris Shariff, Michael Gao, David Leverenz, Ricardo Henao, David Y. Ming, David M. Gallagher, Michael J. Pencina, Eric G. Poon	Translating ethical and quality principles for the effective, safe and fair development, deployment and use of artificial intelligence technologies in healthcare.	J. Am. Medical Informatics Assoc.	2024	DBLP DOI BibTeX RDF
26	Rui Liu, Jun Hyuk Chang, Riki Otaki, Zhe Heng Eng, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan	Towards Resource-adaptive Query Execution in Cloud Native Databases.	CIDR	2024	DBLP BibTeX RDF
26	John Paparrizos, Chunwei Liu, Aaron J. Elmore, Michael J. Franklin	Querying Time-Series Data: A Comprehensive Comparison of Distance Measures.	IEEE Data Eng. Bull.	2023	DBLP BibTeX RDF
26	Benjamin Williams 0003, Will Palmquist, Ryan Elmore	Simulation-based decision making in the NFL using NFLSimulatoR.	Ann. Oper. Res.	2023	DBLP DOI BibTeX RDF
26	John S. Schreck, David John Gagne II, Charlie Becker, William E. Chapman, Kim Elmore, Gabrielle Gantos, Eliot Kim, Dhamma Kimpara, Thomas Martin, Maria J. Molina, Vanessa M. Pryzbylo, Jacob Radford, Belen Saavedra, Justin Willson, Christopher D. Wirz	Evidential Deep Learning: Enhancing Predictive Uncertainty Estimation for Earth System Science Applications.	CoRR	2023	DBLP DOI BibTeX RDF
26	Siyuan Xia, Zhiru Zhu, Chris Zhu, Jinjin Zhao, Kyle Chard, Aaron J. Elmore, Ian T. Foster, Michael J. Franklin, Sanjay Krishnan, Raul Castro Fernandez	Data Station: Delegated, Trustworthy, and Auditable Computation to Enable Data-Sharing Consortia with a Data Escrow.	CoRR	2023	DBLP DOI BibTeX RDF
26	Raul Castro Fernandez, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan, Chenhao Tan	How Large Language Models Will Disrupt Data Management. (PDF / PS)	Proc. VLDB Endow.	2023	DBLP DOI BibTeX RDF
26	John Paparrizos, Kaize Wu, Aaron J. Elmore, Christos Faloutsos, Michael J. Franklin	Accelerating Similarity Search for Elastic Measures: A Study and New Generalization of Lower Bounding Distances. (PDF / PS)	Proc. VLDB Endow.	2023	DBLP DOI BibTeX RDF
26	Georgia Koutrika, Jun Yang 0001, Manos Athanassoulis, Kostas Stefanidis, Ju Fan, Abdul Quamar, Yuanyan Tian, Alekh Jindal, Carsten Binnig, Jennie Rogers, Senjuti Basu Roy, Steven Euijong Whang, Matthias Boehm 0001, Aaron J. Elmore, Vasilis Efthymiou, Xiao Hu 0005, Xiaofang Zhou 0001, Alan D. Fekete	Front Matter.	Proc. VLDB Endow.	2023	DBLP BibTeX RDF
26	Rui Liu 0002, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan	Rotary: A Resource Arbitration Framework for Progressive Iterative Analytics.	ICDE	2023	DBLP DOI BibTeX RDF
26	Kechun Liu, Beibin Li, Wenjun Wu, Caitlin J. May, Oliver Chang, Stevan Knezevich, Lisa M. Reisch, Joann G. Elmore, Linda G. Shapiro	VSGD-Net: Virtual Staining Guided Melanocyte Detection on Histopathological Images.	WACV	2023	DBLP DOI BibTeX RDF
26	Cangjiao Wang, Andrew J. Elmore, Izaya Numata, Mark A. Cochrane, Shaogang Lei, Christopher R. Hakkenberg, Yuanyuan Li, Yibo Zhao, Yu Tian	A Framework for Improving Wall-to-Wall Canopy Height Mapping by Integrating GEDI LiDAR.	Remote. Sens.	2022	DBLP DOI BibTeX RDF
26	Andre Kleyner, David Elmore	Warranty data maturity - Effect of observation time on reliability prediction and the warranty management process.	Qual. Reliab. Eng. Int.	2022	DBLP DOI BibTeX RDF
26	Sachin Mehta, Ximing Lu, Wenjun Wu, Donald L. Weaver, Hannaneh Hajishirzi, Joann G. Elmore, Linda G. Shapiro	End-to-End diagnosis of breast biopsy images with transformers.	Medical Image Anal.	2022	DBLP DOI BibTeX RDF
26	Shima Nofallah, Wenjun Wu, Kechun Liu, Fatemeh Ghezloo, Joann G. Elmore, Linda G. Shapiro	Automated analysis of whole slide digital skin biopsy images.	Frontiers Artif. Intell.	2022	DBLP DOI BibTeX RDF