Search results for "fetch-throttling"

Found 8 publication records. Showing 8 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
101	Osman S. Unsal, Israel Koren, C. Mani Krishna 0001, Csaba Andras Moritz	Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling.	IEEE Comput. Archit. Lett.	2002	DBLP DOI BibTeX RDF	instruction Ievel parallelism, fetch-throttling, Low power design, compiler architecture interaction
88	Saurabh Chheda, Osman S. Unsal, Israel Koren, C. Mani Krishna 0001, Csaba Andras Moritz	Combining compiler and runtime IPC predictions to reduce energy in next generation architectures.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	fetch throttling, low power design, instruction level parallelism, compiler architecture interaction, adaptive voltage scaling
83	Osman S. Unsal, Israel Koren, C. Mani Krishna 0001, Csaba Andras Moritz	Cool-Fetch: A Compiler-Enabled IPC Estimation Based Framework for Energy Reduction.	Interaction between Compilers and Computer Architectures	2004	DBLP DOI BibTeX RDF
74	Juan L. Aragón, José González 0002, Antonio González 0001	Power-Aware Control Speculation through Selective Throttling.	HPCA	2003	DBLP DOI BibTeX RDF
69	Juan L. Aragón, José M. González, Antonio González 0001	Control Speculation for Energy-Efficient Next-Generation Superscalar Processors.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	low-power design, processor architecture, energy-aware systems, Control speculation
42	Joseph J. Sharkey, Alper Buyuktosunoglu, Pradip Bose	Evaluating design tradeoffs in on-chip power management for CMPs.	ISLPED	2007	DBLP DOI BibTeX RDF	fetch throttling, dynamic voltage scaling, power-aware, chip multi-processor
39	Abdullah A. Owahid, Eugene B. John	Instruction Profiling Based Fetch Throttling for Wasted Dynamic Power Reduction.	SBAC-PAD	2019	DBLP DOI BibTeX RDF
39	Huaping Wang, Yao Guo 0001, Israel Koren, C. Mani Krishna 0001	Compiler-based adaptive fetch throttling for energy-efficiency.	ISPASS	2006	DBLP DOI BibTeX RDF

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