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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 5 occurrences of 5 keywords
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Results
Found 14 publication records. Showing 14 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
36 | Susanta Chakraborty, Debesh Kumar Das, Bhargab B. Bhattacharya |
Logical redundancies in irredundant combinational circuits. |
J. Electron. Test. |
1993 |
DBLP DOI BibTeX RDF |
irredundancy, testing, Boolean functions, combinational circuits, stuck-at faults, fanouts |
36 | Neil Tennant |
Rule-Irredundancy and the Sequent Calculus for Core Logic. |
Notre Dame J. Formal Log. |
2016 |
DBLP DOI BibTeX RDF |
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36 | Minghui Jiang 0001, Yong Zhang 0053 |
Parameterized complexity in multiple-interval graphs: Domination, partition, separation, irredundancy. |
Theor. Comput. Sci. |
2012 |
DBLP DOI BibTeX RDF |
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36 | Minghui Jiang 0001, Yong Zhang 0053 |
Parameterized complexity in multiple-interval graphs: domination, partition, separation, irredundancy |
CoRR |
2011 |
DBLP BibTeX RDF |
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36 | Minghui Jiang 0001, Yong Zhang 0053 |
Parameterized Complexity in Multiple-Interval Graphs: Partition, Separation, Irredundancy. |
COCOON |
2011 |
DBLP DOI BibTeX RDF |
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36 | Chun-Chi Lin, Chun-Yao Wang |
Rewiring using IRredundancy Removal and Addition. |
DATE |
2009 |
DBLP DOI BibTeX RDF |
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36 | Martin Charles Golumbic, Renu C. Laskar |
Irredundancy in Circular Arc Graphs. |
Discret. Appl. Math. |
1993 |
DBLP DOI BibTeX RDF |
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36 | Edward R. Scheinerman |
Irredundancy in multiple interval representations. |
Discret. Math. |
1987 |
DBLP DOI BibTeX RDF |
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25 | Anna Bernasconi 0001, Valentina Ciriani, Rolf Drechsler, Tiziano Villa |
Logic Minimization and Testability of 2-SPP Networks. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
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25 | Kaushik De, Chitra Natarajan, Devi Nair, Prithviraj Banerjee |
RSYN: a system for automated synthesis of reliable multilevel circuits. |
IEEE Trans. Very Large Scale Integr. Syst. |
1994 |
DBLP DOI BibTeX RDF |
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25 | Srinivas Devadas, Kurt Keutzer |
Validatable nonrobust delay-fault testable circuits via logic synthesis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
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25 | Mikael Pettersson |
A Term Pattern-Match Compiler Inspired by Finite Automata Theory. |
CC |
1992 |
DBLP DOI BibTeX RDF |
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25 | Guozhu Dong, Rodney W. Topor |
Incremental Evaluation of Datalog Queries. |
ICDT |
1992 |
DBLP DOI BibTeX RDF |
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25 | Karen A. Bartlett, Robert K. Brayton, Gary D. Hachtel, Reily M. Jacoby, Christopher R. Morrison, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang |
Multi-level logic minimization using implicit don't cares. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1988 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #14 of 14 (100 per page; Change: )
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