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Publication years (Num. hits)
1989-1995 (20) 1996-1999 (17) 2000-2002 (23) 2003-2004 (22) 2005 (24) 2006 (22) 2007-2008 (24) 2009-2013 (15) 2014-2023 (14)
Publication types (Num. hits)
article(56) inproceedings(125)
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The graphs summarize 145 occurrences of 113 keywords

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Found 181 publication records. Showing 181 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
106Yao-Joe Joseph Yang, Chi-Wei Kuo Generating Scalable and Modular Macromodels for Microchannels Using the Galerkin-Based Technique. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
92Ting Mei, Jaijeet S. Roychowdhury PPV-HB: harmonic balance for oscillator/PLL phase macromodels. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
82Saket Srivastava, Sanjukta Bhanja Hierarchical Probabilistic Macromodeling for QCA Circuits. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2007 DBLP  DOI  BibTeX  RDF QCA computing, QCA macromodel, Bayesian networks, Quantum-dot Cellular Automata, probabilistic computing
68Xiaolue Lai, Jaijeet S. Roychowdhury TP-PPV: piecewise nonlinear, time-shifted oscillator macromodel extraction for fast, accurate PLL simulation. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
66Xiaolue Lai, Jaijeet S. Roychowdhury Advanced tools for simulation and design of oscillators/PLLs. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF jitter analysis, automated oscillator, macromodeling technique, amplitude macromodels, injection locking prediction, coupled oscillating systems, SPICE, PLL
65Ying Wei 0002, Alex Doboli Library of structural analog cell macromodels for design of continuous-time reconfigurable Delta Sigma modulators. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
65Xin Li 0001, Peng Li 0001, Yang Xu 0017, Lawrence T. Pileggi Analog and RF circuit macromodels for system-level analysis. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF analog/RF circuits, macromodel
65Seok-Yoon Kim, Nanda Gopal, Lawrence T. Pillage Time-domain macromodels for VLSI interconnect analysis. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
65K. K. Low, Stephen W. Director An efficient methodology for building macromodels of IC fabrication processes. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
54Xiaolue Lai, Jaijeet S. Roychowdhury Macromodelling oscillators using Krylov-subspace methods. Search on Bibsonomy ASP-DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
54Ning Dong 0002, Jaijeet S. Roychowdhury Automated nonlinear Macromodelling of output buffers for high-speed digital applications. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF I/O buffer macromodeling, nonlinear macromodeling
54Xiaolue Lai, Jaijeet S. Roychowdhury Automated oscillator macromodelling techniques for capturing amplitude variations and injection locking. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54Jeong-Taek Kong, David Overhauser Methods to improve digital MOS macromodel accuracy. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
54Ayman I. Kayssi, Karem A. Sakallah Timing models for gallium arsenide direct-coupled FET logic circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
51Xiaoji Ye, Min Zhao 0001, Rajendran Panda, Peng Li 0001, Jiang Hu Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF clock mesh, dynamic time step rounding, simulation, macromodel
51Saurabh K. Tiwary, Rob A. Rutenbar Faster, parametric trajectory-based macromodels via localized linear reductions. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
51Mengmeng Ding, Glenn Wolfe, Ranga Vemuri An error-driven adaptive grid refinement algorithm for automatic generation of analog circuit performance macromodels. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
51Stefano Grivet-Talocia, Igor S. Stievano, Ivan A. Maio, Flavio G. Canavero Linear and nonlinear macromodels for power/signal integrity. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
51Roberto Corgnati, Enrico Macii, Massimo Poncino Clustered Table-Based Macromodels for RTL Power Estimation. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
49S. Dabas, Ning Dong 0002, Jaijeet S. Roychowdhury Automated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF gate delay modelling, accurate delay/timing macromodels, digital gates, trajectory-piecewise automated nonlinear macromodelling methods, mixed-signal/RF domain, SPICE-level netlists, transparent retargetability, NAND gates, NOR gates, sequential latch, latches, full adder, current-source models, XOR gates
41Zhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury ADAMIN: automated, accurate macromodeling of digital aggressors for power and ground supply noise prediction. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
41Mengmeng Ding, Ranga Vemuri A combined feasibility and performance macromodel for analog circuits. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF feasibility models, performance macromodeling, active learning
41Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai Transient analysis of coupled transmission lines characterized with the frequency-dependent losses using scattering-parameter based macromodel. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF coupled transmission lines, frequency-dependent losses, scattering-parameter based macromodel, S-parameter macromodel based simulator, circuit analysis computing, transient analysis, transient analysis, transmission lines, losses, S-parameters
39José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF PWM circuit, compact test vectors, analog VLSI technology, functional fault macromodels, compact test vector construction, open loop gain, CMMR, analog circuit simulation complexity, VLSI, integrated circuit testing, design for testability, automatic test pattern generation, fault modeling, fault simulation, fault simulation, operational amplifiers, operational amplifiers, test pattern, functional fault models, analogue circuits, fault dictionary, pulse width modulation, slew-rate
39Ayman I. Kayssi Macromodeling C- and RC-loaded CMOS inverters for timing analysis. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1996 DBLP  DOI  BibTeX  RDF RC-loaded CMOS inverters, C-loaded CMOS inverters, series-resistor shunt-capacitor circuit, capacitive load case, input wave shape, transistor drive, timing, logic CAD, timing analysis, circuit analysis computing, CMOS logic circuits, circuit simulation, table lookup, macromodels, logic gates, lookup table, integrated circuit modelling
39Anirudh Devgan, Ronald A. Rohrer Efficient simulation of interconnect and mixed analog-digital circuits in ACES. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF adaptively controlled explicit simulation, mixed analog-digital circuits, analog circuit simulation, interconnect circuit simulation, AWE macromodels, nonlinear terminations, variable accuracy device models, circuit topology constraints removal, timing, circuit analysis computing, transient analysis, analogue integrated circuits, integrated circuit interconnections, mixed analogue-digital integrated circuits, ACES, transient simulation, timing simulation
39Wolfgang Borutzky Combining Behavioral Block Diagram Modelling with Circuit Simulation. Search on Bibsonomy EUROCAST The full citation details ... 1989 DBLP  DOI  BibTeX  RDF mixed behavioral, circuit-level modelling, electrical macromodels, continuous system simulation, electronic control systems, circuit simulation, functional simulation, block diagrams, signal processing systems
38Rick Salay, John Mylopoulos, Steve M. Easterbrook Using Macromodels to Manage Collections of Related Models. Search on Bibsonomy CAiSE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Modeling, Mappings, Metamodeling, Relationships, Macromodeling
38Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla Fast Passivity Verification and Enforcement via Reciprocal Systems for Interconnects With Large Order Macromodels. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
38Ying Wei 0002, Alex Doboli Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF nonlinear macromodel, structural macromodel, analog circuits
38Xiaolue Lai, Jaijeet S. Roychowdhury A multilevel technique for robust and efficient extraction of phase macromodels of digitally controlled oscillators. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF DCO, PPV, simulation, PLL, macromodel, VCO, DPLL
38Xiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla On passivity enforcement for macromodels of S-parameter based tabulated subnetworks. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Ying Wei 0002, Alex Doboli Systematic development of analog circuit structural macromodels through behavioral model decoupling. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF structural macromodel, analog circuits
38Davide Bertozzi, Luca Benini, Bruno Riccò Parametric timing and power macromodels for high level simulation of low-swing interconnects. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF delay, interconnect, power, macromodel, low-swing
38Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes. Search on Bibsonomy ISCAS (6) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
38Yun-Cheng Ju, Vasant B. Rao, Resve A. Saleh Consistency checking and optimization of macromodels. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
27Kanupriya Gulati, Sunil P. Khatri, Peng Li 0001 Closed-loop modeling of power and temperature profiles of FPGAs. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF sub-threshold leakage, dynamic power
27António Gusmão, L. Miguel Silveira, José Monteiro 0001 Parameter tuning in SVM-based power macro-modeling. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
27Ning Dong 0002, Jaijeet S. Roychowdhury General-Purpose Nonlinear Model-Order Reduction Using Piecewise-Polynomial Representations. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Shubhankar Basu, Balaji Kommineni, Ranga Vemuri Variation Aware Spline Center and Range Modeling for Analog Circuit Performance. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Center and Range, Process Variation, Analog, Spline
27Shubhankar Basu, Balaji Kommineni, Ranga Vemuri Mismatch Aware Analog Performance Macromodeling Using Spline Center and Range Regression on Adaptive Samples. Search on Bibsonomy VLSI Design The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Anish Muttreja, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha Automated Energy/Performance Macromodeling of Embedded Software. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis Inserting Data Encoding Techniques into NoC-Based Systems. Search on Bibsonomy ISVLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Wei Dong 0002, Zhuo Feng, Peng Li 0001 Efficient VCO phase macromodel generation considering statistical parametric variations. Search on Bibsonomy ICCAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Jian Wang, Xin Li 0001, Lawrence T. Pileggi Parameterized Macromodeling for Analog System-Level Design Exploration. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man SWAN: high-level simulation methodology for digital substrate noise generation. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. Search on Bibsonomy PATMOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. Search on Bibsonomy ISVLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27Shweta Chary, Michael L. Bushnell Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27Tat Kee Tan, Anand Raghunathan, Niraj K. Jha Energy macromodeling of embedded operating systems. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Linux, energy consumption, characterization
27Roland W. Freund SPRIM: structure-preserving reduced-order interconnect macromodeling. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
27Mirko Loghi, Luca Benini, Massimo Poncino Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor. Search on Bibsonomy ICCD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
27Anish Muttreja, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha Automated energy/performance macromodeling of embedded software. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF data serialization, genetic programming, regression, embedded software, symbolic, macromodeling
27Subodh Gupta, Farid N. Najm Energy and peak-current per-cycle estimation at RTL. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Peng Li 0001, Xin Li 0001, Yang Xu 0017, Lawrence T. Pileggi A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla Passive macromodeling of subnetworks characterized by measured data. Search on Bibsonomy ISCAS (3) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Min Zhao 0001, Rajendran Panda, Sachin S. Sapatnekar, David T. Blaauw Hierarchical analysis of power distribution networks. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Tat Kee Tan, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha High-level energy macromodeling of embedded software. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Aditya D. Sathe, Michael L. Bushnell, Vishwani D. Agrawal Analog Macromodeling of Capacitive Coupling Faults in Digital Circuit Interconnects. Search on Bibsonomy ITC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Min Zhao 0001, Rajendran Panda, Sachin S. Sapatnekar, Tim Edwards, Rajat Chaudhry, David T. Blaauw Hierarchical analysis of power distribution networks. Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
27Kenneth L. Shepard, Vinod Narayanan, Ron Rose Harmony: static noise analysis of deep submicron digital integrated circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
27Kenneth L. Shepard, Vinod Narayanan, Peter C. Elmendorf, Gutuan Zheng Global harmony: coupled noise analysis for full-chip RC interconnect networks. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF interconnect, noise, static timing analysis
27Giorgio Casinovi, Alberto L. Sangiovanni-Vincentelli A macromodeling algorithm for analog circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
27Veronika Eisele, Bernhard Hoppe, Oliver Kiehl Transmission gate delay models for circuit optimization. Search on Bibsonomy EURO-DAC The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
25Joel Coburn, Srivaths Ravi 0001, Anand Raghunathan Power emulation: a new paradigm for power estimation. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF simulation, FPGA, design, design methodologies, emulation, hardware acceleration, power estimation, register-transfer level, macromodels
25Anish Muttreja, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha Hybrid simulation for embedded software energy estimation. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF energy macromodels, embedded software, pointers analysis, energy estimation, hybrid simulation
25Rex Min, Anantha P. Chandrakasan A framework for energy-scalable communication in high-density wireless networks. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF ?AMPS, distributed microsensors, energy scalability, transmit power, wireless sensor networks, dynamic voltage scaling, forward error correction, power awareness, macromodels, energy models, API design
25Michael Eiermann, Walter Stechele Novel modeling techniques for RTL power estimation. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF RTL macromodels, low power, power estimation, power modeling
24Ziweihua Du, Ning Dong, Yan-Zhao Xie Behavioral Modeling Method of Macromodels for Interconnected Systems With Frequency Characteristics and Nonlinear Termination Networks. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Guoyong Shi Automatic generation of macromodels and design equations for application to Op Amp design. Search on Bibsonomy Int. J. Circuit Theory Appl. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Tommaso Bradde, Stefano Grivet-Talocia, Alessandro Zanco, Giuseppe Carlo Calafiore Data-Driven Extraction of Uniformly Stable and Passive Parameterized Macromodels. Search on Bibsonomy IEEE Access The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
24Alessandro Zanco, Stefano Grivet-Talocia, Tommaso Bradde, Marco De Stefano Enforcing Passivity of Parameterized LTI Macromodels via Hamiltonian-Driven Multivariate Adaptive Sampling. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
24Marco De Stefano, Stefano Grivet-Talocia, Torben Wendt, Cheng Yang, Christian Schuster A Multi-Stage Adaptive Sampling Scheme for Passivity Characterization of Large-Scale Macromodels. Search on Bibsonomy CoRR The full citation details ... 2020 DBLP  BibTeX  RDF
24Stefano Grivet-Talocia A Perturbation Scheme for Passivity Verification and Enforcement of Parameterized Macromodels. Search on Bibsonomy CoRR The full citation details ... 2017 DBLP  BibTeX  RDF
24Aleksei V. Batov, Vladimir V. Breer, Dmitry A. Novikov, Andrey D. Rogatkin Micro- and macromodels of social networks. II. Identification and simulation experiments. Search on Bibsonomy Autom. Remote. Control. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Vladimir V. Breer, Dmitry A. Novikov, Andrey D. Rogatkin Micro- and macromodels of social networks. I. Theory fundamentals. Search on Bibsonomy Autom. Remote. Control. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Lokesh Garg, Vineet Sahula Macromodels for Static Virtual Ground Voltage Estimation in Power-Gated Circuits. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Wenjian Yu, Bolong Zhang, Chao Zhang, Haiquan Wang, Luca Daniel Utilizing macromodels in floating random walk based capacitance extraction. Search on Bibsonomy DATE The full citation details ... 2016 DBLP  BibTeX  RDF
24Mike Brinson, Vadim Kuznetsov Current conveyor macromodels for wideband RF circuit design. Search on Bibsonomy MIXDES The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Paolo Maffezzoni, Bichoy Bahr, Zheng Zhang 0005, Luca Daniel Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Katarzyna Opalska Generation of parameterized macromodels of two-port RF circuits for SPICE simulator. Search on Bibsonomy ECCTD The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24A. Ubolli, Stefano Grivet-Talocia, M. Bandinu, Alessandro Chinea Sensitivity-based weighting for passivity enforcement of linear macromodels in power integrity applications. Search on Bibsonomy DATE The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
24Ginés Doménech-Asensi, José Ángel Díaz-Madrid, Ramón Ruiz Merino Synthesis of CMOS analog circuit VHDL-AMS descriptions using parameterizable macromodels. Search on Bibsonomy Int. J. Circuit Theory Appl. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
24Muhammad Umer Farooq, Likun Xia Local approximation improvement of trajectory piecewise linear macromodels through Chebyshev interpolating polynomials. Search on Bibsonomy ASP-DAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
24Shivam Priyadarshi, T. Robert Harris, Samson Melamed, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis, Paul D. Franzon, Michael B. Steer Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. Search on Bibsonomy IET Circuits Devices Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
24L. Gobbato, Alessandro Chinea, Stefano Grivet-Talocia A parallel Hamiltonian eigensolver for passivity characterization and enforcement of large interconnect macromodels. Search on Bibsonomy DATE The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Alessandro Chinea, Stefano Grivet-Talocia, Dirk Deschrijver, Tom Dhaene, Luc Knockaert On the construction of guaranteed passive macromodels for high-speed channels. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
24Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub Passivity Compensation Algorithm for Method-of-Characteristics-Based Multiconductor Transmission Line Interconnect Macromodels. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
24Davit Harutyunyan, Joost Rommes, E. Jan W. ter Maten, Wil H. A. Schilders Simulation of Mutually Coupled Oscillators Using Nonlinear Phase Macromodels. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
24Stefano Grivet-Talocia On driving non-passive macromodels to instability. Search on Bibsonomy Int. J. Circuit Theory Appl. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
24Georges G. E. Gielen, Dimitri de Jonghe, Johan Loeckx Towards automated extraction of EMC-aware trajectory-based macromodels for analog circuits. Search on Bibsonomy ECCTD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
24Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala Active-passive co-synthesis of multi-GigaHertz radio frequency circuits with broadband parametric macromodels of on-chip passives. Search on Bibsonomy ICCAD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
24Vladimir S. Lerner Cooperative information space distributed macromodels. Search on Bibsonomy Int. J. Control The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Zhichun Wang, Jaijeet S. Roychowdhury Obtaining Frequency Sensitivities to Variations Analytically from Parameterized Nonlinear Oscillator Phase Macromodels. Search on Bibsonomy CICC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
24Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
24Wataru Kuroki, Kiyotaka Yamamura A SPICE-Oriented Method for Finding DC Operating Points of Nonlinear Circuits Containing Piecewise-Linear Macromodels. Search on Bibsonomy IEICE Trans. Fundam. Electron. Commun. Comput. Sci. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Prashant Goyal, Xiaolue Lai, Jaijeet S. Roychowdhury A fast methodology for first-time-correct design of PLLs using nonlinear phase-domain VCO macromodels. Search on Bibsonomy ASP-DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Saurabh K. Tiwary, Rob A. Rutenbar On-the-Fly Fidelity Assessment for Trajectory-Based Circuit Macromodels. Search on Bibsonomy CICC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Min Ma, Alfred Tze-Mun Leung, Roni Khazaka Sparse macromodels for parametric networks. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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