Search results for "macros"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
155	Vincent J. DiGri, Jane E. King	The Share 709 System: Input-Output Translation.	J. ACM	1959	DBLP DOI BibTeX RDF
119	Oleg Kiselyov	Macros That Compose: Systematic Macro Programming.	GPCE	2002	DBLP DOI BibTeX RDF
106	Steven E. Ganz, Amr Sabry, Walid Taha	Macros as Multi-Stage Computations: Type-Safe, Generative, Binding Macros in MacroML.	ICFP	2001	DBLP DOI BibTeX RDF	ML
88	Gregory A. Frascadore	Combining explanation based generalization with the learning of macro operators (abstract only).	ACM Conference on Computer Science	1987	DBLP DOI BibTeX RDF
86	Ryan Culpepper, Matthias Felleisen	Debugging macros.	GPCE	2007	DBLP DOI BibTeX RDF
85	Andhy Koesnandar, Sebastian G. Elbaum, Gregg Rothermel, Lorin Hochstein, Christopher Scaffidi, Kathryn T. Stolee	Using assertions to help end-user programmers create dependable web macros.	SIGSOFT FSE	2008	DBLP DOI BibTeX RDF	web macros, dependability, programming by demonstration, assertions, end user software engineering
75	Daniel Weise, Roger F. Crew	Programmable Syntax Macros.	PLDI	1993	DBLP DOI BibTeX RDF	C
66	Saurabh N. Adya, Igor L. Markov	Combinatorial techniques for mixed-size placement.	ACM Trans. Design Autom. Electr. Syst.	2005	DBLP DOI BibTeX RDF	VLSI, placement, floorplanning
64	Ryan Culpepper, Matthias Felleisen	Taming Macros.	GPCE	2004	DBLP DOI BibTeX RDF
64	Alessandro Bogliolo, Enrico Macii, Virgil Mihailovici, Massimo Poncino	Power Models for Semi-autonomous RTL Macros.	PATMOS	2000	DBLP DOI BibTeX RDF
55	Lourdes Peña Castillo, Stefan Wrobel	A comparative study on methods for reducing myopia of hill-climbing search in multirelational learning.	ICML	2004	DBLP DOI BibTeX RDF
55	Saurabh N. Adya, Igor L. Markov	Consistent placement of macro-blocks using floorplanning and standard-cell placement.	ISPD	2002	DBLP DOI BibTeX RDF
54	Alessandro Bogliolo, Luca Benini, Giovanni De Micheli	Regression-based RTL power modeling.	ACM Trans. Design Autom. Electr. Syst.	2000	DBLP DOI BibTeX RDF	RTL power modeling, adaptive characterization, functional macros, regression models, RTL design
54	Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter	Combined DRAM and logic chip for massively parallel systems.	ARVLSI	1995	DBLP DOI BibTeX RDF	EXECUBE, custom circuits, high density memory, PIM chip, Processor-In-Memory computer architecture, logic chip, 0.8 micron, 2.7 W, 25 MHz, 5 V, 50 MIPS, embedded systems, parallel architectures, CMOS logic circuits, microprocessor chips, CMOS technology, CPU, macros, massively parallel processing, DRAM chips, DRAM chip, CMOS memory circuits
53	Burt M. Leavenworth	Syntax macros and extended translation.	Commun. ACM	1966	DBLP DOI BibTeX RDF
52	Matthew Flatt	Composable and compilable macros: : you want it when?	ICFP	2002	DBLP DOI BibTeX RDF	language tower, modules, macros
51	A. F. Macros, Charles Albert Wüthrich, Pedro Faria Lopes	Introduction.	Comput. Graph.	2005	DBLP DOI BibTeX RDF
44	Bill McCloskey, Eric A. Brewer	ASTEC: a new approach to refactoring C.	ESEC/SIGSOFT FSE	2005	DBLP DOI BibTeX RDF	ASTEC, C, refactoring, translation, macro, preprocessor
44	Richard Kelsey, William D. Clinger, Jonathan Rees	Revised5 Report on the Algorithmic Language Scheme.	ACM SIGPLAN Notices	1998	DBLP DOI BibTeX RDF	SCHEME
44	Wing K. Luk, Donald T. Tang, C. K. Wong	Hierarchial global wiring for custom chip design.	DAC	1986	DBLP DOI BibTeX RDF
43	Floraine Grabler, Maneesh Agrawala, Wilmot Li, Mira Dontcheva, Takeo Igarashi	Generating photo manipulation tutorials by demonstration.	ACM Trans. Graph.	2009	DBLP DOI BibTeX RDF	photo-editing, programming-by-demonstration, tutorials, macros
43	David Fisher, Olin Shivers	Static analysis for syntax objects.	ICFP	2006	DBLP DOI BibTeX RDF	extensible programming languages, language towers, lazy delegation, static analysis, domain-specific languages, type inference, flow analysis, macros
43	David Kurlander, Steven Feiner	A History-Based Macro by Example System.	ACM Symposium on User Interface Software and Technology	1992	DBLP DOI BibTeX RDF	demonstrational techniques, histories, programming by example, macros, graphical representations
42	Hubie Chen, Omer Giménez	On-the-Fly Macros.	WoLLIC	2009	DBLP DOI BibTeX RDF
42	David Herman, Mitchell Wand	A Theory of Hygienic Macros.	ESOP	2008	DBLP DOI BibTeX RDF
42	Venkat Rao Vallapenani, Ravi Shankar Chevuri, Bingxiong Xu, Lun Ye, Kanad Chakraborty	Efficient Techniques for Noise Characterization of Sequential Cells and Macros.	VLSI Design	2006	DBLP DOI BibTeX RDF
42	Alan Bawden	First-Class Macros have Types.	POPL	2000	DBLP DOI BibTeX RDF
42	Michael Gansen, Frank Richter, Oliver Weiss, Tobias G. Noll	A Datapath Generator for Full-Custom Macros of Iterative Logic Arrays.	ASAP	1997	DBLP DOI BibTeX RDF
40	Steven Roman	Writing Excel macros - developing macros to automate and customize Excel: covers office 97 and 2000.		1999	RDF
40	Charles A. Grant	Syntax translation with context macros or macros without arguments.	International Symposium on Extensible Languages	1971	DBLP DOI BibTeX RDF
33	Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Few-Juh Huang, T.-Y. Liu	MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
33	Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, Kenshu Seto, Thanyapat Sakunkonchak, Yoshihisa Kojima	Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies.	HICSS	2003	DBLP DOI BibTeX RDF
33	Mitsuru Igusa, Mark Beardslee, Alberto L. Sangiovanni-Vincentelli	ORCA a Sea-of-Gates Place and Route System.	DAC	1989	DBLP DOI BibTeX RDF
33	Clinton R. Foulk	Teaching assembly language on the Macintosh (abstract only).	ACM Conference on Computer Science	1987	DBLP DOI BibTeX RDF	Macintosh
33	Roger A. Grice	Use of format models and generic outlines to develop source material.	SIGDOC	1983	DBLP DOI BibTeX RDF
32	Nieraj Singh, Graeme Johnson, Yvonne Coady	CViMe: viewing conditionally compiled C/C++ sources through Java.	OOPSLA Companion	2006	DBLP DOI BibTeX RDF	C preprocessor, Java object modeling, source views, modularity, refactoring, reusability, macros, crosscutting concerns, editors, Eclipse plug-ins, conditional compilation
32	David Herman, Philippe Meunier	Improving the static analysis of embedded languages via partial evaluation.	ICFP	2004	DBLP DOI BibTeX RDF	value flow analysis, partial evaluation, macros, embedded languages
32	Amauri A. Arroyo, D. G. Childers	A modular software real-time brain wave detection system.	ACM Southeast Regional Conference	1982	DBLP DOI BibTeX RDF	Real-time signal processing, command macros, common database, external controls, feature extraction classification, single EEG records, menus, structured design
31	Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer	Design of embedded MRAM macros for memory-in-logic applications.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	thermally assisted switching (tas), architecture, low power, system on chip (soc), embedded, mram, non-volatile
31		Web Macros.	Encyclopedia of Database Systems	2009	DBLP DOI BibTeX RDF
31	Yevgen Borodin	Automation of repetitive web browsing tasks with voice-enabled macros.	ASSETS	2008	DBLP DOI BibTeX RDF	macro player, macro recorder, web browser, blind users, screen reader, audio interface, non-visual, hearsay
31	Julian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes 0001, Ney Calazans	SCAFFI: An intrachip FPGA asynchronous interface based on hard macros.	ICCD	2007	DBLP DOI BibTeX RDF
31	Lisa Torrey, Jude W. Shavlik, Trevor Walker, Richard Maclin	Relational Macros for Transfer in Reinforcement Learning.	ILP	2007	DBLP DOI BibTeX RDF
31	Luca Benini, Alessandro Ivaldi, Alberto Macii, Enrico Macii	Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning.	DATE	2004	DBLP DOI BibTeX RDF
31	Jing Zhang 0006, Sue R. Faerman	The Nature of Knowledge and Its Influence on Knowledge Sharing Practice: Experiences from Building the MACROS System.	HICSS	2004	DBLP DOI BibTeX RDF
31	Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino	Parameterized RTL power models for soft macros.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
31	Mario Träber	A novel ACS-feedback scheme for generic, sequential Viterbi-decoder macros.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
31	Shriram Krishnamurthi, Matthias Felleisen, Bruce F. Duba	From Macros to Reusable Generative Programming.	GCSE	1999	DBLP DOI BibTeX RDF
31	Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino	Parameterized RTL power models for combinational soft macros.	ICCAD	1999	DBLP DOI BibTeX RDF
31	V. Kaal, Hans G. Kerkhoff	Compact structural test generation for analog macros.	ED&TC	1997	DBLP DOI BibTeX RDF
31	Hidekazu Terai, Michiyoshi Hayase, Tokinori Kozawa	A routing procedure for mixed array of custom macros and standard cells.	DAC	1985	DBLP DOI BibTeX RDF
31	Richard K. Bennett, H. David Neumann	Extension of existing compilers by sophisticated use of macros.	Commun. ACM	1964	DBLP DOI BibTeX RDF
22	Jeffrey M. Carver, Richard Neil Pittman, Alessandro Forin	Automatic bus macro placement for partially reconfigurable FPGA designs.	FPGA	2009	DBLP DOI BibTeX RDF	emips, reconfigurable computing, dynamic partial reconfiguration, floor-planning
22	Jason Cong, Min Xie 0004	A Robust Mixed-Size Legalization and Detailed Placement Algorithm.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
22	Michael T. Frederick, Arun K. Somani	Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	carry chain, depth optimal mapping, logic chain
22	Bernd Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll	Design flow for embedded FPGAs based on a flexible architecture template.	DATE	2008	DBLP DOI BibTeX RDF
22	Jani Metsä, Mika Katara, Tommi Mikkonen	Comparing Aspects with Conventional Techniques for Increasing Testability.	ICST	2008	DBLP DOI BibTeX RDF	testing, aspects
22	Xing Wei, Juanjuan Chen, Qiang Zhou 0001, Yici Cai, Jinian Bian, Xianlong Hong	MacroMap: A technology mapping algorithm for heterogeneous FPGAs with effective area estimation.	FPL	2008	DBLP DOI BibTeX RDF
22	Zhe-Wei Jiang, Bor-Yiing Su, Yao-Wen Chang	Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs.	DAC	2008	DBLP DOI BibTeX RDF	placement, physical design, routability
22	Xiaowen Li, Xinkai Chen, Xiang Xie, Guolin Li, Li Zhang 0023, Zhihua Wang 0001	Pre-Processing and Vector Quantization Based Approach for CFA Data Compression in Wireless Endoscopy Capsule.	ISBI	2007	DBLP DOI BibTeX RDF
22	Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov	Min-cut floorplacement.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
22	Natarajan Viswanathan, Min Pan, Chris C. N. Chu	FastPlace 2.0: an efficient analytical placer for mixed-mode designs.	ASP-DAC	2006	DBLP DOI BibTeX RDF
22	Prassanna Sithambaram, Alberto Macii, Enrico Macii	Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs.	PATMOS	2005	DBLP DOI BibTeX RDF
22	Renqiu Huang, Ranga Vemuri	Forward-Looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs.	IPDPS	2004	DBLP DOI BibTeX RDF	critical net, performance, placement, Behavioral synthesis, macro
22	Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov	Unification of partitioning, placement and floorplanning.	ICCAD	2004	DBLP DOI BibTeX RDF
22	Nikolaus Voß, Bärbel Mertsching	A Framework for Low Power Audio Design.	VLSI Design	2004	DBLP DOI BibTeX RDF
22	Elham Safi, Zohreh Karimi, Maghsoud Abbaspour, Zainalabedin Navabi	Utilizing Various ADL Facets for Instruction Level CPU Test.	MTV	2003	DBLP DOI BibTeX RDF
22	Jürgen Stuber, Mark van den Brand	Extracting Mathematical Semantics from Documents.	PPSWR	2003	DBLP DOI BibTeX RDF
22	Walid Taha, Patricia Johann	Staged Notational Definitions.	GPCE	2003	DBLP DOI BibTeX RDF
22	Jean-Marie Favre	CPP Denotational Semantics.	SCAM	2003	DBLP DOI BibTeX RDF
22	Qiao Liu 0007, Keiichi Nakata, Kazuo Furuta	Display Design of Process Systems Based on Functional Modelling.	Cogn. Technol. Work.	2002	DBLP DOI BibTeX RDF	Functional macro, Functional primitives, Process systems, Interface design, Functional modelling, Visual display
22	Uwe Aßmann	Beyond Generic Component Parameters.	Component Deployment	2002	DBLP DOI BibTeX RDF
22	Michiko Inoue, Chikateru Jinno, Hideo Fujiwara	An Extended Class of Sequential Circuits with Combinational Test Generation Complexity.	ICCD	2002	DBLP DOI BibTeX RDF
22	Mats Blomquist, Per Burman	The WinBraille Approach to Producing Braille Quickly and Effectively.	ICCHP	2002	DBLP DOI BibTeX RDF
22	Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero	Automatic Test Program Generation from RT-Level Microprocessor Descriptions.	ISQED	2002	DBLP DOI BibTeX RDF
22	Kuniyuki Tani, Norihiro Nikai, Atsushi Wada, Tetsuro Sawai	A pipelined ADC macro design for multiple applications.	ASP-DAC	2001	DBLP DOI BibTeX RDF
22	Samuel N. Kamin, Miranda Callahan, Lars Clausen	Lightweight and Generative Components 2: Binary-Level Components.	SAIG	2000	DBLP DOI BibTeX RDF
22	Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen	EmGen-a module generator for logic emulation applications.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
22	Shinji Miyano, Katsuhiko Sato, Kenji Numata	Universal Test Interface for Embedded-DRAM Testing.	IEEE Des. Test Comput.	1999	DBLP DOI BibTeX RDF
22	Nathan Kalyanasundharam, Nital Patwa	Simultaneous Switching Noise Considerations in the Design of a High Speed, Multiported TLB of a Server-Class Microprocessor.	ICCD	1999	DBLP DOI BibTeX RDF	multiported, supply inductance, TLB, simultaneous switching noise, decoupling capacitance
22	Michael A. Riepe, Karem A. Sakallah	The edge-based design rule model revisited.	ACM Trans. Design Autom. Electr. Syst.	1998	DBLP DOI BibTeX RDF	design rule checking, layout verification, design rules
22	Muhammad M. Khellah, Mohamed I. Elmasry	Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	low-power design, power estimation, high-level design
22	Yufeng Luo, Tjahjadi Wongsonegoro, Adnan Aziz	Hybrid Techniques for Fast Functional Simulation.	DAC	1998	DBLP DOI BibTeX RDF	ASIC verification, simulation, emulation
22	Alessandro Bogliolo, Luca Benini, Giovanni De Micheli	Adaptive least mean square behavioral power modeling.	ED&TC	1997	DBLP DOI BibTeX RDF
22	Kjell O. Jeppson, Sven Christensson, Nils Hedenstierna	Formal definitions of edge-based geometric design rules.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
22	Alexander Sakharov	Macro processing in high-level languages.	ACM SIGPLAN Notices	1992	DBLP DOI BibTeX RDF
22	Herbert E. Longenecker Jr., Syed Tariq Ali, Michael V. Doran	Increased Productivity Using a Preprocessor for Dataflex Fourth Generation Database Language (Abstract).	ACM Conference on Computer Science	1990	DBLP DOI BibTeX RDF
22	B. Lokanathan, Edwin Kinnen	Performance optimized floor planning by graph planarization.	DAC	1989	DBLP DOI BibTeX RDF
22	Wing K. Luk, Alvar A. Dean	Multi-Stack Optimization for Data-Path Chip (Microprocessor) Layout.	DAC	1989	DBLP DOI BibTeX RDF
22	Clinton R. Foulk	Macintosh assembly language.	ACM Conference on Computer Science	1988	DBLP DOI BibTeX RDF	Macintosh
22	Rathin Putatunda, David Smith, Stephen McNeary, James Crabbe	HAPPI: a chip compiler based on double-level-metal technology.	DAC	1986	DBLP DOI BibTeX RDF
21	Roman Knöll, Mira Mezini	pi: a pattern language.	OOPSLA	2009	DBLP DOI BibTeX RDF	patterns, domain specific languages, extensibility, language design, semiotics, pattern language, macros, language extension
21	Christopher Scaffidi, Brad A. Myers, Mary Shaw	Fast, Accurate Creation of Data Validation Formats by End-User Developers.	IS-EUD	2009	DBLP DOI BibTeX RDF	web macros, web applications, Data validation
21	Matthew Flatt, Eli Barzilay, Robert Bruce Findler	Scribble: closing the book on ad hoc documentation tools.	ICFP	2009	DBLP DOI BibTeX RDF	domain-specific languages, macros, metaprogramming
21	Joerg Beringer, Gerhard Fischer, Piero Mussio, Brad A. Myers, Fabio Paternò, Boris E. R. de Ruyter	The next challenge: from easy-to-use to easy-to-develop. are you ready?	CHI Extended Abstracts	2008	DBLP DOI BibTeX RDF	customization, end user development, end-user software engineering, programming by example, tailoring, macros, psychology of programming
21	Abdulaziz Ghuloum, R. Kent Dybvig	Implicit phasing for R6RS libraries.	ICFP	2007	DBLP DOI BibTeX RDF	binding phases, hygienic macros, macro expansion, scheme, libraries
21	Jonathan Riehl	Assimilating MetaBorg: : embedding language tools in languages.	GPCE	2006	DBLP DOI BibTeX RDF	MetaBorg, concrete syntax macros, extensible syntax, staged multi-language programming, self application, SDF, stratego
21	Guillaume Germain	Concurrency oriented programming in termite scheme.	Erlang Workshop	2006	DBLP DOI BibTeX RDF	distributed computing, scheme, continuations, erlang, macros
21	Olin Shivers	The anatomy of a loop: a story of scope and control.	ICFP	2005	DBLP DOI BibTeX RDF	compilers, programming languages, functional programming, scheme, continuations, lambda-calculus, iteration, macros, control structures
21	Jason Baker, Wilson C. Hsieh	Maya: Multiple-Dispatch Syntax Extension in Java.	PLDI	2002	DBLP DOI BibTeX RDF	Java, generative programming, macros, metaprogramming