Search results for "memories"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
79	Naiqin Feng, Xizheng Cao, Sujuan Li, Lianhui Ao, Shuangxi Wang	A New Method of Morphological Associative Memories.	ICIC (2)	2009	DBLP DOI BibTeX RDF	Auto-associative memories, Hetero- associative memories, Morphological associative memories
76	Ad J. van de Goor, Issam B. S. Tlili	A Systematic Method for Modifying March Tests for Bit-Oriented Memories into Tests for Word-Oriented Memories.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Bit-oriented memories, word-oriented memories, fault models, march tests, data backgrounds
72	Ad J. van de Goor, Issam B. S. Tlili	March Tests for Word-Oriented Memories.	DATE	1998	DBLP DOI BibTeX RDF	Bit-oriented memories, word-oriented memories, fault models, memory tests, march tests, data backgrounds
61	Behrooz Parhami, Algirdas Avizienis	Detection of Storage Errors in Mass Memories Using Low-Cost Arithmetic Error Codes.	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF	unidirectional failures, Arithmetic error codes, low-cost arithmetic codes, magnetic-recording memories, mass memories, storage errors, two-dimensional burst errors, residue codes, shift-register memories, product codes, fault-tolerant memories
61	Harold S. Stone	Dynamic Memories with Fast Random and Sequential Access.	IEEE Trans. Computers	1975	DBLP DOI BibTeX RDF	Bubble memories, memories, dynamic memories, shift-register memories, perfect shuffle
60	María Elena Acevedo-Mosqueda, Cornelio Yáñez-Márquez, Itzamá López-Yáñez	A New Model of BAM: Alpha-Beta Bidirectional Associative Memories.	ISCIS	2006	DBLP DOI BibTeX RDF	Alpha-Beta associative memories, perfect recall, Bidirectional associative memories
60	Said Hamdioui, Ad J. van de Goor	Consequences of port restrictions on testing two-port memories.	ITC	1998	DBLP DOI BibTeX RDF	Multi-port memories, single-port memories, memory fault models, weak faults, read-only and write-only ports, fault coverage, march tests, test length
59	Thomas Olsson 0002, Hannu Soronen, Kaisa Väänänen-Vainio-Mattila	User needs and design guidelines for mobile services for sharing digital life memories.	Mobile HCI	2008	DBLP DOI BibTeX RDF	digital life memories, personal content management, user-centered design, mobile services, design guidelines, user needs
55	Zsolt J. Horváth, Péter Basa	New Trends in Non-volatile Semiconductor Memories.	Towards Intelligent Engineering and Information Technology	2009	DBLP DOI BibTeX RDF	nanocrystal memories, SONOS, FeRAMs, flash memories, phase-change memories, MRAMs
54	María Elena Acevedo-Mosqueda, Cornelio Yáñez-Márquez, Itzamá López-Yáñez	Complexity of Alpha-Beta Bidirectional Associative Memories.	MICAI	2006	DBLP DOI BibTeX RDF	Alpha-Beta associative memories, perfect recall, complexity, Bidirectional associative memories
54	Enrique Guzmán 0001, Oleksiy B. Pogrebnyak, Cornelio Yáñez, José A. Moreno	Image Compression Algorithm Based on Morphological Associative Memories.	CIARP	2006	DBLP DOI BibTeX RDF	Morphological Hetroassociative Memories min, Image compression, Morphological Associative Memories
54	Said Hamdioui, Ad J. van de Goor	Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	multi-port memories, single-port memories, address decoder faults, read-only ports, write-only ports, fault models, fault coverage, march tests
54	Chao Sun 0001, Ken Takeuchi	System-Level Considerations on Design of 3D NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Alessia Marelli, Rino Micheloni	BCH and LDPC Error Correction Codes for NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Andrea Silvagni	3D VG-Type NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Alessandro Grossi, Cristian Zambelli, Piero Olivo	Reliability of 3D NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Luca Crippa, Rino Micheloni	Advanced Architectures for 3D NAND Flash Memories with Vertical Channel.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Rino Micheloni, Luca Crippa	3D Floating Gate NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Luca Crippa, Rino Micheloni	3D Charge Trap NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Herb Huang, Rino Micheloni	3D Multi-chip Integration and Packaging Technology for NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
54	Rino Micheloni, Luca Crippa	3D Stacked NAND Flash Memories.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
53	Stuart E. Schechter, Gabriel H. Loh, Karin Strauss, Doug Burger	Use ECP, not ECC, for hard failures in resistive memories.	ISCA	2010	DBLP DOI BibTeX RDF	hard failures, resistive memories, memory, error correction, phase change memory
53	Betty Prince	Nanotechnology and emerging memories.	SBCCI	2007	DBLP DOI BibTeX RDF	FeRAM, ferroelectric, floating body, nanocrystal, nitride storage, scaling issues, single electron memories, memory, variability, scaling, SRAM, MEMs, DRAM, flash, MRAM, phase change, non-volatile, molecular memory
53	Stefan Smolnik, Ludwig Nastansky	K-Discovery Using Topic Maps to Identify Distributed Knowledge Structures in Groupware-Based Organizational Memories.	HICSS	2002	DBLP DOI BibTeX RDF	Knowledge Management, Groupware, Topic Maps, Organizational Memories, Knowledge Structures
48	Jana Stanclová	On the complexity of hierarchical associative memories.	SAC	2009	DBLP DOI BibTeX RDF	hierarchical associative memories, complexity, associative memories
48	María Elena Acevedo-Mosqueda, Cornelio Yáñez-Márquez, Itzamá López-Yáñez	Alpha-Beta bidirectional associative memories: theory and applications.	Neural Process. Lett.	2007	DBLP DOI BibTeX RDF	Alpha-Beta associative memories, Perfect recall, Fingerprint identifier, Bidirectional associative memories
47	Veera Papirla, Chaitali Chakrabarti	Energy-aware error control coding for Flash memories.	DAC	2009	DBLP DOI BibTeX RDF	low-power design, Flash memories, error control coding, endurance
47	Mario Aldape-Pérez, Cornelio Yáñez-Márquez, Amadeo José Argüelles-Cruz	FPGA Implementation of Parallel Alpha-Beta Associative Memories.	ICIAR	2008	DBLP DOI BibTeX RDF	FPGA, Pattern Recognition, Fingerprint, Associative Memories, Reconfigurable Logic
47	Thomas Olsson 0002, Marika Lehtonen, Dana Pavel, Kaisa Väänänen-Vainio-Mattila	User-centered design of a mobile application for sharing life memories.	Mobility Conference	2007	DBLP DOI BibTeX RDF	life memories, personal content management, user-centered design, mobile application, contextual design
46	Sunghun Kim 0001, Kai Pan, E. James Whitehead Jr.	Memories of bug fixes.	SIGSOFT FSE	2006	DBLP DOI BibTeX RDF	bug finding tool, prediction, patterns, fault, bug, fix
43	Huaqiang Wu, Yan Liao, Bin Gao 0006, Debanjan Jana, He Qian	RRAM Cross-Point Arrays.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
43	Rahul N. Advani	The Business of NAND.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
43	Frederic Sala, Clayton Schoeny, Lara Dolecek	Advanced Algebraic and Graph-Based ECC Schemes for Modern NVMs.	3D Flash Memories	2016	DBLP DOI BibTeX RDF
43	Ioannis Voyiatzis	An ALU-Based BIST Scheme for Word-Organized RAMs.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Memory control and access, Reliability, Test generation, Built-In Tests, Testing and Fault-Tolerance, Semiconductor Memories
41	Andrea Grimes, Martin Bednar, Jay David Bolter, Rebecca E. Grinter	EatWell: sharing nutrition-related memories in a low-income community.	CSCW	2008	DBLP DOI BibTeX RDF	low-income, underserved communities, mobile, memories, culture, health, cell phone, voice, nutrition
41	Mie Nakatani, Seiko Myojin, Masumi Shimizu, Hirokazu Kato 0001, Shogo Nishida	Communication Environment for Sharing Fond Memories.	HCI (9)	2007	DBLP DOI BibTeX RDF	fond memories, popular song, music box, reminiscence, park
41	Rui M. Jesus, Arnaldo J. Abrantes, Nuno Correia 0001	Photo Retrieval from Personal Memories Using Generic Concepts.	PCM	2006	DBLP DOI BibTeX RDF	classification based on kernel, multimedia retrieval, personal memories
41	Rajeshwar S. Sable, Ravindra P. Saraf, Rubin A. Parekhji, Arun N. Chandorkar	Built-in Self-test Technique for Selective Detection of Neighbourhood Pattern Sensitive Faults in Memories.	VLSI Design	2004	DBLP DOI BibTeX RDF	Built-in self-test for memories, neighbourhood pattern sensitive faults, programmable BIST
41	Max H. Garzon, Kiranchand V. Bobba, Andrew Neel	Efficiency and Reliability of Semantic Retrieval in DNA-Based Memories.	DNA	2003	DBLP DOI BibTeX RDF	DNA-based memories, optimal concentration, data mining in vitro, pattern classification, semantic retrieval, data compaction
41	Ad J. van de Goor, Magdy S. Abadir, Alan Carlin	Minimal Test for Coupling Faults in Word-Oriented Memories.	DATE	2002	DBLP DOI BibTeX RDF	State coupling faults, word-oriented memories, tests, data backgrounds, m-out-of-n codes
41	Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham	Validation of PowerPC(tm) Custom Memories using Symbolic Simulation.	VTS	2000	DBLP DOI BibTeX RDF	Simulation, Validation, Memories, Assertions, Symbolic
41	Mohammad Gh. Mohammad, Kewal K. Saluja, Alex S. Yap	Testing Flash Memories.	VLSI Design	2000	DBLP DOI BibTeX RDF	FG transistor, Testing, Flash memories, Disturbances
41	Ad J. van de Goor, Yervant Zorian	Effective march algorithms for testing single-order addressed memories.	J. Electron. Test.	1994	DBLP DOI BibTeX RDF	Read/Write memories, single-address order, single-order addressed memory, SRAM, memory testing, March test
40	Yasuaki Kuroe, Yuriko Taniguchi	Models of complex-valued dynamic associative memories and analysis of their dynamics - Analytic and non-analytic activation functions -.	IJCNN	2008	DBLP DOI BibTeX RDF
40	Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan	Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories.	PPoPP	2008	DBLP DOI BibTeX RDF	graphics processor unit, multi-level tiling, scratchpad memory, data movement
40	Peter Sussner, Marcos Eduardo Valle	Implicative Fuzzy Associative Memories.	IEEE Trans. Fuzzy Syst.	2006	DBLP DOI BibTeX RDF
40	Gordon R. Chiu, Deshanand P. Singh, Valavan Manohararajah, Stephen Dean Brown	Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs.	ICCAD	2006	DBLP DOI BibTeX RDF
40	Tathagato Rai Dastidar, Partha Ray	A New Device Level Digital Simulator for Simulation and Functional Verification of Large Semiconductor Memories.	VLSI Design	2006	DBLP DOI BibTeX RDF
40	Juan Humberto Sossa Azuela, Ricardo Barrón, Francisco Cuevas de la Rosa, Carlos Aguilar Ibáñez, Héctor Cortés	Extended Associative Memories for Recalling Gray Level Patterns..	CIARP	2004	DBLP DOI BibTeX RDF
40	Jin-Fu Li 0001, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow	A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.	ITC	2003	DBLP DOI BibTeX RDF	built-in redundancy-analysis, built-in self-test, memory testing, semiconductor memory, built-in self-repair
40	Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz	Smart Memories: a modular reconfigurable architecture.	ISCA	2000	DBLP DOI BibTeX RDF
38	Dhiraj K. Pradhan	A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications.	IEEE Trans. Computers	1980	DBLP DOI BibTeX RDF	Coset codes, decoder logic, erasure decoding, mass memories, multiple errors, TSC checkers, error detection, error correction, transient faults, multiple faults, unidirectional errors, self-checking, shift register memories, read-only memories, random errors, two-rail checkers
37	Paul Berube, Ashley Zinyk, José Nelson Amaral, Mike H. MacGregor	The Bank Nth Chance Replacement Policy for FPGA-Based CAMs.	FPL	2003	DBLP DOI BibTeX RDF	multizone cache, field programmable gate array, cache memories, memory systems, content addressable memories, replacement policy, digital design, Internet routing
37	Christian Mandl, Adolfo Fucci	A fast FPGA based coprocessor supporting hard real-time search.	EUROMICRO	1997	DBLP DOI BibTeX RDF	fast FPGA based coprocessor, hard real time search, dual port memories, programmable message driven multi port memories, sequential requests, data acquisition systems, hard real time requirements, DAC systems, coprocessor architectures, file descriptor table, implementation costs, TI DSP C40, hardware strategy, dual port memory, generic searching coprocessor, field programmable gate arrays, hardware implementation, computer systems, high throughput, searching strategy, design approach, DPMs
36	Jen-Chieh Yeh, Kuo-Liang Cheng, Yung-Fa Chou, Cheng-Wen Wu	Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
36	J. M. Daga	Design and Industrialization Challenges of Memory Dominated SOCs.	PATMOS	2007	DBLP DOI BibTeX RDF
36	Mustaque Ahamad, James E. Burns, Phillip W. Hutto, Gil Neiger	Causal Memory.	WDAG	1991	DBLP DOI BibTeX RDF
36	Luca Benini, Alberto Macii, Massimo Poncino	Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques.	ACM Trans. Embed. Comput. Syst.	2003	DBLP DOI BibTeX RDF	nonvolatile, Embedded systems, integration, memories, system-on-a-chip, embedded memories, volatile
36	Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang	A realistic fault model for flash memories.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	NAND circuits, faulty behavior classification, NAND-type flash memory, SPICE models, flash cell models, circuit-level faulty behavior simulation, testing, fault model, fault modeling, fault simulation, flash memories, flash memories, circuit analysis computing, SPICE, integrated memory circuits
36	S. Brent Morris, Arthur Valliere III, Richard A. Wisniewski	Processes for Random and Sequential Accessing in Dynamic Memories.	IEEE Trans. Computers	1979	DBLP DOI BibTeX RDF	address decoding, In-Out shuffle memory, sequential access, random access, Access time, dynamic memories, shift register memories, tours, perfect shuffle
36	Jacques Lenfant	Fast Random and Sequential Access to Dynamic Memories of Any Size.	IEEE Trans. Computers	1977	DBLP DOI BibTeX RDF	memory architecture, permutation network, Dynamic memories, shift-register memories, perfect shuffle
36	A. Wolinsky	A simple proof of Lewin's ordered-retrieval theorem for associative memories.	Commun. ACM	1968	DBLP DOI BibTeX RDF	access frequency proof, column digit values, column sensing arrangement, digit value readout, digit value variety, digit variety readout, memory access frequency, ordered information retrieval, ordered lists, ordered retrieval efficiency, ordered retrieval theorem, retrieval theorem proof, associative memories, content-addressed memories, memory access
35	Enrique Guzmán 0001, Oleksiy B. Pogrebnyak, Cornelio Yáñez, Pablo Manrique	Vector Quantization Algorithm Based on Associative Memories.	MICAI	2009	DBLP DOI BibTeX RDF	fast search, image coding, vector quantization, associative memories
35	Carman Neustaedter, Elena A. Fedorovskaya	Capturing and sharing memories in a virtual world.	CHI	2009	DBLP DOI BibTeX RDF	memories, virtual worlds, second life, photo sharing
35	Enrique Guzmán 0001, Oleksiy B. Pogrebnyak, Luis Sánchez Fernández 0002, Cornelio Yáñez-Márquez	A Fast Search Algorithm for Vector Quantization Based on Associative Memories.	CIARP	2008	DBLP DOI BibTeX RDF	fast search, image coding, vector quantization, associative memories
35	Enrique Guzmán 0001, Oleksiy B. Pogrebnyak, Cornelio Yáñez	Design of an Evolutionary Codebook Based on Morphological Associative Memories.	MICAI	2007	DBLP DOI BibTeX RDF	evolutionary codebook, codebook generation, morphological associative memories
35	Roberto Antonio Vázquez, Humberto Sossa, Beatriz A. Garro	Face Recognition Using Some Aspects of the Infant Vision System and Associative Memories.	CIARP	2007	DBLP DOI BibTeX RDF	infant vision system, face recognition, Associative memories
35	Juan Humberto Sossa Azuela, Ricardo Barrón, Francisco Cuevas de la Rosa, Carlos Aguilar Ibáñez	Associative Gray Level Pattern Processing using Binary Decomposition and alpha beta Memories.	Neural Process. Lett.	2005	DBLP DOI BibTeX RDF	associative memories - ? ? object recognition - pattern recognition
35	Rogério Martins Gomes, Antônio de Pádua Braga, Henrique E. Borges	A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks.	ICANN (1)	2005	DBLP DOI BibTeX RDF	Coupled neural networks, TNGS, Artificial neural networks, Dynamical systems, Hierarchical memories
35	Xuemei Zhao, Yizheng Yu, Chunxu Chen	Tests for Word-Oriented Content Addressable Memories.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF	word-oriented CAM, March algorithm, content addressable memories, Functional fault models, Spot defects
35	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu	Simulation-Based Test Algorithm Generation for Random Access Memories.	VTS	2000	DBLP DOI BibTeX RDF	RAM fault simulation, March test algorithm, Cocktail-March test algorithms, semiconductor memories, RAM testing
35	Kalavai J. Raghunath, Vladimir Cherkassky	Noise Performance of Linear Associative Memories.	IEEE Trans. Pattern Anal. Mach. Intell.	1994	DBLP DOI BibTeX RDF	linear associative memories, generalized inverse, training noise, S/N ratio gain, auto-associative modes, hetero-associative modes, correlation memory, noise performance, noise, neural nets, content-addressable storage, linear models, correlation matrix memory
34	Zurab Khasidashvili, Mahmoud Kinanah, Andrei Voronkov	Verifying equivalence of memories using a first order logic theorem prover.	FMCAD	2009	DBLP DOI BibTeX RDF
34	Rosanna Bova, Hye-Young Paik, Boualem Benatallah, Liangzhao Zeng, Salima Benbernou	Task Memories and Task Forums: A Foundation for Sharing Service-Based Personal Processes.	ICSOC	2007	DBLP DOI BibTeX RDF
34	Isabelle Puaut, Christophe Pais	Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison.	DATE	2007	DBLP DOI BibTeX RDF
34	Peter Sussner, Marcos Eduardo Valle	Gray-scale morphological associative memories.	IEEE Trans. Neural Networks	2006	DBLP DOI BibTeX RDF
34	Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik	An Address Dependence Model of Computation for Hierarchical Memories with Pipelined Transfer.	IPDPS	2005	DBLP DOI BibTeX RDF
34	Darren J. Kerbyson, Michael Lang 0003, Gene Patino, Hossein Amidi	An empirical performance analysis of commodity memories in commodity servers.	Memory System Performance	2004	DBLP DOI BibTeX RDF	performance analysis, performance measurement, memory modules, memory system performance
34	Swapnil Bahl	A Novel Method for Silicon Configurable Test Flow and Algorithms for Testing, Debugging and Characterizing Different Types of Embedded Memories through a Shared Controller.	MTDT	2004	DBLP DOI BibTeX RDF
34	Cesar Augusto Tacla, Jean-Paul A. Barthès	A Multi-agent Architecture for Evolving Memories.	AMKM	2003	DBLP DOI BibTeX RDF
34	Stefan Smolnik, Ingo Erdmann	Visual Navigation of Distributed Knowledge Structures in Groupware-Based Organizational Memories.	IV	2002	DBLP DOI BibTeX RDF
34	Maya B. Gokhale, Janice M. Stone	Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks.	FCCM	1999	DBLP DOI BibTeX RDF
34	Sigurd L. Lillevik, John L. Easterday	Throughput of multiprocessors with replicated shared memories.	AFIPS National Computer Conference	1984	DBLP DOI BibTeX RDF
31	Alejandro Bassi	A Dynamic Associative Semantic Model for Natural Language Processing based on a Spreading Activation Network.	SCCC	2000	DBLP DOI BibTeX RDF	dynamic associative semantic model, spreading activation network, psycholinguistic theories, expected contextual relevance, top-down effect, semantic memories, open-worlds, natural language processing, perception, natural languages, semantic networks, episodic memories, human memory
31	Cornelio Yáñez, Edgardo Manuel Felipe Riverón, Itzamá López-Yáñez, Rolando Flores-Carapia	A Novel Approach to Automatic Color Matching.	CIARP	2006	DBLP DOI BibTeX RDF	Autoassociative memory, Alpha-Beta associative memories, Color matching
31	Antonio Martí Campoy, Eugenio Tamura, Sergio Sáez, Francisco Rodríguez 0003, José V. Busquets-Mataix	On Using Locking Caches in Embedded Real-Time Systems.	ICESS	2005	DBLP DOI BibTeX RDF	genetic algorithms, performance evaluation, predictability, response time, Cache memories, schedulability analysis, execution time, embedded real-time systems
31	Mayez A. Al-Mouhamed, Steven S. Seiden	A Heuristic Storage for Minimizing Access Time of Arbitrary Data Patterns.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	Boolean matrices, performance evaluation, heuristics, NP-complete, memory organization, storage schemes, parallel memories
30	Kalyana C. Bollapalli, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri	Low power and high performance sram design using bank-based selective forward body bias.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	low power, high performance, body bias
30	Israel Román-Godínez, Cornelio Yáñez-Márquez	Complete Recall on Alpha-Beta Heteroassociative Memory.	MICAI	2007	DBLP DOI BibTeX RDF
30	Jayanta Bhadra, Magdy S. Abadir, David Burgess, Ekaterina Trofimova	Automatic Generation of High Performance Embedded Memory Models for PowerPC Microprocessors.	MTV	2005	DBLP DOI BibTeX RDF
30	Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen	Predictable embedding of large data structures in multiprocessor networks-on-chip.	DSD	2005	DBLP DOI BibTeX RDF
30	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu	Fault simulation and test algorithm generation for random accessmemories.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
30	David Karchmer, Jonathan Rose	Definition and solution of the memory packing problem for field-programmable systems.	ICCAD	1994	DBLP DOI BibTeX RDF
29	Cathal Gurrin, Hyowon Lee 0001, Jer Hayes	iForgot: a model of forgetting in robotic memories.	HRI	2010	DBLP DOI BibTeX RDF	digital memories, life experiences, robotics, forgetting
29	Rachid Guerraoui, Thomas A. Henzinger, Barbara Jobstmann, Vasu Singh	Model checking transactional memories.	PLDI	2008	DBLP DOI BibTeX RDF	model checking, transactional memories
29	Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian	Minimal March Tests for Detection of Dynamic Faults in Random Access Memories.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	dynamic fault primitives, dynamic functional fault models, march test algorithms, fault detection, random access memories
29	Enrique Guzmán 0001, Selene Alvarado, Oleksiy B. Pogrebnyak, Luis Pastor Sánchez Fernández, Cornelio Yáñez	Hardware Implementation of Image Recognition System Based on Morphological Associative Memories and Discrete Wavelet Transform.	PSIVT	2007	DBLP DOI BibTeX RDF	Image Recognition, Discrete Wavelet Transform, Hardware Implementation, Artificial Vision, Morphological Associative Memories
29	Erwin J. Prinz	The zen of nonvolatile memories.	DAC	2006	DBLP DOI BibTeX RDF	FeRAM, SONOS, nanocrystal, oating gate, phase change memory, MRAM, nonvolatile memories
29	Bartomeu Alorda, Vicent Canals, Ivan de Paúl, Jaume Segura 0001	A BIST-based Charge Analysis for Embedded Memories.	IOLTS	2004	DBLP DOI BibTeX RDF	Current based testing, charge based testing, Embedded memories test, built-in current monitors
29	Daniele Rossi 0001, Cecilia Metra	Error Correcting Strategy for High Speed and High Density Reliable Flash Memories.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	symbol error correcting codes, error correcting circuitry, fault tolerance, reliability, flash memories