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Publication years (Num. hits)
2008-2021 (13)
Publication types (Num. hits)
article(1) inproceedings(12)
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Found 13 publication records. Showing 13 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
76Vassilios Gerousis Physical design implementation for 3D IC: methodology and tools. Search on Bibsonomy ISPD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF 3D IC stack, micro-bump, physical design tools, silicon interposer, methodology, tsv
27Mitsuhito Ando, Ryusuke Tokumine, Toshinobu Takei, Hiromi Mochiyama Tactile Scanning for Detecting Micro Bump by Strain-Sensitive Artificial Skin. Search on Bibsonomy IEEE Robotics Autom. Lett. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
27Makoto Motoyoshi, Kohki Yanagimura, Taikoh Fushimi, Shunta Endo Stacked Pixel Sensor/Detector Technology using Au Micro-Bump Junction. Search on Bibsonomy 3DIC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
27Lay Wai Kong, Osborne A. Martin Known void size micro-bump, a novel standard of 3D X-ray computed tomography in-line metrology for accuracy assessment and monitoring. Search on Bibsonomy I2MTC The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
27Erik Jan Marinissen, Ferenc Fodor, Bart De Wachter, Jorg Kiesewetter, Eric Hill, Ken Smith A fully automatic test system for characterizing large-array fine-pitch micro-bump probe cards. Search on Bibsonomy ITC-Asia The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
27Kuan-Te Wu, Jin-Fu Li 0001, Yun-Chao Yu, Chih-Sheng Hou, Chi-Chun Yang, Ding-Ming Kwai, Yung-Fa Chou, Chih-Yen Lo Intra-channel Reconfigurable Interface for TSV and Micro Bump Fault Tolerance in 3-D RAMs. Search on Bibsonomy ATS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
27Jin-Tai Yan, Yu-Jen Tseng, Chia-Heng Yen Efficient micro-bump assignment for RDL routing in 3DICs. Search on Bibsonomy ICECS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
27Ta-Yu Kuan, Yi-Chun Chang, Tai-Chen Chen Micro-bump assignment for 3D ICs using order relation. Search on Bibsonomy ASP-DAC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
27Cheng-Ta Ko, Zhi-Cheng Hsiao, Y. J. Chang, Peng-Shu Chen, J. H. Huang, Hsin-Chia Fu, Y. J. Huang, C. W. Chiang, W. L. Tsat, Y. H. Chen, Wei-Chung Lo, Kuan-Neng Chen Wafer-level 3D integration with Cu TSV and micro-bump/adhesive hybrid bonding technologies. Search on Bibsonomy 3DIC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
27Myeong-Hyeok Jeong, Jae-Won Kim, Byung-Hyun Kwak, Young-Bae Park, Byoung-Joon Kim, Young-Chang Joo Electrical Reliability of Cu/Sn Micro-bump in Wafer Level Packaging for BioMEMS Devices. Search on Bibsonomy BIODEVICES The full citation details ... 2011 DBLP  BibTeX  RDF
27Ken Smith, Peter Hanaway, Mike Jolley, Reed Gleason, Eric Strid, Tom Daenen, Luc Dupas, Bruno Knuts, Erik Jan Marinissen, Marc Van Dievel Evaluation of TSV and micro-bump probing for wide I/O testing. Search on Bibsonomy ITC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
27Nobuaki Miyakawa, Eiri Hashimoto, Takanori Maebashi, Natsuo Nakamura, Yutaka Sacho, Shigeto Nakayama, Shinjiro Toyoda Stacking technology based on 8-inch wafers using direct connection between TSV and micro-bump. Search on Bibsonomy CICC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
19Nobuaki Miyakawa A 3D prototyping chip based on a wafer-level stacking technology. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
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