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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 197 occurrences of 154 keywords
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Results
Found 283 publication records. Showing 283 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
113 | Paolo Ienne |
Horizontal Microcode Compaction for Programmable Systolic Accelerators. |
ASAP |
1995 |
DBLP DOI BibTeX RDF |
Horizontal Microcode, Microcode Compaction, Programmable Systolic Arrays, Neural Networks |
105 | Wei Zhao, Christos A. Papachristou |
Architectural partitioning of control memory for application specific programmable processors. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
application specific programmable processors, control memory, distributed microcode memory model, microcode memory, repetitive microcodes, distributed memory systems, memory architecture, programmability, microprogram, datapaths, firmware, memory module |
105 | Robert A. Mueller, Michael R. Duda, Philip H. Sweany, Jack S. Walicki |
Horizon: A Retargetable Compiler for Horizontal Microarchitectures. |
IEEE Trans. Software Eng. |
1988 |
DBLP DOI BibTeX RDF |
horizontal microarchitectures, vertical migration, complex application code, horizontal microcode, optimized microcode, concurrency, abstraction, timing, program compilers, microprogramming, retargetable compiler, assembly languages, Horizon |
91 | Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha |
Hierarchical test generation and design for testability methods for ASPPs and ASIPs. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1999 |
DBLP DOI BibTeX RDF |
|
87 | Alexander Aiken, Alexandru Nicolau |
A Development Environment for Horizontal Microcode. |
IEEE Trans. Software Eng. |
1988 |
DBLP DOI BibTeX RDF |
horizontal microcode, percolation scheduling, interactive profiling system, microcode compaction process, correctness preservation, semantics-preserving transformations, scheduling, user interfaces, architecture, parallel programming, synchronization, programming environments, synchronisation, graphical interface, development environment, microprogramming, parallelism extraction |
86 | Robert A. Mueller, Joseph Varghese |
Retargetable Microcode Synthesis. |
ACM Trans. Program. Lang. Syst. |
1987 |
DBLP DOI BibTeX RDF |
|
86 | Vicki H. Allan, Robert A. Mueller |
Phase coupling for horizontal microcode generation. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
80 | Brian G. VanBuren, Muhammad Shaaban |
MicroTiger: a graphical microcode simulator with a reconfigurable datapath. |
SIGCSE |
2007 |
DBLP DOI BibTeX RDF |
simulator, visualization, architecture, microcode |
79 | Paul Kenyon, Prathima Agrawal, Sharad C. Seth |
High-level microprogramming: an optimizing C compiler for a processing element of a CAD accelerator. |
MICRO |
1990 |
DBLP BibTeX RDF |
front-end DAG compiler, hand vs. compiled microcode, microcode compiler, programming environment for CAD, space/time overhead, code generation, hardware accelerator, performance data |
73 | Stephen J. Allan |
Functional languages in microcode compilers. |
MICRO |
1989 |
DBLP DOI BibTeX RDF |
|
73 | Bogong Su, Jian Wang 0046, Jinshi Xia |
Global microcode compaction under timing constraints. |
MICRO |
1988 |
DBLP BibTeX RDF |
|
72 | You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong-Min Kyung |
Customization of a CISC Processor Core for Low-Power Applications. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
CISC-processor, Complex-instruction, ROM-compile, Low-power-design, Microcode |
65 | Jack Whitham, Neil C. Audsley |
MCGREP - A Predictable Architecture for Embedded Real-Time Systems. |
RTSS |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Chengmo Yang, Mingjing Chen, Alex Orailoglu |
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses. |
CODES+ISSS |
2009 |
DBLP DOI BibTeX RDF |
microcode compression, microcoded processors |
61 | In-Cheol Park, Se-Kyoung Hong, Chong-Min Kyung |
Two Complementary Approaches for Microcode Bit Optimization. |
IEEE Trans. Computers |
1994 |
DBLP DOI BibTeX RDF |
microcode bit optimization, microprogrammed processors, microcode width, computational complexity, linear programming, heuristic algorithm, integer linear programming, minimization, minimisation, microprogramming, microprogramming, polynomial time complexity, graph bipartitioning |
61 | Joseph A. Fisher |
Trace Scheduling: A Technique for Global Microcode Compaction. |
IEEE Trans. Computers |
1981 |
DBLP DOI BibTeX RDF |
global microcode optimization, microcode compaction, parallel instruction scheduling, parallel processing, Data dependency, resource conflict |
60 | Tamarah Arons, Elad Elster, Limor Fix, Sela Mador-Haim, Michael Mishaeli, Jonathan Shalev, Eli Singerman, Andreas Tiemeyer, Moshe Y. Vardi, Lenore D. Zuck |
Formal Verification of Backward Compatibility of Microcode. |
CAV |
2005 |
DBLP DOI BibTeX RDF |
|
60 | Dongkyu Youn, Taehyung Kim, Sungju Park |
A Microcode-Based Memory BIST Implementing Modified March Algorithm. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
|
60 | Christine Eisenbeis |
Optimization of horizontal microcode generation for loop structures. |
ICS |
1988 |
DBLP DOI BibTeX RDF |
FORTRAN |
60 | Joseph A. Fisher, David Landskov, Bruce D. Shriver |
Microcode compaction: looking backward and looking forward. |
AFIPS National Computer Conference |
1981 |
DBLP DOI BibTeX RDF |
|
52 | Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana |
The MOLEN rho-mu-Coded Processor. |
FPL |
2001 |
DBLP DOI BibTeX RDF |
|
52 | François Bodin, François Charot, Charles Wagner |
Overview of a high-performance programmable pipeline structure. |
ICS |
1989 |
DBLP DOI BibTeX RDF |
|
52 | W. J. Chen, G. N. Reddy |
A computer aided design automation system for developing microprogrammed processors: a design approach through HDLs. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
47 | David Jackson |
Evolution of Processor microcode. |
IEEE Trans. Evol. Comput. |
2005 |
DBLP DOI BibTeX RDF |
|
47 | O. N. Malykh, Yu. S. Shakhnovskii |
Optimization of a Data Dependence Graph for the Local Microcode Compaction Problem. Part 1: Problem Statement. |
Program. Comput. Softw. |
2004 |
DBLP DOI BibTeX RDF |
|
47 | O. N. Malykh, Yu. S. Shakhnovskii |
Optimization of a Data Dependence Graph for the Local Microcode Compaction Problem. Part 2: Algorithms and Experimental Verification. |
Program. Comput. Softw. |
2004 |
DBLP DOI BibTeX RDF |
|
47 | Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana |
Microcode Processing: Positioning and Directions. |
IEEE Micro |
2003 |
DBLP DOI BibTeX RDF |
|
47 | Farhad Mavaddat, M. Mahmood, Mantis H. M. Cheng |
An application of L systems to local microcode synthesis. |
MICRO |
1990 |
DBLP BibTeX RDF |
|
47 | Djahida Smati, Jerry P.-C. Hwang, Christos A. Papachristou |
SMDSS - a structured microcode development and simulation system. |
MICRO |
1990 |
DBLP BibTeX RDF |
|
47 | Pohua P. Chang, Wen-mei W. Hwu |
Trace selection for compiling large C application programs to microcode. |
MICRO |
1988 |
DBLP BibTeX RDF |
C |
47 | Bogong Su, Shiyuan Ding, Jian Wang 0046, Jinshi Xia |
Microcode compaction with timing constraints. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
47 | Jayaram Bhasker |
An algorithm for microcode compaction of VHDL behavioral descriptions. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
47 | Stephen W. Melvin, Yale N. Patt |
SPAM: a microcode based tool for tracing operating system events. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
47 | Mark Harris |
Extending microcode compaction for real architectures. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
47 | Perng-Yi Ma |
The design of a firmware engineering tool: the microcode compiler. |
AFIPS National Computer Conference |
1981 |
DBLP DOI BibTeX RDF |
|
46 | Georgi Kuzmanov, Georgi Gaydadjiev, Stamatis Vassiliadis |
Loading rho-µ-Code: Design Considerations. |
SAMOS |
2004 |
DBLP DOI BibTeX RDF |
MOLEN, loading microcode, implementation, Reconfigurable architectures |
41 | Robert J. Sheraga, John L. Gieser |
Experiments in Automatic Microcode Generation. |
IEEE Trans. Computers |
1983 |
DBLP DOI BibTeX RDF |
Automatic microcode generation, high level microprogramming languages, horizontally microprogrammed processors, microprogram compilers, microprogramming |
41 | Marco Mezzalama, Paolo Prinetto |
A Hierarchical Description Model for Microcode. |
IEEE Trans. Computers |
1983 |
DBLP DOI BibTeX RDF |
hierarchical definition, horizontal microprogramming, microcode compaction, parallelism, Emulation, semantic model |
40 | Christopher John Coles |
Comments on "Heuristic Synthesis of Microprogrammed Computer Architecture". |
IEEE Trans. Computers |
1977 |
DBLP DOI BibTeX RDF |
Applications oriented microcode, automated synthesis of microcode, optimization |
39 | Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana |
Microcoded Reconfigurable Embedded Processors: Current Developments. |
Embedded Processor Design Challenges |
2002 |
DBLP DOI BibTeX RDF |
|
39 | Rolf B. Hilgendorf, Wolfram Sauer |
Instruction translation for an experimental S/390 processor. |
SIGARCH Comput. Archit. News |
2001 |
DBLP DOI BibTeX RDF |
IBM System/390 |
39 | Kamran Zarrineh, Shambhu J. Upadhyaya |
On Programmable Memory Built-In Self Test Architectures. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
39 | Jan W. M. Jacobs, Roger J. H. Hacking |
An integrated microprogram development methodology based on APL. |
APL |
1987 |
DBLP DOI BibTeX RDF |
APL |
34 | S. Bharitkar, Kazuhiro Tsuchiya, Yoshiyasu Takefuji |
Microcode optimization with neural networks. |
IEEE Trans. Neural Networks |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Gert Goossens, Jan M. Rabaey, Joos Vandewalle, Hugo De Man |
An efficient microcode compiler for application specific DSP processors. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1990 |
DBLP DOI BibTeX RDF |
|
34 | Linda A. Kovacs, Steven F. Gilli |
Extended microcode error checking on a pipelined machine. |
MICRO |
1989 |
DBLP DOI BibTeX RDF |
|
34 | Stephen W. Melvin, Yale N. Patt |
The Use of Microcode Instrumentation for Development, Debugging and Tuning of Operating System Kernels. |
SIGMETRICS |
1988 |
DBLP DOI BibTeX RDF |
VAM, UNIX, VAX/VMS |
34 | Michael A. Howland, Robert A. Mueller, Philip H. Sweany |
Trace scheduling optimization in a retargetable microcode compiler. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
33 | Stamatis Vassiliadis, Stephan Wong, Georgi Gaydadjiev, Koen Bertels, Georgi Kuzmanov, Elena Moscu Panainte |
The MOLEN Polymorphic Processor. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
Custom computing machines, reconfigurable microcode, polymorphic processors, FPGA, reconfigurable processors, firmware |
33 | Stuart W. Daniel, Jennifer Rexford, James W. Dolter, Kang G. Shin |
A programmable routing controller for flexible communications in point-to-point networks. |
ICCD |
1995 |
DBLP DOI BibTeX RDF |
programmable routing controller, flexible communications, communication characteristics, custom ASIC, programmable processor, multiple routing-switching microcode routines, multiprocessor interconnection networks, packet switching, packet switching, application specific integrated circuits, wormhole switching, programmable controllers, firmware, performance requirements, virtual cut-through switching, point-to-point networks |
33 | Samvel K. Shoukourian, Armen G. Kostanian, Valery A. Margarian, Ayman A. Ashour |
An approach for system tests design and its application. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
system test design, control testing table, testing processor, correctness problem, polynomial complexity algorithm, software system design, microcode synthesis, CAD system testing, performance evaluation, performance evaluation, program testing, mathematical model, multicomputer systems, computer testing, multi-user systems |
33 | Paul A. Karger, Mary Ellen Zurko, Douglas W. Bonin, Andrew H. Mason, Clifford E. Kahn |
A Retrospective on the VAX VMM Security Kernel. |
IEEE Trans. Software Eng. |
1991 |
DBLP DOI BibTeX RDF |
VAX VMM, A1-level security requirements, standard interfaces, ULTRIX-32 operating systems, multiple concurrent virtual machines, controlled sharing, system management tools, DEC computers, supervisory programs, virtual machines, security of data, configuration management, virtual-machine monitor, isolation, security kernel, microcode, sensitive data |
33 | Vicki H. Allan, Robert A. Mueller |
Compaction with General Timing. |
IEEE Trans. Software Eng. |
1988 |
DBLP DOI BibTeX RDF |
general synchronous timing, microcode generation systems, branch delays, volatile registers, microoperations, multiple microinstructions, clocked microarchitectures, compilers, synchronisation, program compilers, microprogramming, target architecture, data-dependency graphs |
33 | Robert I. Winner |
Naming and Binding in a vertical Migration Environment. |
IEEE Trans. Software Eng. |
1988 |
DBLP DOI BibTeX RDF |
vertical migration environment, maximum performance, linkage editing process, micro-objects, data structures, compilers, abstractions, program compilers, object-oriented model, binding, naming, microprogramming, microcode |
33 | Michael Stonebraker, John Woodfill, Jeff Ranstrom, Marguerite C. Murphy, Marc Meyer, Eric Allman |
Performance Enhancements to a Relational Database System. |
ACM Trans. Database Syst. |
1983 |
DBLP DOI BibTeX RDF |
compiled query languages, file systems for databases, database performance, microcode |
26 | Tamarah Arons, Elad Elster, Shlomit Ozer, Jonathan Shalev, Eli Singerman |
Efficient Symbolic Simulation of Low Level Software. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Jack Whitham, Neil C. Audsley |
Forming Virtual Traces for WCET Analysis and Reduction. |
RTCSA |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Stanislav Korbel, Vlastimil Jánes |
Interesting Applications of Atmel AVR Microcontrollers. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha |
Hierarchical Test Generation and Design for Testability of ASPPs and ASIPs. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
26 | Christian Iseli, Eduardo Sanchez |
A high-level microprogrammed processor. |
MICRO |
1990 |
DBLP BibTeX RDF |
|
26 | Susan J. Eggers, David Keppel, Eric J. Koldinger, Henry M. Levy |
Techniques for Efficient Inline Tracing on a Shared-Memory Multiprocessor. |
SIGMETRICS |
1990 |
DBLP DOI BibTeX RDF |
|
26 | François Bodin, François Charot |
Loop optimization for horizontal microcoded machines. |
ICS |
1990 |
DBLP DOI BibTeX RDF |
|
26 | J. L. Linn, C. D. Ardoin |
All example of using pseudofields to eliminate version shuffling in horizontal code compaction. |
MICRO |
1989 |
DBLP DOI BibTeX RDF |
|
26 | Johannes M. Mulder, Robert J. Portier, A. Srivastava, R. in 't Velt |
Efficient macro-code emulation in hardwired pipelined processors. |
MICRO |
1988 |
DBLP BibTeX RDF |
|
26 | Onat Menzilcioglu |
A case study in using two-level control stores. |
MICRO |
1987 |
DBLP DOI BibTeX RDF |
|
26 | Alice C. Parker, Wayne T. Wilner |
Microprogramming: the challenges of VLSI. |
AFIPS National Computer Conference |
1981 |
DBLP DOI BibTeX RDF |
|
26 | Louise H. Jones |
Instruction sequencing in microprogrammed computers. |
AFIPS National Computer Conference |
1975 |
DBLP DOI BibTeX RDF |
|
21 | Pietro Borrello, Catherine Easdon, Martin Schwarzl, Roland Czerny, Michael Schwarz 0001 |
CustomProcessingUnit: Reverse Engineering and Customization of Intel Microcode. |
SP (Workshops) |
2023 |
DBLP DOI BibTeX RDF |
|
21 | Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat |
Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. |
MICRO |
2022 |
DBLP DOI BibTeX RDF |
|
21 | Lucas Klemmer, Sonja Gurtner, Daniel Große |
Formal Verification of SUBLEQ Microcode implementing the RV32I ISA. |
FDL |
2022 |
DBLP DOI BibTeX RDF |
|
21 | Zhiguo Yang, Qingbao Li, Ping Zhang, Zhifeng Chen |
Reverse Engineering of Intel Microcode Update Structure. |
IEEE Access |
2020 |
DBLP DOI BibTeX RDF |
|
21 | Benjamin Kollenda, Philipp Koppe, Marc Fyrbiak, Christian Kison, Christof Paar, Thorsten Holz |
An Exploratory Analysis of Microcode as a Building Block for System Defenses. |
CoRR |
2020 |
DBLP BibTeX RDF |
|
21 | Qian Zhao 0001, Yasuhiro Nakahara, Motoki Amagasaki, Masahiro Iida, Takaichi Yoshida |
A Microcode-based Control Unit for Deep Learning Processors. |
IPDPS Workshops |
2020 |
DBLP DOI BibTeX RDF |
|
21 | Rasool Sharifi, Ashish Venkat |
CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities. |
ISCA |
2020 |
DBLP DOI BibTeX RDF |
|
21 | Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen |
Context-Sensitive Decoding: On-Demand Microcode Customization for Security and Energy Management. |
IEEE Micro |
2019 |
DBLP DOI BibTeX RDF |
|
21 | Philipp Koppe, Benjamin Kollenda, Marc Fyrbiak, Christian Kison, Robert Gawlik, Christof Paar, Thorsten Holz |
Reverse Engineering x86 Processor Microcode. |
CoRR |
2019 |
DBLP BibTeX RDF |
|
21 | Mohammadkazem Taram, Ashish Venkat, Dean M. Tullsen |
Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization. |
ASPLOS |
2019 |
DBLP DOI BibTeX RDF |
|
21 | Benjamin Kollenda, Philipp Koppe, Marc Fyrbiak, Christian Kison, Christof Paar, Thorsten Holz |
An Exploratory Analysis of Microcode as a Building Block for System Defenses. |
CCS |
2018 |
DBLP DOI BibTeX RDF |
|
21 | Philipp Koppe, Benjamin Kollenda, Marc Fyrbiak, Christian Kison, Robert Gawlik, Christof Paar, Thorsten Holz |
Reverse Engineering x86 Processor Microcode. |
USENIX Security Symposium |
2017 |
DBLP BibTeX RDF |
|
21 | Abir M'zah, Bruno Monsuez, Hycham Aboutaleb |
Deterministic microcode machine generation. |
DSC |
2017 |
DBLP DOI BibTeX RDF |
|
21 | Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo 0003, Shenggang Chen, Hu Chen, Man Liao |
Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips. |
J. Softw. |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Yasha Jyothi M. Shirur, Bilure Chetana Bhimashankar, Veena S. Chakravarthi |
Performance analysis of low power microcode based asynchronous P-MBIST. |
ICACCI |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Luca Dariz, Massimiliano Ruggeri, Michele Selvatici |
A static microcode analysis tool for programmable load drivers. |
SCAM |
2015 |
DBLP DOI BibTeX RDF |
|
21 | Edson Borin, Guido Araujo, Maurício Breternitz Jr., Youfeng Wu |
Microcode Compression Using Structured-Constrained Clustering. |
Int. J. Parallel Program. |
2014 |
DBLP DOI BibTeX RDF |
|
21 | Jared Davis, Anna Slobodová, Sol Swords |
Microcode Verification - Another Piece of the Microprocessor Verification Puzzle. |
ITP |
2014 |
DBLP DOI BibTeX RDF |
|
21 | Edson Borin, Guido Araujo, Maurício Breternitz Jr., Youfeng Wu |
Structure-Constrained Microcode Compression. |
SBAC-PAD |
2011 |
DBLP DOI BibTeX RDF |
|
21 | R. K. Sharma, Aditi Sood |
Modeling and Simulation of Multi-operation Microcode-Based Built-In Self Test for Memory Fault Detection and Repair. |
ISVLSI |
2010 |
DBLP DOI BibTeX RDF |
|
21 | NurQamarina MohdNoor, Azilah Saparon, Yusrina Yusof, Mahmud Adnan |
New Microcode's Generation Technique for Programmable Memory Built-In Self Test. |
Asian Test Symposium |
2010 |
DBLP DOI BibTeX RDF |
|
21 | NurQamarina MohdNoor, Azilah Saparon, Yusrina Yusof |
Programmable MBIST Merging FSM and Microcode Techniques Using Macro Commands. |
DFT |
2010 |
DBLP DOI BibTeX RDF |
|
21 | Anders Franzén, Alessandro Cimatti, Alexander Nadel, Roberto Sebastiani, Jonathan Shalev |
Applying SMT in symbolic execution of microcode. |
FMCAD |
2010 |
DBLP BibTeX RDF |
|
21 | R. K. Sharma, Aditi Sood |
Modeling and Simulation of Multi-operation Microcode-Based Built-In Self Test for Memory Faults. |
ICSAP |
2010 |
DBLP DOI BibTeX RDF |
Defect-Per Million (DPM), Memory Built-in Self Test (MBIST), Microcoded MBIST, MUT (Memory Under Test), Built-In Self Test (BIST) |
21 | Alireza Hodjat, Lejla Batina, David Hwang 0001, Ingrid Verbauwhede |
HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. |
Integr. |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Edson Borin |
Microcode compression algorithms. |
|
2007 |
RDF |
|
21 | Bernhard Fechner |
Microcode with Embedded Timing Constraints. |
ARCS Workshops |
2006 |
DBLP BibTeX RDF |
|
21 | Edson Borin, Maurício Breternitz Jr., Youfeng Wu, Guido Araujo |
Clustering-Based Microcode Compression. |
ICCD |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Steven P. Goldman, Lisa M. Mohr, David R. Smith |
Using microcode in the functional verification of an I/O chip. |
IBM J. Res. Dev. |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen |
A compact DSP core with static floating-point unit & its microcode generation. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
DSP core, digital signal processor, floating-point units |
21 | Stefan Koerner, Martin Kuenzel, Edward C. McCain |
IBM eServer z900 system microcode verification by simulation: The virtual power-on process. |
IBM J. Res. Dev. |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Joachim von Buttlar, Harald Böhm, Reinhard Ernst, Axel Horsch, Andreas Kohler, Herbert Schein, Michael Stetter, Klaus Theurich |
z/CECSIM: An efficient and comprehensive microcode simulator for the IBM eServer z900. |
IBM J. Res. Dev. |
2002 |
DBLP DOI BibTeX RDF |
|
21 | David M. Russinoff |
A Mechanically Checked Proof of Correctness of the AMD K5 Floating Point Square Root Microcode. |
Formal Methods Syst. Des. |
1999 |
DBLP DOI BibTeX RDF |
|
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