Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
115 | Joerg Abke, Erich Barke, Jörn Stohmann |
A Universal Module Generator for LUT-Based FPGAs. |
IEEE International Workshop on Rapid System Prototyping |
1999 |
DBLP DOI BibTeX RDF |
Multiplexor, Multiplexor Structure, FPGA, Technology Mapping, Module Generator |
105 | Alan T. Krantz, Sarah E. Chodrow, Michael D. Hirsch, Injong Rhee, Julie Sult, Vaidy S. Sunderam |
Design and Implementation of a Distributed X-Multiplexor. |
ICDCS |
1998 |
DBLP DOI BibTeX RDF |
X11, Collaboration, Application Sharing |
86 | Yung-Ming Fang, D. F. Wong 0001 |
Multiplexor Network Generation in High Level Synthesis. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
High Level Synthesis |
67 | Dhananjay S. Phatak, Israel Koren |
Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition. |
IEEE Symposium on Computer Arithmetic |
1999 |
DBLP DOI BibTeX RDF |
|
59 | Rolf Drechsler, Junhao Shi, Görschwin Fey |
MuTaTe: an efficient design for testability technique for multiplexor based circuits. |
ACM Great Lakes Symposium on VLSI |
2003 |
DBLP DOI BibTeX RDF |
multiplexor based circuits, design for testability, logic synthesis, BDDs, decision diagrams |
48 | Brian F. Redmond |
Multiplexor Categories and Models of Soft Linear Logic. |
LFCS |
2007 |
DBLP DOI BibTeX RDF |
Categorical semantics, Soft Linear Logic, Polynomial time, Game semantics |
38 | Aiman H. El-Maleh, Janusz Rajski |
Delay-fault testability preservation of the concurrent decomposition and factorization transformations. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
30 | Po-Cheng Tsai, Yen Ting Lu, Tsung-Yi Ho, Ya-Tang Yang |
A standalone, programmable digital microfluidics system with multiplexor interface logic. |
MED |
2021 |
DBLP DOI BibTeX RDF |
|
30 | James R. Hoff |
Conflux - An Asynchronous Two-to-One Multiplexor for Time-Division Multiplexing and Clockless, Tokenless Readout. |
IEEE Trans. Very Large Scale Integr. Syst. |
2020 |
DBLP DOI BibTeX RDF |
|
30 | Or Meir |
Toward Better Depth Lower Bounds: Two Results on the Multiplexor Relation. |
Comput. Complex. |
2020 |
DBLP DOI BibTeX RDF |
|
30 | Or Meir |
Toward Better Depth Lower Bounds: Two Results on the Multiplexor Relation. |
Electron. Colloquium Comput. Complex. |
2019 |
DBLP BibTeX RDF |
|
30 | Shaofa Yang, Hon Wai Leong |
Improved Algorithms for Low Power Multiplexor Decomposition. |
J. Circuits Syst. Comput. |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Frank te Beest, Ad M. G. Peeters |
A Multiplexor Based Test Method for Self-Timed Circuits. |
ASYNC |
2005 |
DBLP DOI BibTeX RDF |
|
30 | Belka Kraimeche |
Voice and data integration at an ATM DSL access multiplexor. |
Telecommun. Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Rolf Drechsler, Wolfgang Günther 0001 |
Evolutionary Synthesis of Multiplexor Circuits under Hardware Constraints. |
GECCO |
2000 |
DBLP BibTeX RDF |
|
30 | Mónica Aguilar-Igartua |
Contribución al modelado y caracterización de nodos en redes de banda ancha. Aplicación al multiplexor inverso ATM. |
|
2000 |
RDF |
|
30 | Abdelnaser Mohammad Adas, Amarnath Mukherjee |
Providing Heterogeneous Quality of Service Bounds for Correlated Video Traffic at a Multiplexor. |
Perform. Evaluation |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Belka Kraimeche |
Cell Loss and Call Blocking at an ATM Multiplexor. |
ICCCN |
1998 |
DBLP DOI BibTeX RDF |
|
30 | Pranav Ashar, Srinivas Devadas, Kurt Keutzer |
Path-delay-fault testability properties of multiplexor-based networks. |
Integr. |
1993 |
DBLP DOI BibTeX RDF |
|
30 | Pranav Ashar, Srinivas Devadas, Kurt Keutzer |
Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. |
Formal Methods Syst. Des. |
1993 |
DBLP DOI BibTeX RDF |
|
30 | Ricardo P. Jacobi, Anne-Marie Trullemans |
A new logic minimization method for multiplexor-based FPGA synthesis. |
EURO-DAC |
1993 |
DBLP DOI BibTeX RDF |
|
30 | Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
An Improved Synthesis Algorithm for Multiplexor-Based PGA's. |
DAC |
1992 |
DBLP BibTeX RDF |
|
30 | Pranav Ashar, Srinivas Devadas, Kurt Keutzer |
Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. |
ITC |
1991 |
DBLP DOI BibTeX RDF |
|
30 | Belka Kraimeche |
Integration of Narrowband and Wideband Traffic at an STM Multiplexor. |
ICSI |
1990 |
DBLP BibTeX RDF |
|
30 | A. D. Elliman, A. R. Sudhindra |
Performances of two Microprocessor-Based Multiplexor Techniques. |
Comput. J. |
1981 |
DBLP DOI BibTeX RDF |
|
30 | P. D. Burke |
A Case Study in Front-Ending: A Nova 1200 'Front-End' to a CDC 6671 Multiplexor. |
Aust. Comput. J. |
1976 |
DBLP BibTeX RDF |
|
29 | Alexander Birman, H. Richard Gail, Sidney L. Hantler, Zvi Rosberg, Moshe Sidi |
An Optimal Service Policy for Buffer Systems. |
J. ACM |
1995 |
DBLP DOI BibTeX RDF |
gradual input, multiplexor, switch, buffer overflow, parallel queues, service discipline |
19 | Andrew Harrison 0001, Ian J. Taylor |
Web enabling desktop workflow applications. |
SC-WORKS |
2009 |
DBLP DOI BibTeX RDF |
OMII, WHIP, eScience workflows, collaboration, metadata, web 2.0, information exchange |
19 | Vivek V. Shende, Stephen S. Bullock, Igor L. Markov |
Synthesis of quantum-logic circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Ulrich Kühne, Nicole Drechsler |
Finding Compact BDDs Using Genetic Programming. |
EvoWorkshops |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jorge Júlvez, Jordi Cortadella, Michael Kishinevsky |
Performance analysis of concurrent systems with early evaluation. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Joan Daemen, Gilles Van Assche |
Distinguishing Stream Ciphers with Convolutional Filters. |
SCN |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Atsushi Wada, Keiki Takadama, Katsunori Shimohara, Osamu Katai |
Analyzing Parameter Sensitivity and Classifier Representations for Real-Valued XCS. |
IWLCS |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Ahmed Aslam, Kenneth J. Christensen |
Parallel Packet Switching Using Multiplexors with Virtual Input Queues. |
LCN |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Philip Hawkes, Frank Quick, Gregory G. Rose |
A Practical Cryptanalysis of SSC2. |
Selected Areas in Cryptography |
2001 |
DBLP DOI BibTeX RDF |
SSC2, fast correlation attack |
19 | Wolfgang Günther 0001, Rolf Drechsler |
Performance Driven Optimization for MUX based FPGAs. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
19 | Wolfgang Günther 0001, Rolf Drechsler |
ACTion: Combining Logic Synthesis and Technology Mapping for MUX Based FPGAs. |
EUROMICRO |
2000 |
DBLP DOI BibTeX RDF |
|
19 | Debatosh Debnath, Tsutomu Sasao |
Fast Boolean Matching Under Permutation Using Representative. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
variable permutation, P-equivalence, technology mapping, Boolean matching |
19 | Lashon B. Booker |
Do We Really Need to Estimate Rule Utilities in Classifier Systems?. |
Learning Classifier Systems |
1999 |
DBLP DOI BibTeX RDF |
|
19 | Kenneth Y. Yun, Bill Lin 0001, David L. Dill, Srinivas Devadas |
BDD-based synthesis of extended burst-mode controllers. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
19 | Pradeep Prabhakaran, Prithviraj Banerjee |
Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
timing driven synthesis, High-level synthesis, floorplanning |
19 | Yongjin Jeong, Wayne P. Burleson |
VLSI array algorithms and architectures for RSA modular multiplication. |
IEEE Trans. Very Large Scale Integr. Syst. |
1997 |
DBLP DOI BibTeX RDF |
|
19 | Chidanand Apté, Se June Hong, Jonathan R. M. Hosking, Jorge Lepre, Edwin P. D. Pednault, Barry K. Rosen |
Decomposition of Heterogeneous Classification Problems. |
IDA |
1997 |
DBLP DOI BibTeX RDF |
|
19 | Renu Mehra, Lisa M. Guerra, Jan M. Rabaey |
Low-power architectural synthesis and the impact of exploiting locality. |
J. VLSI Signal Process. |
1996 |
DBLP DOI BibTeX RDF |
|
19 | Kenneth Y. Yun, Bill Lin 0001, David L. Dill, Srinivas Devadas |
Performance-driven synthesis of asynchronous controllers. |
ICCAD |
1994 |
DBLP DOI BibTeX RDF |
|
19 | Larry L. Peterson |
Life on the OS/network boundary. |
ACM SIGOPS European Workshop |
1992 |
DBLP DOI BibTeX RDF |
|
19 | Rajeev Murgai, Yoshihito Nishizaki, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Logic Synthesis for Programmable Gate Arrays. |
DAC |
1990 |
DBLP DOI BibTeX RDF |
|