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Publication years (Num. hits)
1979-1995 (17) 1996-1999 (16) 2000-2001 (18) 2002-2003 (26) 2004 (15) 2005 (22) 2006 (18) 2007 (19) 2008-2009 (15) 2010-2012 (19) 2013-2014 (22) 2015-2016 (24) 2017 (18) 2018-2019 (15) 2020-2021 (17) 2022 (15) 2023-2024 (12)
Publication types (Num. hits)
article(142) inproceedings(165) phdthesis(1)
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Results
Found 308 publication records. Showing 308 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
97Somchart Chokchaitam, Masahiro Iwahashi A New Optimum-Word-Length-Assignment (OWLA) Multiplierless Integer DCT for Lossless/Lossy Image Coding and Its Performance Evaluation. Search on Bibsonomy ACIVS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
81Benjamin W. Wah, Zhe Wu 0002 Discrete Lagrangian Methods for Designing Multiplierless Two-Channel PR-LP Filter Banks. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
66Juha Yli-Kaakinen, Tapio Saramäki Design and implementation of multiplierless adjustable fractional-delay all-pass filters. Search on Bibsonomy ISCAS (2) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
66Mrinmoy Bhattacharya, Tapio Saramäki Fourth-order structures for multiplierless realizations of bandpass and bandstop digital filters transformed from all-pole lowpass filters. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
66Kun-Wah Yip, Yik-Chung Wu, Tung-Sang Ng A new multiplierless correlator for timing synchronization in IEEE 802.11a WLANs. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
50Lijie Liu, Trac D. Tran Rate-Distortion Analysis of Multiplierless Lifting-based IDCT Approximations. Search on Bibsonomy CISS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
50Qiu-Zhong Wu, Yi-He Sun An Integrated CAD Tool for ASIC Implementation of Multiplierless FIR Filters with Common Sub-expression Elimination Optimization. Search on Bibsonomy ESTIMedia The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
50Yongtao Wang, Kaushik Roy 0001 A novel low-complexity method for parallel multiplierless implementation of digital FIR filters. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
50Myung Hoon Sunwoo, Seong Keun Oh A Multiplierless 2-D Convolver Chip for Real-Time Image Processing. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF image processing, VLSI design, VLSI architecture, convolution, multiplier, digital filter
50Markus Püschel, Adam C. Zelinski, James C. Hoe Custom-optimized multiplierless implementations of DSP algorithms. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
50Kamakshi Sivaramakrishnan, Ivan R. Linscott, G. Leonard Tyler Design of multiplierless programmable linear phase narrowband-bandpass FIR filters. Search on Bibsonomy ISCAS (3) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
50R. Thamvichai, Tamal Bose, Miloje S. Radenkovic Multiplierless predictor for DPCM of images. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
50Mrinmoy Bhattacharya, Tapio Saramäki Some observations on multiplierless implementation of linear phase FIR filters. Search on Bibsonomy ISCAS (4) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
50Benjamin W. Wah, Yi Shang, Zhe Wu 0002 Discrete Lagrangian Method for Optimizing the Design of Multiplierless QMF Filter Banks. Search on Bibsonomy ASAP The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
50Ali N. Akansu Multiplierless PR quadrature mirror filters for subband image coding. Search on Bibsonomy IEEE Trans. Image Process. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
47Ben I. Hounsell, Tughrul Arslan, Robert Thomson 0003 Evolutionary design and adaptation of high performance digital filters within an embedded reconfigurable fault tolerant hardware platform. Search on Bibsonomy Soft Comput. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Robust hardware, Finite impulse response filters, Genetic algorithms, Fault tolerant, Programmable logic arrays, PLAs, FIR filters, Evolvable hardware
47Khurram Muhammad, Kaushik Roy 0001 A graph theoretic approach for synthesizing very low-complexityhigh-speed digital filters. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
47Ben I. Hounsell, Tughrul Arslan Evolutionary Design And Adaptation Of Digital Filters Within An Embedded Fault Tolerant Hardware Platform . Search on Bibsonomy Evolvable Hardware The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
47Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters. Search on Bibsonomy PDCAT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF DWT/IDWT, image coding/decoding system, 4-tap Daubechies filters, multiplierless, low-power, JPEG-2000
47HyungJun Kim Image Compression Using Biorthogonal Wavelet Transforms with Multiplierless 2-D Filter Mask Operation. Search on Bibsonomy ICIP (1) The full citation details ... 1997 DBLP  DOI  BibTeX  RDF biorthogonal wavelet transforms, dyadic regional filter coefficients, high computational speed, 2D filter mask operation, two-dimensional reconstruction filter masks, nonzero-valued pixels, inverse wavelet transform, arithmetic bit-shifting, integer addition operations, compression gain, Hilbert scanning, multiplierless 2D filter masks, image coding, image compression, convolution
43Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro 0001 Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF multiple constant multiplication, multiplierless digital filter design, delay optimization, area optimization
35Min Li 0001, David Novo, Bruno Bougard, Frederik Naessens, Liesbet Van der Perre, Francky Catthoor An implementation friendly low complexity multiplierless LLR generator for soft MIMO sphere decoders. Search on Bibsonomy SiPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Douglas L. Maskell, Achutavarrier Prasad Vinod, Graham S. Woods Multiplierless multi-standard SDR channel filters. Search on Bibsonomy MMSP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35J. Luis Tecpanecatl-Xihuitl, Ruth Aguilar-Ponce, Magdy A. Bayoumi Hybrid multiplierless FIR filter architecture based on NEDA. Search on Bibsonomy VLSI-SoC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Kishore A. Kotteri, Amy E. Bell, Joan Carletta Multiplierless filter Bank design: structures that improve both hardware and image compression performance. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Technol. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Raymond K. W. Chan, Moon-Chuen Lee Multiplierless Fast DCT Algorithms with Minimal Approximation Errors. Search on Bibsonomy ICPR (3) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Go-An Rau, Meng-Xin Guo Multiplierless Realization of Modified Comb Filter by Using Xilinx Spartan FPGAs. Search on Bibsonomy ICICIC (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Raymond K. W. Chan, Moon-Chuen Lee Multiplierless Approximation of Fast DCT Algorithms. Search on Bibsonomy ICME The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Uwe Meyer-Bäse, Jiajia Chen 0002, Chip-Hong Chang, Andrew G. Dempster A Comparison of Pipelined RAG-n and DA FPGA-based Multiplierless Filters. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Valentina I. Anzova, Juha Yli-Kaakinen, Tapio Saramäki An Algorithm for the Design of Multiplierless IIR Filters as a Parallel Connection of Two All-Pass Filters. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Ming Z. Zhang, Vijayan K. Asari A Fully Pipelined Multiplierless Architecture for 2D Convolution with Quadrant Symmetric Kernels. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
35Luciano Volcan Agostini, Roger Endrigo Carvalho Porto, Sergio Bampi, Ivan Saraiva Silva A FPGA Based Design of a Multiplierless and Fully Pipelined JPEG Compressor. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Yasuhiro Takahashi, Michio Yokoyama New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination. Search on Bibsonomy ISCAS (2) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Jun Wei Lee, Yong Ching Lim A multiplierless filter bank with deep stopband suppression and narrow transition width. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Fei Xu, Chip-Hong Chang, Ching-Chuen Jong A new contention resolution algorithm for the design of minimal logic depth multiplierless filters. Search on Bibsonomy ISCAS (3) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Mrinmoy Bhattacharya, Tapio Saramäki Allpass structures for multiplierless realization of recursive digital filters. Search on Bibsonomy ISCAS (4) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
35Mrinmoy Bhattacharya, Tapio Saramäki Multiplierless implementation of bandpass and bandstop recursive digital filters using allpass structures. Search on Bibsonomy ISCAS (4) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
35Juha Yli-Kaakinen, Tapio Saramäki A systematic algorithm for the design of multiplierless FIR filters. Search on Bibsonomy ISCAS (2) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
35Jinsong Mao, Wu-Sheng Lu, Shing-Chow Chan, Andreas Antoniou Design and multiplierless implementation of two-channel biorthogonal IIR filter banks with low system delay. Search on Bibsonomy ISCAS (2) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
35Mrinmoy Bhattacharya, Jaakko Astola Multiplierless implementation of recursive digital filters based on coefficient translation methods in low sensitivity structures. Search on Bibsonomy ISCAS (2) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
35Khurram Muhammad, Kaushik Roy 0001 A Graph Theoretic Approach for Design and Synthesis of Multiplierless FIR Filters. Search on Bibsonomy ISSS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
31Carlos Salazar-Lazaro, Trac D. Tran A Complexity Scalable Universal DCT Domain Image Resizing Algorithm. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Technol. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
31Ya Jun Yu, Yong Ching Lim Roundoff Noise Analysis of Signals Represented Using Signed Power-of-Two Terms. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
31Robert Thomson 0003, Tughrul Arslan Techniques for the evolution of pipelined linear transforms. Search on Bibsonomy Congress on Evolutionary Computation The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
31Mohammed Javed Absar, Pol Marchal, Francky Catthoor Data-Access Optimization of Embedded Systems Through Selective Inlining Transformation. Search on Bibsonomy ESTIMedia The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
31Alen Docef, Faouzi Kossentini, Khanh Nguyen-Phi, Ismaeil R. Ismaeil The quantized DCT and its application to DCT-based video coding. Search on Bibsonomy IEEE Trans. Image Process. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Levent Aksoy, Diego Jaccottet, Eduardo Costa 0001 Design of low complexity digital FIR filters. Search on Bibsonomy SBCCI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF low-level synthesis, multiple constant multiplications, multiplierless filter design, high-level synthesis, array multipliers
27Levent Aksoy, Ece Olcay Günes An approximate algorithm for the multiple constant multiplications problem. Search on Bibsonomy SBCCI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF graph-based technique, multiple constant multiplications problem, multiplierless filter design, approximate algorithm
27Peter Tummeltshammer, James C. Hoe, Markus Püschel Multiple constant multiplication by time-multiplexed mapping of addition chains. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF multiplierless, fusion, directed acyclic graph, addition chains
19Saeed Haghiri, Salah I. Yahya, Abbas Rezaei, Arash Ahmadi Multiplierless Implementation of Fitz-Hugh Nagumo (FHN) Modeling Using CORDIC Approach. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. Intell. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Charalampos Eleftheriadis, Georgios Chatzitsompanis, Georgios Karakonstantis Enabling Voltage Over-Scaling in Multiplierless DSP Architectures via Algorithm-Hardware Co-Design. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Jhilam Jana, Ritesh Sur Chowdhury, Sayan Tripathi, Jaydeb Bhaumik FPGA implementation of compact and low-power multiplierless architectures for DWT and IDWT. Search on Bibsonomy J. Real Time Image Process. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur Multiplierless In-filter Computing for tinyML Platforms. Search on Bibsonomy VLSID The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
19Charalampos Eleftheriadis, Georgios Karakonstantis Optimal Adder-Multiplexer Co-Optimization for Time-Multiplexed Multiplierless Architectures. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Martin Kumm, Anastasia Volkova, Silviu-Ioan Filip Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Saeed Haghiri, Salah I. Yahya, Abbas Rezaei, Arash Ahmadi Multiplierless low-cost implementation of Hindmarsh-Rose neuron model in case of large-scale realization. Search on Bibsonomy Int. J. Circuit Theory Appl. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur Multiplierless In-filter Computing for tinyML Platforms. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Levent Aksoy, Debapriya Basu Roy, Malik Imran, Samuel Pagliarini Multiplierless Design of High-Speed Very Large Constant Multiplications. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Robson Domanski, William Kolodziejski, Wagner Penny, Marcelo Schiavon Porto, Bruno Zatt, Luciano Agostini High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation. Search on Bibsonomy ICIP The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Gordana Jovanovic-Dolecek, José M. de la Rosa 0001 Design of Wideband Multiplierless Compensators for Sharpened CIC Filters. Search on Bibsonomy MWSCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Robson Domanski, William Kolodziejski, Wagner Penny, Marcelo Schiavon Porto, Bruno Zatt, Luciano Agostini High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation. Search on Bibsonomy LASCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
19Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur Multiplierless MP-Kernel Machine for Energy-Efficient Edge Devices. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Fei Lyu 0002, Yan Xia, Zhelong Mao, Yanxu Wang, Yu Wang 0161, Yuanyong Luo ML-PLAC: Multiplierless Piecewise Linear Approximation for Nonlinear Function Evaluation. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Jianming Cai, Han Bao 0001, Mo Chen, Quan Xu 0001, Bocheng Bao Analog/Digital Multiplierless Implementations for Nullcline-Characteristics-Based Piecewise Linear Hindmarsh-Rose Neuron Model. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Levent Aksoy, Debapriya Basu Roy, Malik Imran, Patrick Karl, Samuel Pagliarini Multiplierless Design of Very Large Constant Multiplications in Cryptography. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Ahmad Ghiasi, Abdulhamid Zahedi Field-programmable gate arrays-based Morris-Lecar implementation using multiplierless digital approach and new divider-exponential modules. Search on Bibsonomy Comput. Electr. Eng. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Abdolvahab Khalili Sadaghiani, Samad Sheikhaei, Behjat Forouzandeh Low Complexity Multiplierless Welch Estimator Based on Memory-Based FFT. Search on Bibsonomy J. Circuits Syst. Comput. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19A. Abinaya, M. Maheswari Heuristic Analysis of Multiplierless Desensitized Half-Band Decimation Filter for Wireless Applications. Search on Bibsonomy J. Circuits Syst. Comput. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Gordana Jovanovic-Dolecek Comb decimator design based on symmetric polynomials with roots on the unit circle: Two-stage multiplierless design and improved magnitude characteristic. Search on Bibsonomy Int. J. Circuit Theory Appl. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Aljosa Dudarin, Goran Molnar, Mladen Vucic Optimum multiplierless sharpened cascaded-integrator-comb filters. Search on Bibsonomy Digit. Signal Process. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Guodao Zhang, Ruyu Liu, Yisu Ge, Abdulilah Mohammad Mayet, Sixian Chan, Guoqing Li, Ehsan Nazemi Investigation on the Wilson Neuronal Model: Optimized Approximation and Digital Multiplierless Implementation. Search on Bibsonomy IEEE Trans. Biomed. Circuits Syst. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Levent Aksoy, Debapriya Basu Roy, Malik Imran, Patrick Karl, Samuel Pagliarini Multiplierless Design of Very Large Constant Multiplications in Cryptography. Search on Bibsonomy CoRR The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Rémi Garcia 0002, Anastasia Volkova, Martin Kumm, Alexandre Goldsztejn, Jonas Kühle Hardware-Aware Design of Multiplierless Second-Order IIR Filters With Minimum Adders. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Marwan A. Fetteha, Wafaa S. Sayed, Lobna A. Said, Salwa K. Abd-El-Hafiz, Ahmed G. Radwan Registerless Multiplierless YCoCg-R and YCoCg Color Space Converters Hardware Implementation. Search on Bibsonomy ICCTA The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Gordana Jovanovic-Dolecek Design of Multiplierless Wideband Compensator for Modified Cosine-Based Comb Decimator with Improved Aliasing Rejection. Search on Bibsonomy MWSCAS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Tobias Habermann, Jonas Kühle, Martin Kumm, Anastasia Volkova Hardware-Aware Quantization for Multiplierless Neural Network Controllers. Search on Bibsonomy APCCAS The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
19Malik S. A., Ajaz Hussain Mir Discrete Multiplierless Implementation of Fractional Order Hindmarsh-Rose Model. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. Intell. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Seyed Hadi Mirfarshbafan, Sueda Taner, Christoph Studer SMUL-FFT: A Streaming Multiplierless Fast Fourier Transform. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur Multiplierless MP-Kernel Machine For Energy-efficient Edge Devices. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
19Rémi Garcia 0002, Anastasia Volkova, Martin Kumm, Alexandre Goldsztejn, Jonas Kühle Hardware-aware Design of Multiplierless Second-Order IIR Filters with Minimum Adders. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
19Nguyen T. Thao, Dominik Rzepka Time Encoding of Bandlimited Signals: Reconstruction by Pseudo-Inversion and Time-Varying Multiplierless FIR Filtering. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19S. Skandha Deepsita, Kuchipudi Divya, Sk. Noor Mahammad Energy Efficient and Multiplierless Approximate Integer DCT Implementation for HEVC. Search on Bibsonomy VLSI-SoC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Vladislav A. Lesnikov, Tatiana V. Naumovich, Alexander V. Chastikov Multiplierless IIR Filter Design Technique. Search on Bibsonomy MECO The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19Lulin Cai, Yiduan Qian, Yajuan He, Wen Feng Design of Approximate Multiplierless DCT with CSD Encoding for Image Processing. Search on Bibsonomy ISCAS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
19AlaaEddin Loulou, Juha Yli-Kaakinen, Toni Levanen, Vesa Lehtinen, Frank Schaich, Thorsten Wild, Markku Renfors, Mikko Valkama Multiplierless Filtered-OFDM Transmitter for Narrowband IoT Devices. Search on Bibsonomy IEEE Internet Things J. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19N. Sajwan, Ila Sharma, Anil Kumar 0001, L. K. Balyan Performance of Multiplierless FIR Filter Based on Directed Minimal Spanning Tree: A Comparative Study. Search on Bibsonomy Circuits Syst. Signal Process. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Anirban Chakraborty 0004, Ayan Banerjee 0003 A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic. Search on Bibsonomy J. Circuits Syst. Comput. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Yashrajsinh Parmar, K. Sridharan 0001 A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Wallace A. Martins, M. R. Bhavani Shankar, Björn E. Ottersten Oversampled DFT-Modulated Biorthogonal Filter Banks: Perfect Reconstruction Designs and Multiplierless Approximations. Search on Bibsonomy IEEE Trans. Circuits Syst. The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Gordana Jovanovic-Dolecek, Luis A. Camuñas-Mesa, José M. de la Rosa 0001 Low Order Wideband Multiplierless Comb Compensator. Search on Bibsonomy MWSCAS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Luiz Felipe da Silveira Coelho, Lisandro Lovisolo, Michel Pompeu Tcheou A Proposal for Multiplierless RLS Adaptive Filters with Implementation Complexity Constraint. Search on Bibsonomy ISCAS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. Search on Bibsonomy ISCAS The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
19Sebastian A. A. Vogel Design and implementation of number representations for efficient multiplierless acceleration of convolutional neural networks. Search on Bibsonomy 2020   RDF
19Supriya Dhabal, Palaniandavar Venkateswaran An Improved Global-Best-Guided Cuckoo Search Algorithm for Multiplierless Design of Two-Dimensional IIR Filters. Search on Bibsonomy Circuits Syst. Signal Process. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Xiaobai Chen, Jinglong Xu, Zhiyi Yu A 68-mw 2.2 Tops/w Low Bit Width and Multiplierless DCNN Object Detection Processor for Visually Impaired People. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Technol. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Nazreen P. M., Shantanu Chakrabartty, Chetan Singh Thakur Multiplierless and Sparse Machine Learning based on Margin Propagation Networks. Search on Bibsonomy CoRR The full citation details ... 2019 DBLP  BibTeX  RDF
19Abdulhamid Zahedi, Saeed Haghiri, Mohsen Hayati Multiplierless Digital Implementation of Time-Varying FitzHugh-Nagumo Model. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Sebastian Vogel, Jannik Springer, Andre Guntoro, Gerd Ascheid Self-Supervised Quantization of Pre-Trained Neural Networks for Multiplierless Acceleration. Search on Bibsonomy DATE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Jinti Hazarika, Mohd. Tasleem Khan, Shaik Rafi Ahamed, Harshal B. Nemade High Performance Multiplierless Serial Pipelined VLSI Architecture for Real-Valued FFT. Search on Bibsonomy NCC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
19Taizo Suzuki, Seisuke Kyochi, Yuichi Tanaka 0001, Masaaki Ikehara Multiplierless lifting-based fast X transforms derived from fast Hartley transform factorization. Search on Bibsonomy Multidimens. Syst. Signal Process. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
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