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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 24 occurrences of 23 keywords
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Results
Found 4 publication records. Showing 4 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
56 | Philippas Tsigas, Yi Zhang 0004 |
A simple, fast and scalable non-blocking concurrent FIFO queue for shared memory multiprocessor systems. |
SPAA |
2001 |
DBLP DOI BibTeX RDF |
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36 | Vishwani D. Agrawal, Srimat T. Chakradhar |
Performance Analysis of Synchronized Iterative Algorithms on Multiprocessor Systems. |
IEEE Trans. Parallel Distributed Syst. |
1992 |
DBLP DOI BibTeX RDF |
synchronized iterative algorithms, performanceevaluation technique, fixed probability, periodic instances, computational activity, binomial random variable, multiprocessorsystem, maximum order-statistic, theoretical performance, logicsimulation, production VLSI chips, performance evaluation, parallel algorithms, parallel processing, synchronizations, iterative methods, statistics, statistical model, atoms, random variables, computational effort, parallelmachines |
28 | Douglas M. Blough, Andrzej Pelc |
Almost Certain Fault Diagnosis Through Algorithm-Based Fault Tolerance. |
IEEE Trans. Parallel Distributed Syst. |
1994 |
DBLP DOI BibTeX RDF |
failureanalysis, almost certain fault diagnosis, multiprocessorsystems, incorrect computations, concurrent error detection mechanisms, erroneous dataelements, reliability, fault tolerant computing, multiprocessing systems, error detection, probabilistic analysis, concurrent error detection, algorithm-based fault tolerance |
28 | Tsern-Huei Lee, Jin-Jye Chou |
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks. |
IEEE Trans. Parallel Distributed Syst. |
1994 |
DBLP DOI BibTeX RDF |
dynamic full access property, multistage interconnectionnetworks, faulty banyan networ, multiprocessor system reconfiguration, test procedure, faulty switching elements, fault tolerant computing, probability, multiprocessor interconnection networks, reconfigurable architectures, computer testing, network decomposition |
Displaying result #1 - #4 of 4 (100 per page; Change: )
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