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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 54 occurrences of 39 keywords
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Results
Found 23 publication records. Showing 23 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
55 | Shih-Wei Liao, Perry H. Wang, Hong Wang 0003, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery |
Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. |
PLDI |
2002 |
DBLP DOI BibTeX RDF |
chaining speculative precomputation, dependence reduction, long-range thread-based prefetching, loop rotation, post-pass, scheduling, prediction, slicing, speculation, triggering, pointer, slack, delay minimization |
47 | Chanik Park, Junghee Lim, Kiwon Kwon, Jaejin Lee, Sang Lyul Min |
Compiler-assisted demand paging for embedded systems with flash memory. |
EMSOFT |
2004 |
DBLP DOI BibTeX RDF |
post-pass optimization, clustering, embedded systems, compilers, flash memory, paging, SRAM, heterogeneous memory |
38 | Hyungmin Cho, Bernhard Egger 0002, Jaejin Lee, Heonshik Shin |
Dynamic data scratchpad memory management for a memory subsystem with an MMU. |
LCTES |
2007 |
DBLP DOI BibTeX RDF |
horizontally-partitioned memory, post-pass optimization, compilers, scratchpad memory, demand paging |
37 | Mounira Bachir, Sid Ahmed Ali Touati, Albert Cohen 0001 |
Post-pass periodic register allocation to minimise loop unrolling degree. |
LCTES |
2008 |
DBLP DOI BibTeX RDF |
embedded code optimisation, periodic register allocation, software pipelining, loop unrolling |
37 | Kun Zhang 0006, Tao Zhang 0037, Santosh Pande |
Binary translation to improve energy efficiency through post-pass register re-allocation. |
EMSOFT |
2004 |
DBLP DOI BibTeX RDF |
cache power consumption, dead registers, register re-allocation, unused registers |
28 | Stefan Schäckeler, Weijia Shang |
Procedural Abstraction with Reverse Prefix Trees. |
CGO |
2009 |
DBLP DOI BibTeX RDF |
post-pass optimization, reverse prefix tree, embedded systems, suffix tree, program visualization, code size reduction, code compaction, procedural abstraction |
28 | Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean |
Supporting Demanding Hard-Real-Time Systems with STI. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
post-pass compiler, embedded systems, hardware-to-software migration, fine-grain concurrency, Software thread integration |
28 | Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean |
Extending STI for demanding hard-real-time systems. |
CASES |
2003 |
DBLP DOI BibTeX RDF |
AVR, NTSC video, STIGLitz, post-pass compiler, embedded systems, hardware-to-software migration, fine-grain concurrency, software thread integration |
28 | Dae-Hwan Kim, Hyuk-Jae Lee |
Iterative procedural abstraction for code size reduction. |
CASES |
2002 |
DBLP DOI BibTeX RDF |
post-pass optimization, embedded systems, optimizing compiler, code size reduction, procedural abstraction |
18 | Mounira Bachir, Albert Cohen 0001, Sid Ahmed Ali Touati |
On the effectiveness of register moves to minimise post-pass unrolling in software pipelined loops. |
HPCS |
2012 |
DBLP DOI BibTeX RDF |
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18 | Seungkyun Kim, Kiwon Kwon, Chihun Kim, Choonki Jang, Jaejin Lee, Sang Lyul Min |
Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations. |
ACM Trans. Embed. Comput. Syst. |
2011 |
DBLP DOI BibTeX RDF |
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18 | Bruno De Bus, Daniel Kästner, Dominique Chanet, Ludo Van Put, Bjorn De Sutter |
Post-pass compaction techniques. |
Commun. ACM |
2003 |
DBLP DOI BibTeX RDF |
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18 | Ashok Sudarsanam, Sharad Malik, Steven W. K. Tjiang, Stan Y. Liao |
Paged Absolute Addressing Mode Optimizations for Embedded Digital Signal Processors Using Post-pass Data-flow Analysis. |
Des. Autom. Embed. Syst. |
1999 |
DBLP DOI BibTeX RDF |
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18 | Chris J. Newburn, John Paul Shen |
Post-pass partitioning of signal processing programs. |
Int. J. Parallel Program. |
1997 |
DBLP DOI BibTeX RDF |
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18 | Ashok Sudarsanam, Sharad Malik, Steven W. K. Tjiang, Stan Y. Liao |
Optimization of embedded DSP programs using post-pass data-flow analysis. |
ICASSP |
1997 |
DBLP DOI BibTeX RDF |
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10 | Bjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei |
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays. |
LCTES |
2008 |
DBLP DOI BibTeX RDF |
register allocation, placement and routing, coarse-grained, reconfigurable arrays |
10 | Dorit Nuzman, Mircea Namolaru, Ayal Zaks, Jeff H. Derby |
Compiling for an indirect vector register architecture. |
Conf. Computing Frontiers |
2008 |
DBLP DOI BibTeX RDF |
compiler controlled cache, rotating register file, vectorization, data reuse, subword parallelism, viterbi, simd |
10 | Carsten Albrecht, Rainer Hagenau, Andreas C. Döring |
Cooperative Software Multithreading to Enhance Utilization of Embedded Processors for Network Applications. |
PDP |
2004 |
DBLP DOI BibTeX RDF |
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10 | Vasanth Asokan, Alexander G. Dean |
Providing time- and space- efficient procedure calls for asynchronous software thread integration. |
CASES |
2004 |
DBLP DOI BibTeX RDF |
asynchronous software thread integration, software-implemented communication protocol controllers, hardware to software migration, fine-grain concurrency |
10 | Viera Sipková |
Efficient Variable Allocation to Dual Memory Banks of DSPs. |
SCOPES |
2003 |
DBLP DOI BibTeX RDF |
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10 | Alexander G. Dean |
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration. |
Interaction between Compilers and Computer Architectures |
2002 |
DBLP DOI BibTeX RDF |
thread integration, Embedded system, real-time, compiler, concurrency, hardware to software migration |
10 | Alexander G. Dean |
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration. |
RTSS |
2002 |
DBLP DOI BibTeX RDF |
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10 | Alexander G. Dean, John Paul Shen |
Hardware to Software Migration with Real-Time Thread Integration. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
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