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1966-1974 (16) 1975-1976 (20) 1977-1978 (20) 1979-1980 (18) 1981-1982 (35) 1983 (21) 1984-1985 (39) 1986 (21) 1987 (26) 1988 (44) 1989 (48) 1990 (56) 1991 (45) 1992 (68) 1993 (80) 1994 (157) 1995 (230) 1996 (200) 1997 (242) 1998 (355) 1999 (426) 2000 (451) 2001 (468) 2002 (576) 2003 (731) 2004 (902) 2005 (933) 2006 (973) 2007 (923) 2008 (930) 2009 (724) 2010 (614) 2011 (486) 2012 (627) 2013 (674) 2014 (584) 2015 (579) 2016 (569) 2017 (592) 2018 (656) 2019 (713) 2020 (665) 2021 (627) 2022 (630) 2023 (654) 2024 (145)
Publication types (Num. hits)
article(3482) book(15) data(6) incollection(53) inproceedings(14718) phdthesis(183) proceedings(136)
Venues (Conferences, Journals, ...)
FPL(3186) FPGA(1618) FCCM(1513) FPT(1431) CoRR(335) ISCAS(296) PDeS(273) IEEE Trans. Very Large Scale I...(253) IEEE Trans. Comput. Aided Des....(188) IEEE J. Solid State Circuits(140) MSPN(136) DATE(123) DAC(122) IEEE Trans. Computers(115) VLSI Design(101) IPDPS(93) More (+10 of total 2070)
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Found 18593 publication records. Showing 18593 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
68Zhuo Gao, Ji Luo 0003, Hu Huang 0001, Wei Zhang, Joseph B. Bernstein Reliable Laser Programmable Gate Array Technology. Search on Bibsonomy ISQED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Laser Programmable Gate Array (LPGA), Laser Field-Programmable Gate Array (LFPGA), MakeLink technology, laser-induced/laser programmable anti-fuse, digital ASIC design, low electrical resistance anti-fuse, Field-Programmable Gate Array (FPGA)
56André DeHon Design of programmable interconnect for sublithographic programmable logic arrays. Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Manhattan mesh, sublithographic architecture, programmable logic arrays, nanowires, programmable interconnect
53Bradly K. Fawcett, J. Watson Reconfigurable Processing With Field Programmable Gate Arrays. Search on Bibsonomy ASAP The full citation details ... 1996 DBLP  DOI  BibTeX  RDF reconfigurable processing, internal architecture, computationally-intensive tasks, programmable solution, XC6200 FPGA architecture, SRAM control store, on-chip memory capability, field programmable gate arrays, interconnections, reconfigurable architectures, processors, coprocessors, coprocessors, SRAM chips, SRAM-based field programmable gate arrays
50Noha Kafafi, Kimberly A. Bozman, Steven J. E. Wilton Architectures and algorithms for synthesizable embedded programmable logic cores. Search on Bibsonomy FPGA The full citation details ... 2003 DBLP  DOI  BibTeX  RDF programmable logic cores, FPGA, standard cells, system-on-chip design
49Stuart W. Daniel, Jennifer Rexford, James W. Dolter, Kang G. Shin A programmable routing controller for flexible communications in point-to-point networks. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF programmable routing controller, flexible communications, communication characteristics, custom ASIC, programmable processor, multiple routing-switching microcode routines, multiprocessor interconnection networks, packet switching, packet switching, application specific integrated circuits, wormhole switching, programmable controllers, firmware, performance requirements, virtual cut-through switching, point-to-point networks
48Alban Verdenal, Didier Combes, Abraham Escobar-Gutiérrez Programmable and Self-Organised Processes in Plant Morphogenesis: The Architectural Development of Ryegrass. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
47Wei-Kang Huang, Fabrizio Lombardi An approach for testing programmable/configurable field programmable gate arrays. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF behavioral characterization, single fault detection, disjoint one-dimensional arrays, unilateral horizontal connections, common vertical input lines, array testing, logic blocks, field programmable gate arrays, field programmable gate arrays, VLSI, logic testing, integrated circuit testing, stuck-at fault, FPGA testing, functional fault, hybrid fault model
46Narendra V. Shenoy, Jamil Kawa, Raul Camposano Design automation for mask programmable fabrics. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF mask programmable fabrics, integrated circuits
45Uwe Meyer-Bäse, Antonio García 0001, Fred J. Taylor Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF field-programmable logic (FPL), complex programmable logic devices (CPLD), zero-IF filter, field programmable gate array (FPGA), digital signal processing (DSP), residue number system (RNS), channelizer
44Jiri Stehlik, Daniel Becvar Field Programmable Mixed-Signal Arrays (FPMA) Using Versatile Current/Voltage Conveyor Structures. (PDF / PS) Search on Bibsonomy PWC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Field Programmable Mixed-Signals Array, Programmable Universal Current Conveyor, Field Programmable Analog Array
44Bin Liu, Fabrizio Lombardi, Wei-Kang Huang Testing programmable interconnect systems: an algorithmic approach. Search on Bibsonomy Asian Test Symposium The full citation details ... 2000 DBLP  DOI  BibTeX  RDF programmable circuits, interconnected systems, programmable interconnect systems testing, algorithmic approach, programmable wiring networks, comprehensive fault model, network faults, open faults, switch faults, stuck-off faults, programming faults, minimal configuration number, node-disjoint path-sets, network adjacencies, post-processing algorithm, fault diagnosis, graphs, interconnections, fault detection, fault coverage, circuit analysis computing, stuck-at faults, switching, bridge faults, automatic test software, circuit testing, figure of merit, programming phases, stuck-on faults, short circuits
44T. Utsumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato Multiple-Valued Programmable Logic Arrays with Universal Literals. Search on Bibsonomy ISMVL The full citation details ... 1997 DBLP  DOI  BibTeX  RDF universal literals, multiple-valued programmable logic, universal literal generators, operator structures, programmable logic arrays, programmable logic arrays
43Ilija Hadzic, Jonathan M. Smith Balancing performance and flexibility with hardware support for network architectures. Search on Bibsonomy ACM Trans. Comput. Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF P4, performance, FPGA, computer networking, hardware, flexibility, programmable networks, programmable logic devices, protocol processing
43Amit Laknaur, Sai Raghuram Durbha, Haibo Wang 0005 Built-In-Self-Testing Techniques for Programmable Capacitor Arrays. Search on Bibsonomy J. Electron. Test. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF programmable capacitor array, built-in-self-testing, analog testing, field programmable analog array
42Daniela Rus Programmable matter with self-reconfiguring robots. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF programmable matter, robotics
42Michael Conrad, Thomas Fuhrmann, Marcus Schöller, Martina Zitterbart Secure Service Signaling and Fast Authorization in Programmable Networks. Search on Bibsonomy IWAN The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Flexible Service Platforms, Secure Signaling, Programmable Networks
41Yao-Wen Chang, D. F. Wong 0001, C. K. Wong Design and analysis of FPGA/FPIC switch modules. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF FPGA/FPIC switch modules, routing resources, FPIC, network-flow techniques, field programmable interconnect chip, field programmable gate arrays, FPGA, field programmable gate arrays, logic design, heuristic algorithm, programmable logic arrays, routability
41André DeHon, Michael J. Wilson Nanowire-based sublithographic programmable logic arrays. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF sublithographic architecture, programmable logic arrays, nanowires
41Peter Hallschmid, Steven J. E. Wilton Detailed routing architectures for embedded programmable logic IP cores. Search on Bibsonomy FPGA The full citation details ... 2001 DBLP  DOI  BibTeX  RDF FPGA, programmable logic, detailed routing, SoC design, embedded cores
40JoAnn M. Paul, Donald E. Thomas, Andrew S. Cassidy High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF schedulers, Computer-aided design, performance modeling, system modeling, heterogeneous multiprocessors
40Kamran Zarrineh, Shambhu J. Upadhyaya On Programmable Memory Built-In Self Test Architectures. Search on Bibsonomy DATE The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Charles E. Stroud, Srinivasa Konala, Ping Chen, Miron Abramovici Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!). Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF BIST architecture, programmable logic blocks, field programmable gate arrays, VLSI, logic testing, built-in self test, built-in self-test, integrated circuit testing, automatic testing, FPGA testing, field programmable gate array testing
40Lizy Kurian John VaWiRAM: a variable width random access memory module. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF VaWiRAM, variable width random access memory, flexible memory systems, configuration pins, pass gates, reconfigurability, reconfigurable architectures, memory architecture, programmable logic, random-access storage, integrated circuit interconnections, programmable logic devices, programmable interconnect
40Santonu Sarkar, Anupam Basu, Arun K. Majumdar Representation and Synthesis of Interface of a Circuit for its Reuse. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF VaWiRAM, variable width random access memory, flexible memory systems, configuration pins, pass gates, reconfigurability, reconfigurable architectures, memory architecture, programmable logic, random-access storage, integrated circuit interconnections, programmable logic devices, programmable interconnect
39Yaochu Jin, Yan Meng Morphogenetic Robotics: A New Paradigm for Designing Self-Organizing, Self-Reconfigurable and Self-Adaptive Robots. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Daniel Lobo, Jose D. Fernández, Francisco J. Vico Behavior-Finding: Morphogenetic Designs Shaped by Function. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Sylvain Cussat-Blanc, Jonathan Pascalie, Sébastien Mazac, Hervé Luga, Yves Duthen A Synthesis of the Cell2Organ Developmental Model. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Navneet Bhalla, Peter J. Bentley Programming Self-Assembling Systems via Physically Encoded Information. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Wenguo Liu 0001, Alan F. T. Winfield Distributed Autonomous Morphogenesis in a Self-Assembling Robotic System. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39René Doursat, Carlos Sánchez, Razvan Dordea, David Fourquet, Taras Kowaliw Embryomorphic Engineering: Emergent Innovation Through Evolutionary Development. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Sara Montagna, Mirko Viroli A Computational Framework for Multilevel Morphologies. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Rehan O'Grady, Anders Lyhne Christensen, Marco Dorigo SWARMORPH: Morphogenesis with Self-Assembling Robots. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Sebastian von Mammen, David Phillips, Timothy Davison, Heather A. Jamniczky, Benedikt Hallgrímsson, Christian Jacob 0001 Swarm-Based Computational Development. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Hiroki Sayama Swarm-Based Morphogenetic Artificial Life. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Daniel J. Arbuckle, Aristides A. G. Requicha Issues in Self-Repairing Robotic Self-Assembly. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Antoine Spicher, Olivier Michel 0001, Jean-Louis Giavitto Interaction-Based Modeling of Morphogenesis in MGS. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Linge Bai, David E. Breen Chemotaxis-Inspired Cellular Primitives for Self-Organizing Shape Formation. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39René Doursat, Hiroki Sayama, Olivier Michel 0001 Morphogenetic Engineering: Reconciling Self-Organization and Architecture. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Alan F. T. Winfield, Julien Nembrini Emergent Swarm Morphology Control of Wireless Networked Mobile Robots. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Taras Kowaliw, Wolfgang Banzhaf Mechanisms for Complex Systems Engineering Through Artificial Development. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Jacob Beal Functional Blueprints: An Approach to Modularity in Grown Systems. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
39Justin Werfel Collective Construction with Robot Swarms. Search on Bibsonomy Morphogenetic Engineering, Toward Programmable Complex Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
38André DeHon Nanowire-based programmable architectures. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Manhattan mesh, stochastic construction, sublithographic architecture, programmable logic arrays, Defect tolerance, nanowires, programmable interconnect
38Vi Chi Chan, David Lewis Hierarchical partitioning for field-programmable systems. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF FPGA partitioning problems, circuit structures, field-programmable systems, partitioning tree, recursive bipartitioning algorithm, field programmable gate arrays, VLSI, quality, logic CAD, hierarchical partitioning
38Wei-Kang Huang, Xiao-Tao Chen, Fabrizio Lombardi On the diagnosis of programmable interconnect systems: Theory and application. Search on Bibsonomy VTS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF field programmable interconnect system, switch grid, FPIS, Xilinx 3000, field programmable gate arrays, FPGA, fault diagnosis, logic testing, diagnosis, integrated circuit interconnections
38Dinesh Bhatia, James Haralambides Resource requirements for field programmable interconnection chips. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF field programmable interconnection chips, n-permutation graph, network property, routing delays, programmable switches, routing paths, specific I/O permutations, user-configured interconnection, VLSI, VLSI, graph theory, network routing, permutation networks, integrated circuit interconnections, Benes network
37Jason Helge Anderson Emerging application domains: research challenges and opportunities for FPGAs. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF performance, field-programmable gate array, fpga, applications, high-performance computing, power, reconfigurable computing
37Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Programmable platforms, estimation methodology, instruction complexity, memory transfers
37Shree K. Nayar, Vlad Branzoi, Terrance E. Boult Programmable Imaging: Towards a Flexible Camera. Search on Bibsonomy Int. J. Comput. Vis. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF programmable imaging, flexible imaging, micro-mirror array, digital micro-mirror device, adaptive optics, optical processing, multi-viewpoint imaging, catadioptric imaging, wide-angle imaging, purposive camera, object recognition, stereo, resolution, MEMS, feature detection, high dynamic range imaging, field of view
37Gonçalo Nuno Moutinho de Carvalho, Tony Gill, Tony Parisi X3D programmable shaders. Search on Bibsonomy Web3D The full citation details ... 2004 DBLP  DOI  BibTeX  RDF real-time shading, GPU, VRML, X3D, stream processors, programmable shading
37Paul Willmann, Michael Brogioli, Vijay S. Pai Spinach: a liberty-based simulator for programmable network interface architectures. Search on Bibsonomy LCTES The full citation details ... 2004 DBLP  DOI  BibTeX  RDF programmable network interfaces, simulation, embedded systems
37Luca Macchiarulo, Consolato F. Caccamo, Davide Pandini A comparison between mask- and field-programmable routing structures on industrial FPGA architectures. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF mask-programmable, FPGA, routing, interconnect architectures
37Nico Janssens, Lieven Desmet, Sam Michiels, Pierre Verbaeten NeCoMan: middleware for safe distributed service deployment in programmable networks. Search on Bibsonomy Adaptive and Reflective Middleware The full citation details ... 2004 DBLP  DOI  BibTeX  RDF network consistency, safe runtime deployment of distributed services, programmable networks
37Timothy J. Purcell, Ian Buck, William R. Mark, Pat Hanrahan Ray tracing on programmable graphics hardware. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF ray tracing, programmable graphics hardware
37Charles E. Stroud, James R. Bailey, Johan R. Emmert A New Method for Testing Re-Programmable PLAs. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF electrically erasable programmable logic array testing, manufacturing test development, bridging faults
37Rahul Razdan, Michael D. Smith 0001 A high-performance microarchitecture with hardware-programmable functional units. Search on Bibsonomy MICRO The full citation details ... 1994 DBLP  DOI  BibTeX  RDF automatic instruction set design, compile-time optimization, general-purpose microarchitectures, logic synthesis, programmable logic
37Thomas C. P. Chau, Philip Heng Wai Leong, Sam M. H. Ho, Brian P. W. Chan, Steve C. L. Yuen, Kong-Pang Pun, Oliver C. S. Choy, Xinan Wang A comparison of via-programmable gate array logic cell circuits. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF logic cell, via-programmable gate arrays
37Petr Pfeifer Multifunctional Programmable Single-Board CAN Monitoring Module. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Student Papers, FPL2000, programmable device, ALTERA, FLEX6000, EPF6016, SJA1000, PC/104, CAN
36Dinesh Bhatia, James Haralambides Resource requirements and layouts for field programmable interconnection chips. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
36John Schewel, Michael Thornburg, Steve Casselman Transformable computers & hardware object technology. Search on Bibsonomy IPPS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF transformable computers, hardware object technology, reconfigurable aspects, computationally intensive software algorithms, on-the-fly use, field programmable gate arrays, field programmable gate arrays, programming, reconfigurable architectures, programmable logic arrays, hardware design, performance gain
36Akihiro Tsutsui, Toshiaki Miyazaki, Kazuhisa Yamada, Naohisa Ohta Special purpose FPGA for high-speed digital telecommunication systems. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF special purpose FPGA, high-speed digital telecommunication systems, high-speed transport data processing, inter-chip connection mechanism, dedicated CAD system, field programmable gate arrays, field programmable gate array, programmable logic arrays, digital communication
36Rajeev Murgai, Masahiro Fujita, Fumiyasu Hirose Logic synthesis for a single large look-up table. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF single large look-up table, LUT-based field-programmable gate array architectures, simulation time minimisation, compile-code, software simulation, field programmable gate arrays, Boolean function, logic design, logic synthesis, hardware accelerator, programmable logic arrays, table lookup, logic simulation, FPGA architectures, logic functions, on-chip memory, memory constraint
35Richard B. Kujoth, Chi-Wei Wang, Derek B. Gottlieb, Jeffrey J. Cook, Nicholas P. Carter A reconfigurable unit for a clustered programmable-reconfigurable processor. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF FPGA, technology scaling, reconfigurable processor
34David Blythe The Direct3D 10 system. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF programmable graphics hardware, graphics systems, programmable shading
34Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay Kumar Verma, Seyed-Hosein Attarzadeh-Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Field Programmable Compressor Tree (FPCT), compressor tree, Field Programmable Gate Array (FPGA)
34Tim Tuan, Sean Kao, Arifur Rahman, Satyaki Das, Steven Trimberger A 90nm low-power FPGA for battery-powered applications. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FPGAs, field-programmable gate arrays, low-power design, programmable logic
34Seungkweon Jeong, Young Shin Kim, Wook Hyun Kwon Scheduling algorithm for programmable logic controllers with remote I/Os. Search on Bibsonomy RTCSA The full citation details ... 1997 DBLP  DOI  BibTeX  RDF remote I/O, remote input output, sequence programs, application processor, bounded response time, scheduling algorithm, network processor, computer simulation, multitasking, data transmission, programmable logic controllers, PLC, programmable controllers
34David Ashen, Fred J. Meyer, Nohpill Park, Fabrizio Lombardi Testing of programmable logic devices (PLD) with faulty resources. Search on Bibsonomy DFT The full citation details ... 1997 DBLP  DOI  BibTeX  RDF faulty resources, routing resources, built-in self-test schemes, parity chain, one-dimensional arrays, active routing devices, interconnection channels, input/output lines, logic testing, fault model, fault coverage, multiple faults, programmable logic devices, programmable logic devices
34Dieter Spath, Ulf Osmers Virtual Reality - An Approach to Improve the Generation of Fault-Free Software for Programmable Logic Controllers (PLC). Search on Bibsonomy ICECCS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF fault free software, instruction list, ladder diagram, virtual reality, programmable logic controllers, programmable controllers, low-level languages
34Tomoo Inoue, Hideo Fujiwara, Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto Universal test complexity of field-programmable gate arrays. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF universal test complexity, arbitrary logic circuits, sequential loading, random access loading, programming schemes, block-sliced loading, configuration memory cells, field programmable gate arrays, field-programmable gate array, computational complexity, fault diagnosis, logic testing, design for testability, fault model, logic CAD, table lookup, look-up tables, automatic test software, C-testable
34Hardy J. Pottinger, Chien-Yuh Lin Using a reconfigurable field programmable gate array to demonstrate boundary scan with built in self test. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF student experiments, educational aids, reconfigurable FPGA, XC4000 Logic Cell Array Family, IEEE Standard 1149.1, XC4003PC84-6, field programmable gate arrays, field programmable gate array, logic testing, built-in self test, built-in self-test, computer science education, integrated circuit testing, design for testability, logic design, BIST, teaching, fault simulation, integrated circuit design, boundary scan, demonstration, boundary scan testing, Xilinx, electronic engineering education
33Nan Wu 0003, Mei Wen, Wei Wu, Ju Ren 0002, Huayou Su, Changqing Xun, Chunyuan Zhang Streaming HD H.264 encoder on programmable processors. Search on Bibsonomy ACM Multimedia The full citation details ... 2009 DBLP  DOI  BibTeX  RDF 1080P HD, H.264 encoder, real-time, stream, programmable
33Haiyan Li, Chunyuan Zhang, Li Li 0005, Ju Ren 0002 Transform coding on programmable stream processors. Search on Bibsonomy J. Supercomput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Programmable stream processor, Imagine stream architecture, Graphics processing unit (GPU), H.264, Transform coding
33Sven Woop, Jörg Schmittler, Philipp Slusallek RPU: a programmable ray processing unit for realtime ray tracing. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF ray processing unit, ray tracing, hardware architecture, programmable shading
33Geoff Coulson, Gordon S. Blair, David Hutchison 0001, Ackbar Joolia, Kevin Lee, Jo Ueyama, Antônio Tadeu A. Gomes, Yimin Ye NETKIT: a software component-based approach to programmable networking. Search on Bibsonomy Comput. Commun. Rev. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF middleware, components, reflection, programmable networking
33Henry Selvaraj, Mariusz Rawski, Tadeusz Luba FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. Search on Bibsonomy ITCC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF programmable read only memory, Boolean functions, implementation, digital circuits, sequential machines, logic minimization
33Mark S. Peercy, Marc Olano, John Airey, P. Jeffrey Ungar Interactive multi-pass programmable shading. Search on Bibsonomy SIGGRAPH The full citation details ... 2000 DBLP  DOI  BibTeX  RDF multi-pass rendering, rendering, texture mapping, languages, texture synthesis, graphics hardware, illumination, OpenGL, interactive rendering, graphics systems, non-realistic rendering, programmable shading, procedural shading
33Jim Gindling, Andri Ioannidou, Jennifer Loh, Olav Lokkebo, Alexander Repenning LEGOsheets: A Rule-Based Programming, Simulation and Manipulation Environment for the LEG0 Programmable Brick. Search on Bibsonomy VL The full citation details ... 1995 DBLP  DOI  BibTeX  RDF LEGO Programmable Brick, LEGOsheets, adult learning mechanisms, mechanical artifact design, simulation, robots, logic programming, software tools, computer science education, programming environments, programming environment, visual programming, visual programming, vehicles, computer aided instruction, programming education, rule-based programming, authoring systems, educational environment
32Joel Sommers, Paul Barford, Mark Crovella Router primitives for programmable active measurement. Search on Bibsonomy PRESTO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF programmable measurement, router programmability, active measurement
32Ran Giladi, Niv Yemini A programmable, generic forwarding element approach for dynamic network functionality. Search on Bibsonomy PRESTO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF forwarding element, programmable netwroks, network systems
32Bruce S. Davie, Jan Medved A programmable overlay router for service provider innovation. Search on Bibsonomy PRESTO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF end-to-end argument, overlays, programmable routers
32Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay Kumar Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. Search on Bibsonomy FPGA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF field programmable counter array (FPCA), FPGA
32Frank-Michael Renner, Jürgen Becker 0001, Manfred Glesner Field Programmable Communication Emulation and Optimization for Embedded System Design. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF architecture-precise rapid prototyping, field programmable emulation, Hardware/software codesign, real-time embedded systems
32Vikram Pasham, Wilfrido Alejandro Moreno, Fernando J. Falquez Field Programmable Multi Chip Modules Using Programmable Laser Interconnects. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Multi-FPGAs, Laser Vertical Links, LPIC, MCM, Programmable interconnects
31Zhining Huang, Sharad Malik, Nahri Moreano, Guido Araujo The design of dynamically reconfigurable datapath coprocessors. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF coarse-grain reconfigurable fabric, reconfigurable datapath, Loop pipelining, interconnection design, datapath synthesis
31Zhining Huang, Sharad Malik Exploiting operation level parallelism through dynamically reconfigurable datapaths. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
31Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke Bridging the computation gap between programmable processors and hardwired accelerators. Search on Bibsonomy HPCA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
31André Ribeiro Cardoso, Ahmed Serhrouchni, Joaquim Celestino Jr., Mikaël Salaün Convergence among Peer-to-Peer and Programmable Networks. Search on Bibsonomy ECUMN The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
31Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. Search on Bibsonomy SBCCI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF high speed digital circuit, low power, prescaler, frequency synthesizer
31Paul E. Hasler Low-Power Programmable Signal Processing, invited. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
31S. A. Rahim, Laurence E. Turner A Field Programmable Bit-Serial Digital Signal Processor. Search on Bibsonomy IWSOC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31Matt Kucic, Paul E. Hasler, Jeff Dugger, David V. Anderson Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits. Search on Bibsonomy ARVLSI The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
31Sushil Chandra Jain, Anshul Kumar, Shashi Kumar Efficient Embedding of Partitioned Circuits onto Multi-FPGA Boards. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
31Yasuaki Sumi, Shigeki Obote, Naoki Kitai, Ryousuke Furuhashi, Yoshitaka Matsuda, Yutaka Fukui PLL frequency synthesizer with an auxiliary programmable divider. Search on Bibsonomy ISCAS (2) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
31Yen-Tai Lai, Ping-Tsung Wang Hierarchical interconnection structures for field programmable gate arrays. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
31Eric Lemoine, Laurent Maillet-Contoz, David Merceron, Jean Sallantin High speed intelligent machine through programmable hardware: application to genomic systems. Search on Bibsonomy KES (2) The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
31Anselmo Lastra, Steven Molnar, Marc Olano, Yulan Wang Real-Time Programmable Shading. Search on Bibsonomy SI3D The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
31Philip James-Roxby, Gordon J. Brebner Multithreading in a Hyper-programmable Platform for Networked Systems. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31John Y. Oliver, Venkatesh Akella Improving DSP Performance with a Small Amount of Field Programmable Logic. Search on Bibsonomy FPL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
31Aneesh Koorapaty, Lawrence T. Pileggi Modular, Fabric-Specific Synthesis for Programmable Architectures. Search on Bibsonomy FPL The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
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